CN111258097A

CN111258097A - Display substrate, display panel and display device

Info

Publication number: CN111258097A
Application number: CN202010102455.XA
Authority: CN
Inventors: 何祥波; 许慜
Original assignee: Xiamen Tianma Microelectronics Co Ltd
Current assignee: Xiamen Tianma Microelectronics Co Ltd
Priority date: 2020-02-19
Filing date: 2020-02-19
Publication date: 2020-06-09
Anticipated expiration: 2040-02-19
Also published as: CN111258097B

Abstract

The invention discloses a display substrate, a display panel and a display device, and relates to the technical field of display, wherein the display substrate comprises a step area and a display area, and the display area and the step area are arranged along a first direction; the step area comprises a binding area, the binding area comprises a plurality of welding pads arranged at intervals, and the welding pads are arranged along a second direction; a first interval area is arranged between every two adjacent bonding pads, and the first interval area insulates and separates two adjacent bonding pads; the first spacer includes a diffusion barrier structure; the orthographic projection of the diffusion barrier structure on the substrate is positioned in the orthographic projection of the first interval area on the substrate; the first direction intersects the second direction. Therefore, the diffusion speed and the diffusion range of the alignment liquid between the bonding pads of the binding region are favorably reduced, and the phenomenon of uneven display is avoided.

Description

Display substrate, display panel and display device

Technical Field

The invention relates to the technical field of display, in particular to a display substrate, a display panel and a display device.

Background

As display products have become popular, users have higher demands for the appearance, structure, and the like of the display products, and display panels with narrow frames are now in the pursuit of consumers. However, as the frame of the display panel is narrowed, the upper/lower boundaries thereof are compressed to a higher limit, and the size of the step area of the display panel is also reduced; the step area is generally provided with a binding area, and the driving chip IC and the flexible printed circuit board FPC are connected to the display substrate through a bonding pad of the binding area; the compression of the size of the step area enables the space between the binding area of the display panel and the display area to be smaller.

A liquid crystal display panel (LCD) controls light transmitted through a liquid crystal layer by controlling a rotation direction and a rotation angle of liquid crystal molecules, thereby displaying images of various gray scales. To control the alignment direction of the liquid crystal molecules, it is usually necessary to coat the color film substrate and the array substrate with alignment liquid to form an alignment film. However, since the alignment liquid has a certain fluidity, the alignment liquid is easily diffused from the display area to the periphery and spreads to the bonding area, so that the electrical connection performance of the bonding pad is damaged, the bonding effect and reliability of the subsequent driving chip IC or the flexible printed circuit board FPC are affected, the display effect of the display device is further affected, and the phenomenon of uneven display is generated.

Disclosure of Invention

In view of the above, the present invention provides a display substrate, a display panel and a display device, in which a diffusion barrier structure located between adjacent bonding pads in a bonding region can effectively slow down the diffusion speed of the alignment liquid, reduce the diffusion range of the alignment liquid in a step region, improve the influence of the alignment liquid diffusion on the bonding effect between the bonding pad and the FPC or IC, improve the display effect of the display device, and avoid the occurrence of the display non-uniformity.

In a first aspect, the present application provides a display substrate, including a step area and a display area, where the display area and the step area are arranged along a first direction; the step area comprises a binding area, the binding area comprises a plurality of welding pads arranged at intervals, and the welding pads are arranged along a second direction; a first interval area is arranged between every two adjacent bonding pads, and the first interval area insulates and separates two adjacent bonding pads; the first spacer includes a diffusion barrier structure; the orthographic projection of the diffusion barrier structure on the substrate is positioned in the orthographic projection of the first interval area on the substrate; the first direction intersects the second direction.

In a second aspect, the present application provides a display panel, including the display substrate provided in the present application, a counter substrate disposed opposite to the display substrate; and a display medium layer, a first alignment film and a second alignment film between the counter substrate and the display substrate;

the first alignment film is positioned between the display medium layer and the display substrate;

the second alignment film is located between the display medium layer and the opposite substrate.

The application also provides a display device comprising the display panel provided by the application.

Compared with the prior art, the display substrate, the display panel and the display device provided by the invention at least realize the following beneficial effects:

according to the display substrate, the display panel and the display device, the total flow of the alignment liquid diffused in the first interval area can be reduced by arranging the diffusion barrier structure in the first interval area between the adjacent bonding pads of the binding area; furthermore, because a certain height difference exists between the position of the diffusion barrier structure in the first interval area and the position of the diffusion barrier structure which is not arranged, the roughness of the upper surface of the first interval area can be improved due to the diffusion barrier structure, the forward diffusion speed of the alignment liquid along the first interval area is reduced, the diffusion spreading range of the alignment liquid on the step is reduced, the adverse effect of the alignment liquid on the electric connection performance of the welding disc is reduced, the binding effect of the welding disc in the binding area and the FPC or IC is improved, the display effect of the display device is improved, and the phenomenon of uneven display is avoided.

Of course, it is not necessary for any product in which the present invention is practiced to achieve all of the above-described technical effects simultaneously.

Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.

FIG. 1 is a schematic view of a prior art arrangement of a display substrate before dicing;

FIG. 2 is a schematic view of another prior art arrangement of a display substrate before dicing;

FIG. 3 is a schematic view of the diffusion of the alignment liquid in the step region of the display substrate shown in FIG. 2;

fig. 4 is a top view of a display substrate according to an embodiment of the present disclosure;

FIG. 5 is a schematic view of an arrangement of the bonding pad and the diffusion barrier structure of FIG. 4;

FIG. 6 is a schematic view of another arrangement of the bonding pads and the diffusion barrier structure of FIG. 4;

FIG. 7 is an AA' cross-sectional view of the bonding area of the display substrate shown in FIG. 4;

FIG. 8 is a cross-sectional view of an alternative AA' of the bonding area of the display substrate shown in FIG. 4;

FIG. 9 is a cross-sectional view of an alternative AA' of the bonding area of the display substrate shown in FIG. 4;

FIG. 10 is a cross-sectional view of yet another AA' of the bonding area of the display substrate shown in FIG. 4;

FIG. 11 is a cross-sectional view of an alternative AA' of the bonding area of the display substrate shown in FIG. 4;

FIG. 12 is a BB' cross-sectional view of the display panel shown in FIG. 4;

fig. 13 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure;

fig. 14 is a schematic structural diagram of a display device according to an embodiment of the present disclosure.

Detailed Description

Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.

The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the specification where appropriate.

In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.

In the conventional manufacturing process of the display substrate, device layers corresponding to a plurality of display substrates are usually formed on a single glass substrate, and then cut to form a plurality of independent display substrates. Before cutting, there are two arrangements of a whole glass substrate, and fig. 1 is a schematic arrangement diagram 01 of a display substrate provided in the prior art before cutting; a dummy area (dummy area) 60 for separating the step area 20 of the left display substrate 100 from the display area 10 of the right display substrate 100 is reserved between two adjacent display substrates 100 arranged in the row direction. By adopting the glass substrate 01 with the non-close-packed design, in the coating process of the alignment liquid 70, although the situation that the alignment liquid 70 diffuses over the upper boundary 50 and dummy area 60 of the right display substrate to the step area 20 of the left display substrate can be avoided to a certain extent, the typesetting rate of the glass substrate 01 can be reduced due to the arrangement of the dummy area 60, the utilization rate of the glass substrate material is reduced, and the cost of unit products is increased. Fig. 2 is a schematic view of another arrangement of a display substrate 100 provided in the prior art before cutting; the typesetting mode of the glass substrate 02 adopts a close-packed design, namely, a dummy area in a non-close-packed design does not exist, and the design mode can obviously improve the typesetting rate of the glass substrate and reduce the generation of glass substrate waste; however, when the glass substrate 02 with the close-packed design is coated with the alignment liquid 70, the alignment liquid 70 is easily spread over the upper boundary 50 of the right display substrate and overflows to the step area 20 of the right display substrate; FIG. 3 is a schematic view of the step region 20 of the substrate shown in FIG. 2 showing the diffusion of the alignment liquid. Moreover, as the frame of the display substrate becomes narrower, the size of the step region 20 of the display substrate is continuously reduced, and the alignment liquid 70 is more easily diffused to the step region 20. For a narrow bezel display panel, the display substrate step area 20 is generally provided with a bonding area 30, and the bonding area 30 is provided with a pad 40 for electrically connecting an external device such as a driving chip IC and a flexible printed circuit board FPC to the display substrate; the size of the step area 20 is compressed, which means that the distance between the bonding area 30 and the boundary 50 of the display substrate and the distance between the bonding area 30 and the boundary of the display area in the display substrate are further reduced, when the alignment liquid is coated on the display area 10 of the display substrate, the alignment liquid 70 with certain fluidity is more likely to spread to the bonding area 30 beyond the boundary of the display substrate or the boundary of the display area 10, and the bonding liquid 70 covers the bonding pad 40, so that poor adhesion between the bonding pad 40 and a conductive bonding pad of an FPC or a conductive bonding pad of an IC is caused, the bonding effect of the FPC/IC is affected, signals of the FPC or the IC cannot be effectively guided into the panel, and the problem that the display cannot normally work occurs.

The invention provides a display substrate, a display panel and a display device, wherein a diffusion barrier structure positioned between adjacent bonding pads in a binding region can effectively slow down the diffusion speed of alignment liquid, reduce the diffusion range of the alignment liquid in a step region, improve the influence of the diffusion of the alignment liquid on the binding effect of the bonding pads and an FPC (flexible printed circuit) or an IC (integrated circuit), improve the display effect of the display device and avoid the phenomenon of uneven display.

Fig. 4 is a top view of a display substrate according to an embodiment of the present disclosure; FIG. 5 is a schematic diagram of an arrangement of the bonding pad and the diffusion barrier structure of FIG. 4; referring to fig. 4 and 5, a display substrate 100 provided in the present application includes a step area 20 and a display area 10, wherein the display area 10 and the step area 20 are arranged along a first direction; the stepped region 20 further includes a bonding region 30;

the bonding area 30 includes a plurality of pads 40 arranged at intervals, and the pads 40 are arranged along a second direction;

a first interval area 41 is arranged between every two adjacent bonding pads 40, and the first interval area 41 is used for insulating and separating the two adjacent bonding pads 40; the first spacer 41 includes a diffusion barrier structure 42;

the orthographic projection of the diffusion barrier structure 42 on the substrate base is positioned in the orthographic projection of the first spacing area 41 on the substrate base; the first direction intersects the second direction.

It should be noted that, in the top view of the display substrate 100 shown in fig. 4, only a partial structure of the display substrate 100 is shown, and in the structural schematic diagram of the bonding region 30 shown in fig. 5, only one relative position relationship between the pad 40 and the diffusion barrier structure 42 is shown, and does not represent an actual size. The present application is not particularly limited with respect to other structures of the substrate 100 and the bonding region 30 shown in fig. 4 and 5.

Specifically, the display substrate 100 provided in the embodiment of the present application includes the step region 20 and the display region 10, and the step region 20 and the display region 10 are arranged along the first direction. The display area 10 refers to an area on the display substrate 100 where an image can be displayed; the step area 20 provides various control signals for driving the display of the image to the display area 10, and is an area on the display substrate 100 where no image is displayed; the land area 20 may be provided with a static protection circuit, a demultiplexer assembly, a switch test assembly, fan-out traces, and other circuits or structures known to those skilled in the art, which are not limited herein and may be provided by those skilled in the art according to actual situations.

The step area 20 of the display substrate 100 provided by the present application is provided with a binding area 30, the binding area 30 is an area for realizing the electrical connection between the display substrate 100 and the IC or the FPC, and specifically can be realized by a plurality of pads 40 arranged at intervals in the binding area 30, and the driver chip IC and the flexible printed circuit board FPC transmit electrical signals for the display substrate 100. For the COF (driver chip bonded on flexible printed circuit) type display substrate design, since the region where the IC is directly disposed is omitted in the stepped region 20, the lower frame width of the display substrate 100 can be further simplified. It should be noted that, the number of the pads 40 shown in fig. 5 is 9 for example, alternatively, the number of the pads 40 may be any one or more than 2 to 8, and the specific number of the pads 40 is set according to the actual requirement of the display panel, which is not limited in this embodiment. A first interval area 41 is arranged between every two adjacent bonding pads 40, and the first interval area 41 is used for insulating and separating the bonding pads 40 from the adjacent bonding pads 40; since the bonding pads 40 are usually made of metal with good conductivity, in order to avoid short circuit of electrical connection between two adjacent bonding pads 40, an insulating structure is required to be disposed between two adjacent bonding pads 40 for separation, and the first spacer 41 is usually provided with an insulating material; further, in order to achieve the pad binding effect, the upper surface of the first spacer region 41 is generally lower in height than the upper surface of the pad 40. When the alignment liquid diffuses to the binding region 30, the alignment liquid continues to diffuse forward along the first spacer region 41; without special arrangements, the first spacers 41 are usually located at the same height from the upper surface of the substrate base plate, so that the alignment liquid can diffuse further along the first spacers. The diffusion barrier structure 42 is arranged in the first interval area 41 between two adjacent bonding pads 40, and the orthographic projection of the diffusion barrier structure 42 on the substrate is arranged in the orthographic projection of the first interval area 41 on the substrate. The diffusion speed and range of the alignment liquid in the bonding region 30 can be effectively blocked, because the bonding pads 40 are arranged along the second direction, and the extending direction of the first spacing region 41 is consistent with the diffusion direction of the alignment liquid and is along the first direction; after the diffusion barrier structure 42 is arranged in the first spacer region 41, the total flow rate of the alignment liquid diffused and spread in the first spacer region 41 can be effectively reduced; in addition, because a certain height difference exists between the position where the diffusion barrier structure 42 is arranged in the first spacer region 41 and the position where the diffusion barrier structure 42 is not arranged, the existence of the diffusion barrier structure 42 can improve the roughness of the surface of the first spacer region 41, slow down the forward diffusion speed of the alignment liquid 70 along the first spacer region 41, reduce the diffusion spreading range of the alignment liquid 70 in the step region 20, reduce the adverse effect of the alignment liquid 70 on the electric connection performance of the bonding pad 40, improve the binding effect of the bonding pad 40 and an FPC or an IC in the binding region, improve the display effect of the display device, and avoid the phenomenon of uneven display. Furthermore, the diffusion barrier structure 42 is disposed in the first spacer 41, but the boundary of the diffusion barrier structure is not overlapped with the boundary of the first spacer 41, so that the short circuit caused by the diffusion barrier structure 42 electrically connecting and conducting two adjacent pads 40 can be avoided, and the boundary misalignment means that the boundaries of the diffusion barrier structure 42 and the pads 40 are misaligned, and a gap reserved between the two is available for flowing of the alignment liquid, so that the phenomenon that the pads 40 are covered by the alignment liquid due to the poor flowing of the alignment liquid can be avoided.

Alternatively, the display substrate provided in the embodiment of the present application may be obtained by cutting the glass substrate 01 with the non-close-packed design shown in fig. 1, or may be formed by cutting the glass substrate 02 with the close-packed design shown in fig. 2, and the arrangement form of the glass substrate before the display substrate 100 is cut is not limited in the present application. However, the display substrate 100 shown in the present application may be preferably cut from the glass substrate 02 having a close-packed design, from the viewpoint of increasing the layout ratio of the glass substrate and reducing the cost per unit product. Because the diffusion barrier structure 42 is disposed between the two adjacent bonding pads 40 in the bonding region 30 of the display substrate 100 in the embodiment of the present application, even if the situation shown in fig. 3 occurs that the alignment liquid 70 diffuses and overflows the upper boundary 102 of the right display substrate and diffuses to the step region 20 on the adjacent left display substrate, the diffusion barrier structure 42 disposed on the left display substrate can effectively reduce the diffusion speed of the alignment liquid 70 and reduce the spreading range of the alignment liquid, the distance between two adjacent to-be-cut display substrates on the glass substrate does not need to be increased, the layout rate of the display substrates is improved, and further, the utilization rate of raw materials is improved.

In an alternative embodiment of the present invention, with continued reference to fig. 4 and 5, a first spacer 41 is disposed between every two adjacent bonding pads 40, wherein the two bonding pads 40 are insulated and separated from each other, and a diffusion barrier structure 42 is disposed in each spacer.

Specifically, with continued reference to fig. 5, the display substrate 100 provided by the embodiment of the present application has a bonding region 30 with a first spacer region 41 between each two adjacent bonding pads 40. After the diffusion barrier structures 42 are arranged in each first interval area 41, a more uniform diffusion barrier effect can be realized, and the phenomena that the first interval area 41 without the diffusion barrier structures 42 bears more flow of the alignment liquid transferred and shunted by the first interval area 41 with the diffusion barrier structures 42, the diffusion range of the alignment liquid 70 in the weighting part area is increased, and the electric connection performance of the bonding pad 40 is damaged are avoided; therefore, the diffusion barrier structure 42 disposed in each first spacer 41 can further effectively improve the bonding effect between the bonding pad 40 and the FPC or IC

In an alternative embodiment of the present invention, fig. 6 is a schematic top view of another arrangement of the bonding pad 40 and the diffusion barrier 42 in the bonding region 30 of fig. 4. Referring to fig. 5 and 6, fig. 5 and 6 not only show a structural schematic diagram showing the relative positions of the bonding region 30, the bonding pad 40 and the diffusion barrier structure 42 of the substrate 100, but also further show some non-limiting shapes of the diffusion barrier structure 42; specifically, each diffusion barrier structure 42 includes at least one diffusion barrier cell 43; the orthographic projection of the diffusion barrier unit 43 on the plane of the substrate base plate can be at least one of a strip shape, a product shape, a fold line shape, an oval shape or a V shape.

In particular, with continued reference to fig. 5 and 6, when the diffusion barrier structure 42 includes at least one diffusion barrier unit 43 in the present application, the surface unevenness of the first spacer 41 may be further improved, and the diffusion preventing effect of the alignment liquid 70 may be improved. Particularly, when the diffusion barrier unit 43 is designed to have a non-linear shape with a plurality of bending radians or a plurality of diffusion barrier units 43 are combined into a shape with a plurality of bending channels, the circulation difficulty of the alignment liquid 70 diffusing along the first direction on the upper surface in the first spacing area 41 can be further improved, the alignment liquid is prevented from crossing the binding area to further influence the electrical connection performance of other devices in the step area, and the diffusion prevention effect of the diffusion barrier structure 42 is improved. In fig. 5 and 6, some conventional forms of the diffusion barrier unit 43 are only given by way of example, and the orthographic projection of the diffusion barrier unit 43 on the plane of the substrate base plate is in a strip shape, a product shape, a fold shape, an ellipse shape or a V shape; of course, these shapes shown in fig. 5 and fig. 6 do not limit the shape of the diffusion barrier unit 43 covered by the present application, and other shapes can also be included in the protection scope of the present application when they can achieve the effect of blocking the diffusion of the alignment liquid in the present application. Meanwhile, for any diffusion barrier structure 42 located in the first spacer region 41, it may be formed by combining a single diffusion barrier unit 43 of a certain type, or may be formed by combining a plurality of diffusion barrier units 43 of different types, and the combination form thereof is not particularly limited in this application. When the shape and combination of the diffusion barrier units 43 are adopted, the flow rate and diffusion range of the alignment liquid between the diffusion barrier units 43 or between the diffusion barrier units 43 and the bonding pads 40 can be further reduced by virtue of the non-linear liquid flow channel formed between the diffusion barrier units 43 and the blocking effect brought by the side walls of the diffusion barrier units 43, the damage degree of the electrical connection performance of the alignment liquid 70 to the bonding pads 40 is reduced, and the electrical connection performance between the display substrate 100 and the driving IC or the flexible conductive FPC board is ensured.

In an alternative embodiment of the present invention, with continued reference to fig. 6, a plurality of diffusion barrier units 43 located between every two adjacent pads 40 are arranged to extend along the first direction. The first direction is an arrangement direction of the display region 10 and the step region 20, and is also an extension direction of the first spacer region 41, and an orthogonal projection of the diffusion barrier structure 42 on the substrate is located within an orthogonal projection of the first spacer region 41 on the substrate.

Specifically, the diffusion barrier units 43 located in the same first spacer 41 are arranged along the direction consistent with the diffusion and spreading of the alignment liquid, so that the diffusion barrier effect of the diffusion barrier structure 42 on the alignment liquid can be further improved, when the alignment liquid flows between the diffusion barrier structures 42, the alignment liquid is continuously blocked for multiple times by the diffusion barrier units 43 arranged along the first direction, the flow speed is gradually reduced, the diffusion and blocking of the alignment liquid are finally realized, and the diffusion range of the alignment liquid is reduced.

In an alternative embodiment of the present invention, FIG. 7 is an AA' cross-sectional view of the bonding area of the display substrate shown in FIG. 4; fig. 7 shows that a first spacer 41 is located between two adjacent pads 40, the first spacer 41 insulating the two

adjacent pads

40a and 40 b; the first spacer further includes a first sub-spacer 411 and a second sub-spacer 412, an area between an edge of the diffusion barrier cell 43a near the pad 40a to an edge of the pad 40a near the first spacer 41 and an area between an edge of the diffusion barrier cell 43b near the pad 40b to an edge of the pad 40b near the first spacer 41 form the first sub-spacer 411, respectively, and a gap between the diffusion barrier cell 43a and the diffusion barrier cell 43b constitutes the second sub-spacer 412. The distance from the surface of the first sub-spacer 411 away from the base substrate to the base substrate is D1, the distance from the surface of the second sub-spacer 412 away from the base substrate to the base substrate is D2, and the distance from the surface of the diffusion barrier unit 43 away from the base substrate to the base substrate is D3; wherein D1< D3, D2< D3.

Specifically, with continued reference to fig. 7, this embodiment shows that a first sub-spacer 411 and a second sub-spacer 412 are included in the first spacer, wherein the first sub-spacer 411 is located in the region between the edge of the diffusion barrier cell 43a near the pad 40a to the edge of the pad 40a near the first spacer 41 and the region between the edge of the diffusion barrier cell 43b near the pad 40b to the edge of the pad 40b near the first spacer 41, by designing the first sub-spacer, not only the

diffusion barrier cells

43a and 43b can be correspondingly isolated from the

pads

40a and 40b, respectively, but also the surface roughness of the first spacer is further improved by the difference in height between the

diffusion barrier cells

43a and 43b and the upper surface of the first sub-spacer 411, and the flow rate of the alignment liquid is further slowed down; in addition, when the first sub-spacers 411 are respectively disposed between the

diffusion barrier units

43a and 43b and the

pads

40a and 40b, even if the diffusion barrier structure 42 is made of a metal material, it is possible to prevent an electrical connection phenomenon from occurring between the diffusion barrier unit 42 and the pad 40, which may cause a short circuit phenomenon from occurring between the pads 40. The second sub-spacers 412 are located between the

diffusion barrier cells

43a and 43b, and by disposing the second sub-spacers 412 between the diffusion barrier cells 43, the surfaces of the

diffusion barrier cells

43a and 43b and the second sub-spacers 412 can also be located on surfaces of different heights, further improving the surface roughness of the first spacers, slowing down the flow rate of the alignment liquid, and reducing the diffusion range. It should be noted that the heights of the upper surfaces of the first sub-space 411 and the second sub-space 412 are not particularly limited, and may be equal or unequal; however, in terms of whether the surface roughness of the first spacer region can be improved, if the upper surfaces of the first sub-spacer region 411 and the second sub-spacer region 412 are set to be different in height, it is more favorable to improve the surface roughness of the first spacer region, that is, it is more favorable to slow down the flow rate of the alignment liquid and reduce the diffusion range.

In an alternative embodiment of the present invention, FIG. 8 is a cross-sectional view of a bonding area 20 of the display substrate 100 shown in FIG. 4, taken along the AA'; the diffusion barrier unit 43 includes a plurality of stacked film layers including insulating

layers

431 and 432 and a metal layer 433.

Specifically, with continued reference to fig. 8, the diffusion barrier unit 43 provided by the embodiment of the present application includes stacked formation of insulating

layers

431 and 432 and a metal layer 433; the first sub spacer region includes only the insulating layer 431, and the second sub insulating layer includes the insulating

layers

431 and 432; the area where the diffusion barrier cell 43 is disposed is higher than the surface height of both the first and

second sub-spacers

411 and 412 where the diffusion barrier cell 43 is not disposed within the first spacer 41. By such a design, an uneven surface structure may be formed between the first sub-spacer 411, the second sub-spacer 412 and the diffusion barrier unit 43, that is, the surface of the first spacer 41 is made to be an uneven surface form, and the surface roughness is significantly improved.

The diffusion barrier film layer shown in fig. 8 is not limited to merely showing the material properties of the diffusion barrier, and may be formed by a plurality of insulating layers or a plurality of metal layers alone, or may be formed by a combination of a plurality of insulating layers and a plurality of metal layers. In addition, the present embodiment also does not specifically limit the number of specific film layers included in the diffusion barrier structure and the stacking position relationship between the film layers, for example, the number of film layers of the diffusion barrier unit shown in the embodiment of fig. 8 is 3, and in an actual design, the number of film layers may also be 1, 2 or more, and a person skilled in the art may specifically select the number according to actual needs, which is not specifically limited in this application.

In an alternative embodiment of the present invention, with continued reference to fig. 8, the embodiment of the present application shows that above the substrate base plate 401 of the base plate, the film structure of the pad 40 includes a first metal layer 402, a second metal layer 404, an upper conductive layer 406, and a first insulating layer 403 and a second insulating layer 405 between the first metal layer and the second metal layer; the diffusion barrier unit 43 includes insulating

layers

431 and 432 and a metal layer 433; at least one of the insulating

layers

431 and 432 and/or the metal layer 433 in the diffusion barrier unit 43 may be formed in the same process as at least one of the first metal layer 402, the second metal layer 404, the upper conductive layer 406, the first insulating layer 403, and the second insulating layer 405 in the pad 40.

Specifically, with continued reference to fig. 8, in the display substrate provided in the embodiment of the present application, the bonding pad 40 of the bonding region 20 includes a plurality of stacked film layers, for example, including a first metal layer 402, a second metal layer 404, an upper conductive layer 406, a first insulating layer 403 between the first metal layer and the second metal layer, and a second insulating layer 405 between the second metal layer and the upper conductive layer; the diffusion barrier unit 43 includes a first insulating layer 431, a second insulating layer 432, and a metal layer 433; since the diffusion barrier unit 43 has no special requirement for its constituent material, when at least one of the first insulating layer 407, the second insulating layer 408, or the metal layer 409 in the diffusion barrier unit 43 and at least one of the first metal layer 402, the second metal layer 404, the upper conductive layer 406, the first insulating layer 403, or the second insulating layer 405 in the pad 40 are formed in the same manufacturing process, it is not necessary to separately provide a manufacturing process for the diffusion barrier unit 43, which saves the manufacturing steps of the display substrate of the present application and reduces the manufacturing cost of the display substrate.

It should be noted that, in the embodiment shown in fig. 8, only for illustrating that the stacked film layers of the diffusion barrier unit 43 in the display substrate 100 of the present application may be prepared from the same material in the same process as some of the film layers of the pad 40, the preparation process and the operation difficulty of the diffusion barrier structure 42 are saved, and the specific number of the film layers of the pad 40 is not shown, for example, the pad in the embodiment shown in fig. 8 includes 5 film layers, but in actual operation, the number of the film layers of the pad may be all positive integers including 8, as long as the requirements of production and process can be met, and this is not specifically limited in the present application.

In an alternative embodiment of the present invention, with continued reference to fig. 8, the insulating layers in the diffusion barrier unit 43 include a third insulating layer 431 and a fourth insulating layer 432, wherein the fourth insulating layer 432 is located on a side of the third insulating layer 431 away from the substrate base 401, and the metal layer 433 is located on a side of the fourth insulating layer 432 away from the substrate base; specifically, the third insulating layer 431 and the first insulating layer 403 are formed in the same process, and the fourth insulating layer 432 and the second insulating layer 405 are formed in the same process; the metal layer 433 of the diffusion barrier 43 and the upper conductive layer are formed in the same process.

Specifically, with continued reference to fig. 8, in the display substrate 100 provided in the embodiment of the present disclosure, the bonding pad 42 includes a plurality of stacked film layers, for example, including a first metal layer 402, a second metal layer 404, an upper conductive layer 406, a first insulating layer 403 between the first metal layer 402 and the second metal layer 404, and a second insulating layer 405 between the second metal layer 404 and the upper conductive layer 406; the diffusion barrier unit 43 includes a third insulating layer 431, a fourth insulating layer 432, and a metal layer 433, the fourth insulating layer 432 is located on a side of the third insulating layer 431 away from the substrate base 401, and the metal layer 433 is located on a side of the fourth insulating layer 432 away from the substrate base; specifically, the metal layer 433 and the upper conductive layer 406 are formed in the same process, the third insulating layer 431 and the first insulating layer 403 are formed in the same process, and the fourth insulating layer 432 and the second insulating layer 402 are formed in the same process; by the design, the manufacturing process of the diffusion barrier structure can be further simplified, the process difficulty and the manufacturing cost are reduced, and the manufacturing difficulty of the display substrate is reduced.

In an alternative embodiment of the present invention, FIG. 9 is a cross-sectional view of a further AA' of the bonding area of the display substrate shown in FIG. 4; fig. 9 embodies that the insulating layers in the diffusion barrier unit 43 include a fifth insulating layer 434, a sixth insulating layer 436, and a metal layer 435, wherein the sixth insulating layer 434 is located on the side of the fifth insulating layer 436 away from the substrate base 401, and the metal layer 435 is located on the side of the fifth insulating layer 434 close to the sixth insulating layer 436; the structural film layer corresponding to the pad 40 includes a first metal layer 402, a second metal layer 404, an upper conductive layer 406, and a first insulating layer 403 between the first metal layer and the second metal layer 404 and a second insulating layer 405 between the second metal layer 404 and the upper conductive layer. The fifth insulating layer 434 is formed in the same process as the first insulating layer 403, and the sixth insulating layer 436 is formed in the same process as the second insulating layer 405; the metal layer 435 in the diffusion barrier 43 and the second metal layer 404 are fabricated in the same process;

specifically, with continued reference to fig. 9, the diffusion barrier unit 43 includes a fifth insulating layer 434, a sixth insulating layer 436, and a metal layer 435; the fifth insulating layer 434 is located on a side of the sixth insulating layer 436 away from the substrate base 401, and the metal layer 435 is located on a side of the fifth insulating layer 434 close to the sixth insulating layer 436. The structural film layer corresponding to the pad 40 includes a first metal layer 402, a second metal layer 404, an upper conductive layer 406, and a first insulating layer 403 between the first metal layer and the second metal layer 404 and a second insulating layer 405 between the second metal layer 404 and the upper conductive layer. Particularly, when the fifth insulating layer 434 and the sixth insulating layer 435 in the diffusion barrier unit 43 are respectively manufactured in the same process as the first insulating layer 403 and the second insulating layer 405 in the pad 40 in a one-to-one correspondence manner, and the metal layer 435 and the second metal layer 404 in the diffusion barrier unit 43 are manufactured in the same process, all the film layers constituting the diffusion barrier unit 43 can be manufactured by using the same material in the same manufacturing process as a part of the film layers corresponding to the structure of the pad 40, so that the manufacturing process of the diffusion barrier structure can be further simplified, and the manufacturing difficulty and the manufacturing cost of the display substrate can be reduced.

In an alternative embodiment of the present invention, fig. 10 is a cross-sectional view of yet another AA' of the pad 40 area provided by an embodiment of the present application; the diffusion barrier unit 43 includes an insulating layer 437, a third metal layer 438, and a fourth metal layer 439, wherein the third metal layer 438 is located on a side of the insulating layer 437 away from the substrate base 401, and the fourth metal layer 439 is located on a side of the third metal layer 438 away from the insulating layer; the structural film layer corresponding to the pad 40 includes a first metal layer 402, a second metal layer 404, an upper conductive layer 406, and a first insulating layer 403 between the first metal layer 402 and the second metal layer 404 and a second insulating layer 405 between the second metal layer 404 and the upper conductive layer 406. Specifically, the insulating layer in the diffusion barrier unit 43 and the first insulating layer 403 are formed in the same process, the third metal layer 438 and the second metal layer 404 in the diffusion barrier unit 43 are formed in the same process, and the fourth metal layer 439 and the upper conductive layer 406 in the diffusion barrier structure are formed in the same process.

Specifically, with continued reference to fig. 10, the diffusion barrier unit 43 includes an insulating layer 437, a third metal layer 438, and a fourth metal layer 439; the third metal layer 438 is located on the side of the insulating layer away from the substrate 401, and the fourth metal layer 439 is located on the side of the third metal layer 438 away from the insulating layer; the structural film layer corresponding to the pad 40 includes a first metal layer 402, a second metal layer 404, an upper conductive layer 406, and a first insulating layer 403 between the first metal layer 402 and the second metal layer 404 and a second insulating layer 405 between the second metal layer 404 and the upper conductive layer 406. The second metal layer 404 is located on a side of the first insulating layer 403 away from the substrate 401, and the upper conductive layer 406 is located on a side of the second metal layer 404 away from the first insulating layer 403. When the insulating layer in the diffusion barrier structure and the first insulating layer 403 in the pad 40 are manufactured in the same process, the third metal layer 438 in the diffusion barrier structure and the second metal layer 404 in the pad 40 are manufactured in the same process; when the fourth metal layer 439 and the upper conductive layer 406 in the diffusion barrier structure are fabricated in the same process, all the layers that form the diffusion barrier structure can be fabricated by using the same material in the same fabrication process as a portion of the layer corresponding to the pad 40 structure, so that the fabrication process of the diffusion barrier structure can be further simplified, and the fabrication difficulty and the fabrication cost of the display substrate can be reduced.

In an alternative embodiment of the present invention, FIG. 11 illustrates yet another AA' cross-sectional view of the pad 40 area provided by an embodiment of the present application; the diffusion barrier unit 43 includes a seventh insulating layer 4311, an eighth insulating layer 4312 and a metal layer 4310, the seventh insulating layer 4311 is located on a side of the metal layer 4310 away from the substrate base 401, and the eighth insulating layer 4312 is located on a side of the seventh insulating layer 4311 away from the substrate base 401; the pad 40 includes a first metal layer 402, a second metal layer 404, an upper conductive layer 406, and a first insulating layer 403 between the first metal layer 402 and the second metal layer 404 and a second insulating layer 405 between the second metal layer 404 and the upper conductive layer 406. Specifically, the seventh insulating layer 4311 and the first insulating layer 403 are formed in the same process, and the eighth insulating layer 4312 and the second insulating layer 405 are formed in the same process; the metal layer 4310 in the diffusion barrier unit 43 and the first metal layer 402 are manufactured in the same process;

specifically, with reference to fig. 11, the diffusion barrier unit 43 includes a seventh insulating layer 4311, an eighth insulating layer 4312 and a metal layer 4310, wherein the seventh insulating layer 4311 is located on a side of the metal layer 4310 away from the substrate base 401, and the eighth insulating layer 4312 is located on a side of the seventh insulating layer 4311 away from the substrate base 401; the pad 40 includes a first metal layer 402, a second metal layer 404, an upper conductive layer 406, and a first insulating layer 403 between the first metal layer 402 and the second metal layer 404 and a second insulating layer 405 between the second metal layer 404 and the upper conductive layer 406. When the seventh insulating layer 4311 and the eighth insulating layer 4312 in the diffusion barrier unit 43 and the first insulating layer 403 and the second insulating layer 405 in the pad 40 are respectively and correspondingly manufactured in the same process; when the metal layer 4310 in the diffusion barrier unit 43 and the first metal layer 402 in the pad 40 are manufactured in the same process; all the film layers forming the diffusion barrier structure 42 can be made of the same material in the same manufacturing process as a part of the film layers corresponding to the structure of the bonding pad 40, so that the manufacturing process of the diffusion barrier structure can be further simplified, and the manufacturing difficulty and the manufacturing cost of the display substrate can be reduced.

It should be noted that the above embodiment only schematically describes the concept that the film layer structure of the diffusion barrier unit 43 and the film layer structure of the pad 40 can be formed in the same process, and does not form a one-to-one limiting constraint relationship between the number of film layers in the diffusion barrier unit and the number of film layers in the pad 40; as the above embodiment only describes the case that the number of the film layers of the diffusion barrier unit 43 is less than the number of the film layers in the pad 40, but in actual practice, the number of the film layers of the diffusion barrier unit 43 may also be equal to the number of the film layers in the pad 40, and the diffusion barrier unit 43 with the same thickness may be formed by using all the film layer manufacturing processes of the pad 40, and those skilled in the art can make all possible modifications based on the inventive concept according to actual needs.

In an alternative embodiment of the present invention, the display substrate 100 shown in fig. 4 includes a display area 10 and a step area 20, the display area 10 including a plurality of gate lines (not shown) and a plurality of data lines (not shown); the data lines and the gate lines cross to define a sub-pixel (not shown); each sub-pixel includes at least one thin film transistor T (not shown) and a pixel electrode M (not shown). FIG. 12 is a cross-sectional view of the display substrate shown in FIG. 4 taken along the direction B-B'; the thin film transistor T comprises a grid electrode G, a source electrode S, a drain electrode D and an active layer P; an interlayer insulating layer 101 between the gate electrode G and the source electrode S (at the same level as the drain electrode D), and a planarization layer 102 between the source electrode S and the pixel electrode M. The step region 20 includes a bonding region 30, the bonding region 30 includes a plurality of bonding pads 40 arranged along the second direction, and the bonding pads 40 include a first metal layer 402, a second metal layer 404, an upper conductive layer 406, a first insulating layer 403 between the first metal layer 402 and the second metal layer 404, and a second insulating layer 405 between the second metal layer 404 and the upper conductive layer 406. In particular, the first metal layer 402 of the bonding pad 40 and the gate G of the display region are manufactured in the same process; the second metal layer 404 and the source S or the drain D of the TFT are fabricated in the same process; the upper conductive layer 406 and the pixel electrode layer M are formed in the same process; the first insulating layer 403 and the second insulating layer 405 are respectively manufactured in the same process as the interlayer insulating layer and the planarization layer in a one-to-one correspondence manner, or the first insulating layer 403 and the second insulating layer 405 are respectively manufactured in the same process as the planarization layer and the interlayer insulating layer in a one-to-one correspondence manner.

Specifically, the display area 10 of the display substrate 100 shown in fig. 4 includes a plurality of gate lines (not shown) and a plurality of data lines (not shown); the data lines and the gate lines cross to define a sub-pixel (not shown); each sub-pixel includes at least one thin film transistor T (not shown) and a pixel electrode M (not shown); with continued reference to fig. 12, the thin film transistor T includes a gate G, a source S, a drain D and an active layer P; the gate line is electrically coupled to the set gate G, the data line is electrically coupled to the source electrode S or the drain electrode D, and the pixel electrode M is electrically coupled to the drain electrode D or the drain electrode S; the gate lines and the data lines receive driving signals transmitted from the outside and transmit the driving signals to the thin film transistors T and the pixel electrodes M, thereby driving the display of the picture in the display region 10. An interlayer insulating layer 101 between the gate electrode G and the source electrode S (at the same level as the drain electrode D), and a planarization layer 102 disposed between the source electrode and the pixel electrode M. By providing an insulating layer between adjacent conductive layers, short circuits can be avoided. In particular, the first metal layer 402 of the bonding pad 40 and the gate G of the display region are manufactured in the same process; the second metal layer 404 and the source S or the drain D of the TFT are fabricated in the same process; the upper conductive layer 406 and the pixel electrode layer M are formed in the same process; the first insulating layer 403 and the second insulating layer 405 are respectively manufactured in the same process as the interlayer insulating layer 101 and the interlayer insulating layer 102 in a one-to-one correspondence manner; of course, the first insulating layer 403 and the second insulating layer 405 are also formed in the same process as the

interlayer insulating layers

101 and 102, respectively. By the design, the preparation process of the bonding pad 40 can be simplified, and process flow steps are saved; further, the synchronous manufacturing of the display area related structure, the bonding pad 40 and the diffusion barrier structure 42 can be realized in the same process, that is, the manufacturing of the display substrate in the present application can be realized by using the materials and processes of the existing display substrate, and no additional process and step are added, so that the implementation of the technical scheme is facilitated, the process difficulty of manufacturing the display device is simplified, and the operation efficiency is improved.

It should be noted that fig. 12 only exemplarily shows that the thin film transistor T in the display substrate 4 is of a bottom gate structure, but the structure of the display panel in the present application is not limited thereto, and in other embodiments, the thin film transistor T may also be of a top gate structure, which can be set by a person skilled in the art according to practical situations. In addition, fig. 12 only illustrates the film layers related to the invention of the present application in the display substrate 4, but not all the film layers, for example, the display substrate 100 may further include a buffer layer, a touch electrode layer, and other film layers known to those skilled in the art, which are not limited herein and may be set by those skilled in the art according to the actual situation.

Based on the same inventive concept, the present application further provides a display panel, and fig. 13 is a schematic cross-sectional view of the display panel 03 provided in the embodiment of the present application; fig. 13 is a diagram illustrating only the film layers related to the present invention in the display substrate 100, not all of the film layers. With continued reference to fig. 13, the display panel includes a display substrate 100, a counter substrate 200 disposed opposite to the display substrate, and a display medium layer 300, a first alignment film 400 and a second alignment film 500 disposed between the display substrate 100 and the counter substrate 200.

Specifically, with reference to fig. 13, a display panel 03 according to an embodiment of the present disclosure includes a display substrate 100, an opposite substrate 200 and a display medium layer 300, wherein the display substrate 100 and the opposite substrate 200 are bonded together by a glue frame (not shown in fig. 13) to form a box shape; the first alignment film 400 is disposed on a side of the display substrate 100 facing the opposite substrate 200, the second alignment film 500 is disposed on a side of the opposite substrate 200 facing the display substrate 100, and the display medium layer 02 is disposed between the first alignment film 400 and the second alignment film 500. In more detail, the display substrate 100 may be an array substrate, and the opposite substrate 01 may be a color film substrate; alternatively, the display substrate 100 may be a color film substrate, and the opposite substrate 01 may be an array substrate; the display medium may be a liquid crystal or other medium that is operable to selectively transmit light. For the embodiments of the display panel, reference may be made to the embodiments of the display substrate, and repeated descriptions are omitted.

Based on the same inventive concept, an embodiment of the present invention further provides a display device 04, fig. 14 is a top view of a structure of the display device provided in the embodiment of the present invention, and as shown in fig. 14, the display device 04 includes a display panel 03 according to any embodiment of the present invention, so that the display device 04 provided in the embodiment of the present invention has the technical effects of the technical solutions in any embodiment described above, and explanations of the structures and terms that are the same as or corresponding to the embodiments described above are not repeated herein. The display device provided by the embodiment of the invention can be a mobile phone shown in fig. 14, and can also be any electronic product with a display function, including but not limited to the following categories: the touch screen display system comprises a television, a notebook computer, a desktop display, a tablet computer, a digital camera, an intelligent bracelet, intelligent glasses, a vehicle-mounted display, medical equipment, industrial control equipment, a touch interaction terminal and the like, and the embodiment of the invention is not particularly limited in this respect.

In summary, according to the display substrate, the display panel and the display device provided by the invention, the total flow of the alignment liquid diffused in the first spacer area can be reduced by arranging the diffusion barrier structure in the first spacer area between the adjacent bonding pads of the bonding area; furthermore, because a certain height difference exists between the position of the diffusion barrier structure in the first interval area and the position of the diffusion barrier structure which is not arranged, the roughness of the upper surface of the first interval area can be improved due to the diffusion barrier structure, the forward diffusion speed of the alignment liquid along the first interval area is reduced, the diffusion spreading range of the alignment liquid on the step is reduced, the adverse effect of the alignment liquid on the electric connection performance of the welding disc is reduced, the binding effect of the welding disc in the binding area and the FPC or IC is improved, the display effect of the display device is improved, and the phenomenon of uneven display is avoided.

Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A display substrate, comprising: the display substrate comprises a step area and a display area, and the display area and the step area are arranged along a first direction; the step area comprises a binding area, the binding area comprises a plurality of welding pads arranged at intervals, and the welding pads are arranged along a second direction; a first interval area is arranged between every two adjacent bonding pads, and the first interval area insulates and separates two adjacent bonding pads; the first spacer includes a diffusion barrier structure; the orthographic projection of the diffusion barrier structure on the substrate is positioned in the orthographic projection of the first interval area on the substrate; the first direction intersects the second direction.

2. The display substrate of claim 1, wherein any of the diffusion barrier structures comprises at least one diffusion barrier unit; the orthographic projection of the diffusion barrier unit on the plane of the substrate base plate is at least one of a strip shape, a product shape, a fold line shape, an oval shape and a V shape.

3. The display substrate according to claim 2, wherein a plurality of the diffusion barrier units between every two adjacent bonding pads are arranged and extend along the first direction.

4. The display substrate of claim 2, wherein the first spacer further comprises a first sub-spacer and a second sub-spacer; the first sub-spacer is a region between the edge of the diffusion barrier unit close to the pad and the edge of the pad close to the first spacer, and the second sub-spacer is a region between any adjacent diffusion barrier units; the distance from the surface of the first sub-spacer away from the substrate base plate to the substrate base plate is D1, the distance from the surface of the second sub-spacer away from the substrate base plate to the substrate base plate is D2, and the distance from the surface of the diffusion barrier unit away from the substrate base plate to the substrate base plate is D3; wherein D1< D3, D2< D3.

5. The display substrate of claim 2, wherein the diffusion barrier unit comprises a plurality of stacked film layers, the stacked film layers comprising an insulating layer and/or a metal layer.

6. The display substrate according to claim 5, wherein the area film structure corresponding to the pad comprises a first metal layer, a second metal layer, an upper conductive layer, and a first insulating layer and a second insulating layer between the first metal layer and the second metal layer; the insulating layer and/or the metal layer in the diffusion barrier unit and at least one of the first metal layer, the second metal layer, the upper conductive layer, the first insulating layer and the second insulating layer are manufactured in the same manufacturing process.

7. The display substrate according to claim 6, wherein the insulating layer in the diffusion barrier unit comprises a third insulating layer and a fourth insulating layer, the fourth insulating layer is located on a side of the third insulating layer away from a substrate, and the metal layer is located on a side of the fourth insulating layer away from the substrate; the third insulating layer and the first insulating layer are manufactured in the same process; the fourth insulating layer and the second insulating layer are manufactured in the same process; the metal layer in the diffusion barrier unit and the upper conductive layer are manufactured in the same process.

8. The display substrate according to claim 6, wherein the insulating layer in the diffusion barrier unit comprises a fifth insulating layer and a sixth insulating layer, the sixth insulating layer is located on a side of the fifth insulating layer away from the substrate, and the metal layer is located on a side of the sixth insulating layer close to the fifth insulating layer; the fifth insulating layer and the first insulating layer are manufactured in the same process; the sixth insulating layer and the second insulating layer are manufactured in the same process; the metal layer and the second metal layer in the diffusion barrier unit are manufactured in the same process.

9. The display substrate according to claim 6, wherein the metal layer in the diffusion barrier unit comprises a third metal layer and a fourth metal layer, the third metal layer is located on a side of the insulating layer away from the substrate, and the fourth metal layer is located on a side of the third metal layer away from the insulating layer; the insulating layer in the diffusion barrier unit and the first insulating layer are manufactured in the same process; the third metal layer and the second metal layer are manufactured in the same manufacturing process; the fourth metal layer and the upper conductive layer are manufactured in the same process.

10. The display substrate according to claim 6, wherein the insulating layer in the diffusion barrier unit comprises a seventh insulating layer and an eighth insulating layer, the seventh insulating layer is located on a side of the metal layer away from the substrate, and the eighth insulating layer is located on a side of the seventh insulating layer away from the substrate; the seventh insulating layer and the first insulating layer are manufactured in the same process, and the eighth insulating layer and the second insulating layer are manufactured in the same process; the metal layer in the diffusion barrier unit and the first metal layer are manufactured in the same process.

11. The display substrate according to claim 6, wherein the display region comprises a plurality of gate electrodes and a plurality of data lines; the data line and the gate line are crossed to define a sub-pixel; each sub-pixel comprises at least one thin film transistor and a pixel electrode;

the first metal layer and the grid line layer are manufactured in the same manufacturing process; the second metal layer and the source drain layer in the thin film transistor are manufactured in the same process; the upper conductive layer and the pixel electrode layer are manufactured in the same process; an interlayer insulating layer and a planarization layer are arranged between every two adjacent grid line layers, the source drain layers and the pixel electrode layers;

the first insulating layer or the second insulating layer and the interlayer insulating layer or the planarization layer are respectively manufactured in the same process in a one-to-one correspondence manner.

12. The display substrate of claim 1, wherein any of the first spacers comprises the diffusion barrier structure.

13. A display panel comprising the display substrate according to any one of claims 1 to 12, an opposed substrate disposed opposite to the display substrate; and a display medium layer, a first alignment film and a second alignment film between the counter substrate and the display substrate;

14. A display device characterized by comprising the display panel according to claim 13.