CN104777650A - TFT (thin film transistor) array base plate, manufacturing method of TFT array base plate, liquid crystal display panel and display device - Google Patents
TFT (thin film transistor) array base plate, manufacturing method of TFT array base plate, liquid crystal display panel and display device Download PDFInfo
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- CN104777650A CN104777650A CN201510193977.4A CN201510193977A CN104777650A CN 104777650 A CN104777650 A CN 104777650A CN 201510193977 A CN201510193977 A CN 201510193977A CN 104777650 A CN104777650 A CN 104777650A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
Abstract
The invention discloses a TFT (thin film transistor) array base plate, a manufacturing method of the TFT array base plate, a liquid crystal display panel and a display device. The TFT array base plate comprises a substrate base plate, a triangular common electrode metal layer and an insulating layer, wherein the triangular common electrode metal layer is arranged on the substrate base plate and is positioned between two PAD areas, the insulating layer is arranged on the common electrode metal layer, the PAD areas are wiring areas in the periphery of a display area in the TFT array base plate, and at least one first groove is formed in the surface of the insulating layer. The at least one first groove is formed in the insulating layer, so that the gathering of an alignment film solution to an area in which the common electrode metal layer is arranged and the outdiffusion of the alignment film solution can be weakened, the problem of poor clouding caused by small thickness and poor uniformity of an alignment film due to reduction and nonuniform distribution of the alignment film solution in the display area is solved, and the effect of uniform distribution of the alignment film solution in the display area is achieved, so as to avoid poor clouding, and increase the quality of the display panel.
Description
Technical field
The present invention relates to display technique field, espespecially a kind of tft array substrate, its method for making, display panels and display device.
Background technology
Current display panels (Liquid Crystal Display, LCD) sense of rotation and the anglec of rotation by controlling liquid crystal molecule control the light penetrating liquid crystal layer, thus show the image of various gray scale, it has the advantages such as high picture quality, volume be little, lightweight, is widely used in the products such as mobile phone, notebook computer, televisor and display.Under normal circumstances, in order to make the regular arrangement of the long axis direction of most of liquid crystal molecule, thin film transistor (TFT) (Thin Film Transistor, the TFT) array base palte in LCD is formed with alignment film.
Existing tft array substrate, as shown in Figure 1a, underlay substrate 001 is provided with viewing area (AA district) and multiple (for 2 in Fig. 1 a) wiring area (PAD district), region between Mei Liangge PAD district is public electrode metal level 002 region in triangular shape, wherein, the height of public electrode metal level region is less than or equal to the height of viewing area usually; Fig. 1 b is that in Fig. 1 a, public electrode metal level region, along the cross-sectional view in A-A ' direction, comprising: underlay substrate 001, is successively set on the public electrode metal level 002 on underlay substrate 001 and insulation course 003.Usually ink jet printing mode is selected in the process of carrying out alignment film coating, after ink jet printing mode coating, during the diffusion of alignment film solution, public electrode metal level region due to conventional design is triangular shape and integral surface is smooth, alignment film solution is easy to by two ends to two gaps, PAD boundary and the gathering of triangle public electrode metal region and to external diffusion, the alignment film solution of viewing area is caused to reduce and skewness, and then when causing hot setting, alignment film is partially thin and homogeneity is poor, moire easily occurs bad.
Therefore, the alignment film thickness how realizing viewing area is comparatively even, and improving moire bad, is the technical matters that those skilled in the art need solution badly.
Summary of the invention
In view of this, the embodiment of the present invention provides a kind of tft array substrate, its method for making, display panels and display device, the alignment film solution of viewing area can be enable to be uniformly distributed, avoid moire bad, and then improves the quality of display panel.
Therefore, embodiments provide a kind of tft array substrate, comprise: underlay substrate, be arranged on the public electrode metal level in triangular shape between two PAD region on described underlay substrate, and the insulation course be arranged on described public electrode metal level, described PAD region is the wiring area of the periphery, viewing area on described tft array substrate; Wherein,
The surface of described insulation course has at least one first groove.
In a kind of possible implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, also comprise: to be arranged on described insulation course and the transparency conducting layer directly contacted with described insulation course; Described transparency conducting layer has the second groove with the first groove match of described insulation course, and described transparency conducting layer is electrical connected by described first groove and described public electrode metal level.
In a kind of possible implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, the surface at least partially of described public electrode metal level have three groove corresponding with the first groove location of described insulation course.
In a kind of possible implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, the grid of described public electrode metal level and described tft array substrate is arranged with layer;
Described insulation course is included in gate insulation layer and the passivation layer of stacked setting on described underlay substrate, and described at least one, the first groove is between described gate insulation layer and passivation layer.
In a kind of possible implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, also comprise: between described underlay substrate and described public electrode metal level, be provided with the second electrode metal layer.
In a kind of possible implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, the source-drain electrode of described public electrode metal level and described tft array substrate is arranged with layer;
Described insulation course is passivation layer, and described passivation layer has the first groove described at least one.
In a kind of possible implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, the opening shape of described first groove, described second groove and described 3rd groove is strip or poroid.
The embodiment of the present invention additionally provides the method for making of the above-mentioned tft array substrate that a kind of embodiment of the present invention provides, and comprising:
Underlay substrate is formed the figure of public electrode metal level;
Described public electrode metal level is formed the figure with the insulation course of at least one the first groove.
In a kind of possible implementation, the method for making of the above-mentioned tft array substrate that the embodiment of the present invention provides, after described formation has the figure of the insulation course of at least one the first groove, comprising:
Described insulation course is formed the figure with the transparency conducting layer of the second groove, and described transparency conducting layer is electrical connected by described first groove and described public electrode metal level.
The embodiment of the present invention additionally provides a kind of display panels, comprises the subtend substrate and tft array substrate that are oppositely arranged, and the liquid crystal layer between described subtend substrate and tft array substrate; Wherein,
The above-mentioned tft array substrate that described tft array substrate provides for the embodiment of the present invention.
The embodiment of the present invention additionally provides a kind of display device, comprises the above-mentioned display panels that the embodiment of the present invention provides.
The beneficial effect of the embodiment of the present invention comprises:
A kind of tft array substrate that the embodiment of the present invention provides, its method for making, display panels and display device, comprise: underlay substrate, be arranged on the public electrode metal level in triangular shape between two PAD region on underlay substrate, and the insulation course be arranged on public electrode metal level, PAD region is the wiring area of the periphery, viewing area on tft array substrate; Wherein, the surface of insulation course has at least one first groove.Owing to being provided with at least one first groove on the insulating layer, can be used for weakening alignment film solution to the gathering of public electrode metal level region and to external diffusion, the alignment film solution solving viewing area reduces and solution skewness, the alignment film thickness formed is partially thin and homogeneity is poor, produce the problem that moire is bad, reach and the alignment film solution of viewing area is uniformly distributed, avoid moire bad, and then improve the quality of display panel.
Accompanying drawing explanation
Fig. 1 a is the vertical view of tft array substrate in prior art;
Fig. 1 b be in Fig. 1 a public electrode metal level region along the cross-sectional view in A-A ' direction;
Fig. 2 a to Fig. 2 f is respectively the structural representation of the tft array substrate that the embodiment of the present invention provides;
Fig. 3 a to Fig. 3 c is respectively the vertical view of public electrode metal level region in the tft array substrate that the embodiment of the present invention provides;
Fig. 4 to Fig. 7 is respectively the method for making process flow diagram of the tft array substrate that the embodiment of the present invention provides.
Embodiment
Below in conjunction with accompanying drawing, the embodiment of tft array substrate, its method for making and display device that the embodiment of the present invention provides is described in detail.
Wherein, in accompanying drawing, the thickness of each rete and shape do not reflect the actual proportions of tft array substrate, and object just signal illustrates content of the present invention.
Embodiments provide a kind of tft array substrate, as shown in Figure 2 a, comprise: underlay substrate 100, be arranged on the public electrode metal level 200 in triangular shape between two PAD region on underlay substrate 100, and the insulation course 300 be arranged on public electrode metal level 200, the PAD region of indication is the wiring area of the periphery, viewing area on tft array substrate here; Wherein,
The surface of this insulation course 300 has at least one first groove A.
At the above-mentioned tft array substrate that the embodiment of the present invention provides, owing to being provided with at least one first groove A on the insulation course of public electrode metal layer (in patterning processes, the insulation course of the first groove A correspondence position can be etched away completely or partial etching falls, namely the degree of depth of the first groove A is less than or equal to the thickness of insulation course), can be used for weakening alignment film solution to the gathering of public electrode metal level region and to external diffusion, the alignment film solution solving viewing area reduces and solution skewness, the alignment film thickness formed is partially thin and homogeneity is poor, produce the problem that moire is bad, reach and the alignment film solution of viewing area is uniformly distributed, avoid moire bad, and then improve the quality of display panel.
In the specific implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, in order to the resistance of public electrode metal level 200 can be reduced, as shown in Figure 2 b, this array base palte can also comprise: to be arranged on insulation course 300 and the transparency conducting layer 400 directly contacted with insulation course 300, this transparency conducting layer 400 is electrical connected (now by the first groove A and public electrode metal level 200, in patterning processes, the insulation course 300 of the first groove A correspondence position must etch away completely, namely the degree of depth of the first groove A equals the thickness of insulation course 300), like this because transparency conducting layer 400 is electrical connected with public electrode metal level 200 by the first groove A (being equivalent to via hole), the resistance of public electrode metal level 200 can be reduced to greatest extent, raising public electrode metal level 200 transmits signal to noise ratio (S/N ratio) during electric signal, and, this transparency conducting layer 400 should have the second groove B matched with the first groove A of insulation course 300, it should be noted that, the the second groove B matched with the first groove A, specifically refer to that transparency conducting layer 400 directly fills the first groove A, but do not fill up, transparency conducting layer 400 is made to have the second groove B.Surface due to transparency conducting layer 400 has the second groove B, and also effectively can solve alignment film solution spreads uneven problem simultaneously, avoids occurring that moire is bad.
In the specific implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, in order to improve the engagement capacity of transparency conducting layer 400 and public electrode metal level 200, as shown in Figure 2 c, the surface at least partially of this public electrode metal level 200 can have the three groove C corresponding with the first groove A position of insulation course 300 (now, in patterning processes, the top layer of public electrode metal level can fall by partial etching, and namely the total depth of the first groove and the 3rd groove is less than the gross thickness of insulation course and public electrode metal level).It should be noted that, the first groove A is corresponding with the 3rd groove C position, and concrete manufacture craft refers to by same patterning processes, through overexposure, etching, can form the figure of the first groove A and the 3rd groove C simultaneously.
In the specific implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, as shown in Figure 2 d, when public electrode metal level 200 is arranged with layer with the grid of tft array substrate, namely when the material of public electrode metal level 200 is gate metal material, insulation course 300 can be included in gate insulation layer 301 and the passivation layer 302 of stacked setting on underlay substrate 100, be uniformly distributed to enable the alignment film solution of viewing area, avoid moire bad, and upper and lower offset can be increased, at least one first groove A can between gate insulation layer 301 and passivation layer 302, namely gate insulation layer 301 and passivation layer 302 have at least one first groove A altogether, specifically can using gate insulation layer 301 and passivation layer 302 as an overall rete in manufacture craft, pass through patterning processes, this overall rete is formed the figure of the first groove A.
Further, in the specific implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, when public electrode metal level 200 is arranged with layer with the grid of tft array substrate, in order to reduce the resistance of public electrode metal level 200 further, as shown in Figure 2 e, this array base palte can also comprise: between underlay substrate 100 and public electrode metal level 200, be provided with the second electrode metal layer 500.Now TFT substrate can be the TFT substrate that senior super dimension changes in (ADvanced Super Dimension Switch, ADS) panel or plane conversion (In-Plane Switching, IPS) panel.
In the specific implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, as shown in figure 2f, when public electrode metal level 200 is arranged with layer with the source-drain electrode of tft array substrate, namely when the material of public electrode metal level 200 is source-drain electrode metal material, insulation course 300 can be passivation layer 302, now in order to enable the alignment film solution of viewing area be uniformly distributed, avoid moire bad, passivation layer 302 has at least one first groove A.In addition, gate insulation layer 301 can be provided with between underlay substrate 100 and public electrode metal level 200.
In the specific implementation, in the above-mentioned tft array substrate that the embodiment of the present invention provides, the opening shape of the first groove A, the second groove B and the 3rd groove C can be set to strip or poroid.Wherein strip can be strip, striated or other strip, and poroid can be circular hole, ellipse is poroid or other is poroid.The first groove A that multiple opening is strip, the second groove B or the 3rd groove C can according to the mode array arrangements shown in Fig. 3 a, also can be staggered according to the mode shown in Fig. 3 b; The first groove A that multiple opening is circular hole, the second groove B or the 3rd groove C can according to the mode array arrangements shown in Fig. 3 c.
It should be noted that, opening shape, the number of the first groove A, the second groove B and the 3rd groove C, and arrangement mode, arranged usually according to actual needs, in this no limit.
In the specific implementation, generally also on underlay substrate, also can generally be formed with the structures such as thin film transistor (TFT), grid line, data line in the tft array substrate that the embodiment of the present invention provides, these concrete structures can have multiple implementation, in this no limit.
Based on same inventive concept, the embodiment of the present invention additionally provides the method for making of the above-mentioned tft array substrate that a kind of embodiment of the present invention provides, the principle of dealing with problems due to the method is similar to aforementioned a kind of tft array substrate, therefore the enforcement of the method see the enforcement of tft array substrate, can repeat part and repeats no more.
In the specific implementation, the method for making of the tft array substrate that the embodiment of the present invention provides, as shown in Figure 4, specifically comprises the following steps:
S401, on underlay substrate, form the figure of public electrode metal level;
S402, public electrode metal level is formed there is the figure of the insulation course of at least one the first groove.
Further, in the specific implementation, in the method for making of the above-mentioned tft array substrate provided in the embodiment of the present invention, as shown in Figure 5, step S402, after formation has the figure of the insulation course of at least one the first groove, can comprise:
S403, on the insulating layer formation have the figure of the transparency conducting layer of the second groove, and transparency conducting layer is electrical connected by the first groove and public electrode metal level.
The method for making of the tft array substrate provided with two concrete example detailed description embodiment of the present invention below.
Example one: as shown in Figure 6, the concrete steps making tft array substrate are as follows:
S601, on underlay substrate, form the figure of the second electrode metal layer;
In the specific implementation, when substrate during the TFT substrate made is ADS panel or IPS panel, underlay substrate deposits one deck second electrode metal layer, and material can be ITO, is retained the second electrode metal layer corresponding to the public electrode metal level region that will make by patterning processes;
S602, on the underlay substrate being formed with the second electrode metal layer, form the figure of public electrode metal level;
In the specific implementation, the second electrode metal layer deposits one deck gate metal material, by patterning processes, specifically can adopt the method for coating, deposition, sputtering etc., formed in triangular shape and the figure of smooth public electrode metal level;
S603, on public electrode metal level formed there is the gate insulation layer of at least one the first groove and the figure of passivation layer;
In the specific implementation, public electrode metal level deposits one deck gate insulator layer material and passivation material, by same patterning processes, the gate insulator layer material and passivation material that correspond to the first groove location are etched completely; It should be noted that, the top layer part of public electrode metal level can etch away a part in this patterning processes, or, top layer part is not etched, in this no limit;
S604, over the passivation layer formation have the figure of the transparency conducting layer of the second groove, and transparency conducting layer is electrical connected by the first groove and public electrode metal level.
In the specific implementation, Direct precipitation layer of transparent conductive layer over the passivation layer, material can be ITO, now, due to passivation layer being formed with the first groove, the ITO layer of formation can form the second groove with the first matching grooves, and is electrical connected with public electrode metal level.
So far, the above-mentioned steps S601 to S604 provided through example one has produced the above-mentioned tft array substrate that the embodiment of the present invention provides.
Example two: as shown in Figure 7, the concrete steps making tft array substrate are as follows:
S701, on underlay substrate, form the figure of gate insulation layer;
In the specific implementation, underlay substrate deposits one deck gate insulation layer, retained the gate insulation layer corresponding to the public electrode metal level region that will make by patterning processes;
S702, on the underlay substrate being formed with gate insulation layer, form the figure of public electrode metal level;
In the specific implementation, gate insulation layer deposits one deck source-drain electrode metal material, by patterning processes, specifically can adopt the method for coating, deposition, sputtering etc., formed in triangular shape and the figure of smooth public electrode metal level;
S703, public electrode metal level is formed there is the figure of the passivation layer of at least one the first groove;
In the specific implementation, public electrode metal level deposits one deck passivation material, by same patterning processes, the passivation material corresponding to the first groove location is etched completely; It should be noted that, the top layer part of public electrode metal level can etch away a part in this patterning processes, or top layer part does not etch, in this no limit;
S704, over the passivation layer formation have the figure of the transparency conducting layer of the second groove, and transparency conducting layer is electrical connected by the first groove and public electrode metal level.
In the specific implementation, Direct precipitation layer of transparent conductive layer over the passivation layer, material can be ITO, now, due to passivation layer being formed with the first groove, the ITO layer of formation can form the second groove with the first matching grooves, and is electrical connected with public electrode metal level.
So far, the above-mentioned steps S701 to S704 provided through example two has produced the above-mentioned tft array substrate that the embodiment of the present invention provides.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of display panels, the tft array substrate comprising any one mode above-mentioned and the subtend substrate be oppositely arranged with this tft array substrate, and the liquid crystal layer between tft array substrate and subtend substrate.The enforcement of this liquid crystal panel see the embodiment of above-mentioned tft array substrate, can repeat part and repeats no more.
Based on same inventive concept, the embodiment of the present invention additionally provides a kind of display device, comprise the above-mentioned display panels that the embodiment of the present invention provides, this display device can be: any product or parts with Presentation Function such as mobile phone, panel computer, televisor, display, notebook computer, digital album (digital photo frame), navigating instrument.Other requisite ingredient for this display device is and will be understood by those skilled in the art that to have, and does not repeat at this, also should as limitation of the present invention.The enforcement of this display device see the embodiment of above-mentioned display panels and tft array substrate, can repeat part and repeats no more.
A kind of tft array substrate that the embodiment of the present invention provides, its method for making, display panels and display device, comprise: underlay substrate, be arranged on the public electrode metal level in triangular shape between two PAD region on underlay substrate, and the insulation course be arranged on public electrode metal level, PAD region is the wiring area of the periphery, viewing area on tft array substrate; Wherein, the surface of insulation course has at least one first groove.Owing to being provided with at least one first groove on the insulating layer, can be used for weakening alignment film solution to the gathering of public electrode metal level region and to external diffusion, the alignment film solution solving viewing area reduces and solution skewness, the alignment film thickness formed is partially thin and homogeneity is poor, produce the problem that moire is bad, reach and the alignment film solution of viewing area is uniformly distributed, avoid moire bad, and then improve the quality of display panel.
Obviously, those skilled in the art can carry out various change and modification to the present invention and not depart from the spirit and scope of the present invention.Like this, if these amendments of the present invention and modification belong within the scope of the claims in the present invention and equivalent technologies thereof, then the present invention is also intended to comprise these change and modification.
Claims (11)
1. a tft array substrate, comprise: underlay substrate, be arranged on the public electrode metal level in triangular shape between two PAD region on described underlay substrate, and the insulation course be arranged on described public electrode metal level, described PAD region is the wiring area of the periphery, viewing area on described tft array substrate; It is characterized in that, wherein,
The surface of described insulation course has at least one first groove.
2. tft array substrate as claimed in claim 1, is characterized in that, also comprise: to be arranged on described insulation course and the transparency conducting layer directly contacted with described insulation course; Described transparency conducting layer has the second groove with the first groove match of described insulation course, and described transparency conducting layer is electrical connected by described first groove and described public electrode metal level.
3. tft array substrate as claimed in claim 2, is characterized in that the surface at least partially of described public electrode metal level having three groove corresponding with the first groove location of described insulation course.
4. tft array substrate as claimed in claim 1, it is characterized in that, the grid of described public electrode metal level and described tft array substrate is arranged with layer;
Described insulation course is included in gate insulation layer and the passivation layer of stacked setting on described underlay substrate, and described at least one, the first groove is between described gate insulation layer and passivation layer.
5. tft array substrate as claimed in claim 4, is characterized in that, also comprise: between described underlay substrate and described public electrode metal level, be provided with the second electrode metal layer.
6. tft array substrate as claimed in claim 1, it is characterized in that, the source-drain electrode of described public electrode metal level and described tft array substrate is arranged with layer;
Described insulation course is passivation layer, and described passivation layer has the first groove described at least one.
7. the tft array substrate as described in any one of claim 1-6, is characterized in that, the opening shape of described first groove, described second groove and described 3rd groove is strip or poroid.
8. a method for making for the tft array substrate as described in any one of claim 1-7, is characterized in that, comprising:
Underlay substrate is formed the figure of public electrode metal level;
Described public electrode metal level is formed the figure with the insulation course of at least one the first groove.
9. method for making as claimed in claim 8, is characterized in that, after described formation has the figure of the insulation course of at least one the first groove, comprising:
Described insulation course is formed the figure with the transparency conducting layer of the second groove, and described transparency conducting layer is electrical connected by described first groove and described public electrode metal level.
10. a display panels, comprises the subtend substrate and tft array substrate that are oppositely arranged, and the liquid crystal layer between described subtend substrate and tft array substrate; It is characterized in that, wherein,
Described tft array substrate is the tft array substrate described in any one of claim 1-7.
11. 1 kinds of display device, is characterized in that, comprise display panels as claimed in claim 10.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109212845A (en) * | 2018-10-25 | 2019-01-15 | 合肥鑫晟光电科技有限公司 | The preparation method of display base plate, display device and display base plate |
| CN109239991A (en) * | 2018-10-10 | 2019-01-18 | 惠科股份有限公司 | A kind of processing procedure and display panel of display panel |
| CN109324453A (en) * | 2018-09-30 | 2019-02-12 | 惠科股份有限公司 | A kind of display panel and display device |
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