CN110047772A - A kind of probe card, preparation method and chip detecting method - Google Patents
A kind of probe card, preparation method and chip detecting method Download PDFInfo
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- CN110047772A CN110047772A CN201910329260.6A CN201910329260A CN110047772A CN 110047772 A CN110047772 A CN 110047772A CN 201910329260 A CN201910329260 A CN 201910329260A CN 110047772 A CN110047772 A CN 110047772A
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- thermal deformation
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- 239000000523 sample Substances 0.000 title claims abstract description 255
- 238000002360 preparation method Methods 0.000 title claims abstract description 21
- 238000000034 method Methods 0.000 title claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 119
- 239000010410 layer Substances 0.000 claims description 241
- 238000000059 patterning Methods 0.000 claims description 10
- 239000011241 protective layer Substances 0.000 claims description 9
- 238000010438 heat treatment Methods 0.000 claims description 8
- 230000008859 change Effects 0.000 claims description 6
- 230000005611 electricity Effects 0.000 claims description 6
- 238000005259 measurement Methods 0.000 claims description 3
- 238000003032 molecular docking Methods 0.000 abstract 1
- 238000012360 testing method Methods 0.000 description 34
- 238000010586 diagram Methods 0.000 description 12
- 238000005452 bending Methods 0.000 description 10
- 238000013461 design Methods 0.000 description 10
- 238000005530 etching Methods 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 9
- 239000000956 alloy Substances 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 239000011521 glass Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- 230000008021 deposition Effects 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 239000004332 silver Substances 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 150000002739 metals Chemical class 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 4
- 239000004411 aluminium Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
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- 239000000377 silicon dioxide Substances 0.000 description 3
- 238000010998 test method Methods 0.000 description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
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- 238000005566 electron beam evaporation Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
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- 229910052718 tin Inorganic materials 0.000 description 2
- 239000011135 tin Substances 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 239000011701 zinc Substances 0.000 description 2
- 229910052725 zinc Inorganic materials 0.000 description 2
- 229910001339 C alloy Inorganic materials 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
Abstract
The embodiment of the invention discloses a kind of probe card, preparation method and chip detecting methods.The probe card includes: substrate, and patterned substrate layer, positioned at the side of substrate, patterned substrate layer includes at least one vacant slot;At least one cantilever probe, deviates from the side of substrate positioned at patterned substrate layer, and cantilever probe extends to vacant slot and hanging on vacant slot;Cantilever probe includes the first thermal deformation layer, the second thermal deformation layer and conductive contact, first thermal deformation layer is located between patterned substrate layer and the second thermal deformation layer, the thermal expansion coefficient of first thermal deformation layer is greater than the thermal expansion coefficient of the second thermal deformation layer, conductive contact is set to cantilever probe vacantly in one end of vacant slot, first thermal deformation layer and/or the second thermal deformation layer are conductive layer, and conductive layer is electrically connected with conductive contact.The present invention solves the problems, such as that existing probe card docking accuracy is inadequate, is easy poor contact, realizes the automation contact of probe, it is ensured that cantilever probe is effectively contacted with chip to be measured.
Description
Technical field
The present embodiments relate to technical field of manufacturing semiconductors more particularly to a kind of probe cards, preparation method and chip
Test method.
Background technique
It needs to carry out various tests in each stage of semiconductor devices manufacture.For example, in order in encapsulation semiconductor devices
The electrical characteristics for testing semiconductor devices before can use test equipment by including the probe card of fine probing needles as with half
The interface of conductor device connection, specifically, the probe of probe card can contact realization electrical connection with semiconductor devices top electrode, from
And it is transferred to electric signal on semiconductor devices from tester, and defeated by semiconductor devices in response to the electric signal of transmission
Signal out is detected and analyzes to determine whether semiconductor devices is normal.For example, in micro- light emitting diode (Micro Light
Emitting Diode, Micro-LED) display panel field, need batch shift Micro-LED chip to drive backboard,
Before implementing batch transfer, need to test Micro-LED chip array using probe card, it is normal to calibrate electric property
Chip.
And as the increase of number of electrodes in semiconductor chip and further miniaturization lead to the pitch between electrode
Lasting to reduce, particularly with Micro-LED chip, electrode size is small, surface texture is complicated, and height rises and falls, traditional probe
Use mechanical movement in a manner of contact chip electrode it is difficult to ensure that accuracy, is stranded so that test process middle probe is aligned
Difficulty, to affect testing efficiency.
Summary of the invention
The present invention provides a kind of probe card, preparation method and chip detecting method, with realize probe and chip to be measured from
Dynamic electrical contact, while guaranteeing that probe is contacted with the effective of chip to be measured.
The present invention provides a kind of probe card, comprising:
Substrate,
Patterned substrate layer, positioned at the side of the substrate, the patterned substrate layer includes at least one vacant slot;
At least one cantilever probe deviates from the side of the substrate, the cantilever probe positioned at the patterned substrate layer
Extend to the vacant slot and hanging on the vacant slot;
The cantilever probe includes the first thermal deformation layer, the second thermal deformation layer and conductive contact, the first thermal deformation layer
Between the patterned substrate layer and the second thermal deformation layer, the thermal expansion coefficient of the first thermal deformation layer is greater than institute
The thermal expansion coefficient of the second thermal deformation layer is stated, the conductive contact is set to the cantilever probe vacantly the one of the vacant slot
End, the first thermal deformation layer and/or the second thermal deformation layer are conductive layer, and the conductive layer is electrically connected with the conductive contact
It connects.
Probe card as described above, optionally, at least one described cantilever probe and at least one described vacant slot are one by one
It is correspondingly arranged.
Probe card as described above, optionally, the first thermal deformation layer be conductive layer, the cantilever probe further include to
Run through the conductive contact slot of the second thermal deformation layer less;The conductive contact is located in the conductive contact slot, the conduction
Contact is electrically connected with the first thermal deformation layer.
Probe card as described above, optionally, the thermal expansion system of the first thermal deformation layer and the second thermal deformation layer
The range of several differences is 10 × 10-6/℃-50×10-6/℃。
Probe card as described above, optionally, the thermal expansion coefficient of the first thermal deformation layer are greater than 15 × 10-6/ DEG C, institute
The thermal expansion coefficient of the second thermal deformation layer is stated less than 10 × 10-6/℃。
Probe card as described above, optionally, the length range of the cantilever probe in the direction of extension are 50-2000 μ
M is being 10-400 μm perpendicular to the length range on extending direction.
The present invention also provides a kind of preparation methods of probe card, comprising:
One substrate is provided;
Substrate layer is formed in the side of the substrate;
The first thermal deformation layer is formed away from the side of the substrate in the substrate layer;
The second thermal deformation layer is formed away from the side of the substrate layer in the first thermal deformation layer, wherein described first
The thermal expansion coefficient of thermal deformation layer is greater than the thermal expansion coefficient of the second thermal deformation layer, the first thermal deformation layer and/or institute
Stating the second thermal deformation layer is conductive layer;
The first thermal deformation layer and the second thermal deformation layer are patterned, at least one probe structure is formed;
Conductive contact, the conductive contact and the first thermal deformation layer and the conduction are formed on the probe structure
Layer electrical connection, forms cantilever probe;
Patterning is carried out to the substrate layer and forms patterned substrate layer, the patterned substrate layer includes at least one sky
Set slot, the cantilever probe extends to the vacant slot and hanging in the vacant slot.
The preparation method of probe card as described above optionally carries out patterning formation figure to the substrate layer described
Before patterned substrate layer, further includes:
Protective layer is formed on the cantilever probe surface;
It is described the substrate layer is carried out patterning form patterned substrate layer after, further includes:
Remove the protective layer on the cantilever probe surface.
The present invention also provides a kind of chip detecting methods, using as above any probe card, comprising:
The probe card is moved to the position of the cantilever probe face chip electrode to be measured in the probe card;
The cantilever probe is heated until the conductive contact on thermal deformation and the cantilever probe occurs for the cantilever probe
It is in electrical contact the electrode of the chip to be measured.
Chip detecting method as described above, optionally, in the heating cantilever probe until the cantilever probe
The conductive contact occurred on thermal deformation and the cantilever probe is in electrical contact after the electrode of the chip to be measured, further includes:
By the cantilever probe, electricity performance measurement is carried out at least one described chip to be measured.
Probe card, preparation method and chip detecting method provided in an embodiment of the present invention, by the way that pattern is arranged on substrate
Change substrate layer, wherein patterned substrate layer is provided at least one vacant slot, and it is outstanding that at least one is arranged on patterned substrate layer
Arm probe can be bent when the cantilever design formed on vacant slot is in thermal deformation using cantilever probe, and pass through setting
The thermal expansion coefficient of the first thermal deformation layer in cantilever probe is greater than the thermal expansion coefficient of the second thermal deformation layer, so that cantilever probe
It is realized by thermal deformation to the bending for deviating from substrate side, finally to realize that cantilever probe and the self-action of chip to be measured contact,
Solve the problems, such as existing probe card mechanically dock accuracy not enough, be easy to produce poor contact, realize probe alignment and connect
The automation of touching, and can guarantee that cantilever probe is contacted with the effective of chip to be measured, it is ensured that the testing efficiency of chip facilitates
It realizes the microchip especially batch testing of Micro-LED, improves the production efficiency of microchip.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of probe card provided in an embodiment of the present invention;
Fig. 2 is the schematic diagram of the section structure of the probe card shown in Fig. 1 along AA ';
Fig. 3 is the side view of probe card shown in FIG. 1;
Fig. 4 is the structural schematic diagram of another probe card provided in an embodiment of the present invention;
Fig. 5 is the schematic diagram of the section structure of another probe card provided in an embodiment of the present invention;
Fig. 6 is a kind of flow chart of the preparation method of probe card provided in an embodiment of the present invention;
Fig. 7 is the flow chart of the preparation method of another probe card provided in an embodiment of the present invention;
Fig. 8 is a kind of flow chart of chip detecting method provided in an embodiment of the present invention;
Fig. 9 is a kind of chip testing structural schematic diagram provided in an embodiment of the present invention;
Figure 10 is another chip testing structural schematic diagram provided in an embodiment of the present invention.
Description of symbols: 10- substrate, 20- patterned substrate layer, the vacant slot of 21-, 30- cantilever probe, the first heat of 31-
Deformation layer, 32- the second thermal deformation layer, 33- conductive contact, 34- conductive contact slot.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with the embodiment of the present invention, to this
Technical solution in inventive embodiments is clearly and completely described, it is clear that described embodiment is that a part of the invention is real
Example is applied, instead of all the embodiments.Based on the embodiments of the present invention, those of ordinary skill in the art are not making creation
Property labour under the premise of every other embodiment obtained, shall fall within the protection scope of the present invention.In the absence of conflict, under
The feature in embodiment and embodiment stated can be combined with each other.
As described in background, the measuring accuracy of probe card is not able to satisfy existing micromation chip in the prior art
Test, main reason is that traditional probe card frequently with mechanical movable probe with contact chip electrode, and it is gradually small-sized
The chip size of change becomes smaller, and chip surface structure becomes more sophisticated, and is easy to cause alignment tired when contacting using mechanical movable
The problems such as hardly possible, poor contact, therefore the testing efficiency as microchips such as Micro-LED is caused to decline.
Based on the above reasons, the present invention provides a kind of probe card, and Fig. 1 is a kind of probe card provided in an embodiment of the present invention
Structural schematic diagram, Fig. 2 are the schematic diagram of the section structure of the probe card shown in Fig. 1 along AA ', and Fig. 3 is the side view of probe card shown in FIG. 1
Figure, with reference to Fig. 1-3, which includes substrate 10, patterned substrate layer 20, positioned at the side of substrate 10, patterned substrate layer
20 include at least one vacant slot 21;At least one cantilever probe 30 deviates from the side of substrate 10 positioned at patterned substrate layer 20,
Cantilever probe 30 extends to vacant slot 21 and hanging on vacant slot 21;Cantilever probe 30 includes the first thermal deformation layer 31, second
Thermal deformation layer 32 and conductive contact 33, the first thermal deformation layer 31 are located between patterned substrate layer 20 and the second thermal deformation layer 32,
The thermal expansion coefficient of first thermal deformation layer 31 is greater than the thermal expansion coefficient of the second thermal deformation layer 32, and conductive contact 33 is set to cantilever
For probe 30 vacantly in one end of vacant slot 21, the first thermal deformation layer 31 and/or the second thermal deformation layer 32 are conductive layer, conductive layer with
Conductive contact 33 is electrically connected.As shown, the second thermal deformation layer 31 is conductive layer, conductive contact 33 is arranged in the second thermal deformation layer
31 surface.
Wherein, substrate 10 is made of rigid, and to carry the probe structure being arranged thereon, 10 material of substrate can be selected
With silicon or glass etc., patterned substrate layer 20 is then the substrate layer with vacant slot 21 formed on the substrate 10, and substrate layer can
The materials such as silica or metal are used to be made using the substrate of silicon or glass with corresponding, the purpose master of the patterned substrate layer 20
It is to form vacant slot 21, so that probe be made to form cantilever design, cantilever probe 30 is then due to partially vacantly in vacant slot 21
On, therefore the hanging part of the cantilever probe 30 can carry out free bend, to guarantee chip electricity in bending and to be tested
Pole contacts and is tested.
The function of 30 free bend of cantilever probe is using the realization of thermal deformation principle, specifically, first in cantilever probe 30
Deformation occurs for meeting when heated for thermal deformation layer 31 and the second thermal deformation layer 32, and due to the first thermal deformation layer 31 and the second thermal deformation
The thermal expansion coefficient of layer 32 is different, and when 30 thermal deformation of cantilever probe bends, and the curved direction of cantilever probe 30 takes
Certainly in the size of the first thermal deformation layer 31 and the thermal expansion coefficient of the second thermal deformation layer 32.Pass through the first thermal deformation layer 31 of setting
Thermal expansion coefficient is greater than the thermal expansion coefficient of the second thermal deformation layer 32, it is ensured that in heating, cantilever probe 30 is to away from base
The curving of plate 10.In addition, the first thermal deformation layer and/or the second thermal deformation layer need to be prepared using conductive material, using as leading
Electric layer realization is electrically connected with conductive contact, can be to core in the 33 contact chip electrode of conductive contact on cantilever probe 30
Piece carries out the transmission of electric signal, realizes the test to chip.
Probe card provided in an embodiment of the present invention, by the way that patterned substrate layer, wherein patterned substrate are arranged on substrate
Layer is provided at least one vacant slot, at least one cantilever probe is arranged on patterned substrate layer, using cantilever probe in sky
Set the cantilever design formed on slot can be bent in thermal deformation, and pass through the first thermal deformation layer in setting cantilever probe
Thermal expansion coefficient be greater than the second thermal deformation layer thermal expansion coefficient so that cantilever probe by thermal deformation realize to deviate from substrate
It is mechanically right to solve existing probe card finally to realize that cantilever probe and the self-action of chip to be measured contact for the bending of side
Connect accuracy not enough, be easy to produce the problem of poor contact, realize the automation of probe alignment contact, and can guarantee to hang
Arm probe is effectively contacted with chip to be measured, it is ensured that the testing efficiency of chip helps to realize microchip especially Micro-
The batch testing of LED improves the production efficiency of microchip.
It should be noted that should still be provided with circuit structure in addition to cantilever probe structure shown in figure in the probe card,
To pass through each cantilever probe on the test equipment that circuit is installed with probe card, guarantee that test equipment is sent out to chip to be tested
Send or receive test signal.Also, the rectangular shape of probe card shown in figure is only to illustrate, and actual probe card shape answers root
Designed according to the shape of chip or chip array, for the chip prepared by wafer, usually the probe card shape that uses of its correspondence for
It is round.In addition to this, herein with no restrictions, those skilled in the art can basis for the cantilever probe quantity in probe card and distribution
Practical institute's chip structure to be tested is designed and is laid out.
In probe card as shown in Figure 1, since the position of multiple cantilever probes 30 is adjacent, multiple cantilevers can be set
Probe 30 shares a vacant slot 21, i.e., multiple cantilever probes 30 are hanging on same vacant slot 21, at this time in patterned substrate
When forming vacant slot 21 on layer 20, it is possible to reduce the quantity of vacant slot 21 simplifies the technique for etching multiple vacant slots 21.And it is practical
In some cases, the position of cantilever probe and non-conterminous, for this kind of situation, the embodiment of the invention also provides a kind of probes
Card.Fig. 4 is the structural schematic diagram of another probe card provided in an embodiment of the present invention, with reference to Fig. 4, optionally, in the probe card
At least one cantilever probe 30 and at least one vacant slot 21 being arranged are arranged in a one-to-one correspondence.By the way that each cantilever probe 30 is arranged
It is corresponding with a vacant slot 21, it is ensured that it is single to guarantee that each cantilever design has there are cantilever design for each cantilever probe 30
The space of only free bend.
Fig. 5 is the schematic diagram of the section structure of another probe card provided in an embodiment of the present invention, with reference to Fig. 5, the probe card
In cantilever probe 30 in, the first thermal deformation layer 31 is conductive layer, and cantilever probe 30 further includes at least through the second thermal deformation layer
32 conductive contact slot 34;Conductive contact 33 is located in conductive contact slot 34, and conductive contact 33 is electrically connected with the first thermal deformation layer 31
It connects.
Wherein, the first thermal deformation layer 31 of setting is that conductive layer can use the direct contact patternsization lining of the first thermal deformation layer 31
Bottom 20, when circuit structure is arranged on patterned substrate layer 20, conductive layer can be contacted directly with circuit structure, and for the
Conductive layer can be set into two thermal deformation layers 32, may be set to be non-conductive layer, when the second thermal deformation layer 32 is non-conductive layer
When, it needs conductive contact 33 being electrically connected conductive layer, so the settable conductive contact slot 34 for running through the second thermal deformation layer 32.When
So, in the case where the second thermal deformation layer 32 is similarly conductive layer, conductive contact can also be set in the second thermal deformation layer 32
On the one hand slot 34 may be implemented being electrically connected for conductive contact 33 and the first thermal deformation layer 31, on the other hand can increase conductive touching
The contact area of point 33 and the second thermal deformation layer 32 guarantees electro-contact effect.Herein it should be noted that in order to guarantee conductive touching
The electric conductivity of point 33 and preferably inoxidizability, conductive contact 33 can be made of copper, silver, tin, silver and its alloy.
Further, in order to guarantee cantilever probe in probe card active exposure chip ability, the first thermal deformation layer with
The difference of the thermal expansion coefficient of second thermal deformation layer should be greater than or be equal to 10 × 10-6/ DEG C, i.e. the first thermal deformation layer and the second hot shape
Change layer can be when heating up mutually synthermal, and thermal deformation has more apparent difference, at this time since two layers of thermal deformation is different, from
And bending by a relatively large margin is formed, the effect for more significantly touching chip automatically also can be thus achieved.Also, consider temperature
Degree of regulation is relatively low, therefore, significantly deformation was generated in temperature range by a small margin in order to avoid cantilever probe and
Keep deformation quantity out of control, the difference that the first thermal deformation layer can be set in the thermal expansion coefficient of the second thermal deformation layer is less than or equal to 50
×10-6/ DEG C, to adjust effective and suitable control cantilever probe bending degree by temperature, realize cantilever probe and chip
Active exposure.Specifically, the thermal expansion coefficient of the first thermal deformation layer should be greater than 15 × 10-6/ DEG C, and the heat of the second thermal deformation layer
The coefficient of expansion should be less than 10 × 10-6/ DEG C, the thermal expansion coefficient of the first thermal deformation layer and the second thermal deformation layer exists apparent at this time
Difference, when heating up, the deformation of cantilever probe can be more obvious.Wherein, the biggish for thermal expansion coefficient first hot shape
Change layer can be greater than 15 × 10 using metals and its alloys such as copper, aluminium, silver, manganese, lead, zinc or other thermal expansion coefficients-6/℃
Alloy material, and the second thermal deformation layer can select the metals such as molybdenum, tungsten, chromium, platinum and its alloy or any thermal expansion coefficient
Less than 10 × 10-6/ DEG C alloy material.
In probe card provided in an embodiment of the present invention, the preparation of cantilever probe can be by the way of by material deposition film forming
It is formed, therefore, the size of cantilever probe can achieve micron dimension.With continued reference to Fig. 4, optionally, settable cantilever probe exists
Length L range on extending direction is 50-2000 μm, is being 10-400 μm perpendicular to the length D range on extending direction, i.e., outstanding
The length of arm probe is at 50-2000 μm, and width is at 10-400 μm.Micron order ruler is formed by way of being arranged using deposition film forming
Very little cantilever probe can cooperate the test realized to microchip such as Micro-LED, also, due to the ruler of cantilever probe
It is very little relatively small, therefore can test simultaneously compared with multi-chip, batch testing is carried out to microchip, to improve the test of chip
Efficiency.
The embodiment of the invention also provides a kind of preparation method of probe card, Fig. 6 is one kind provided in an embodiment of the present invention
The flow chart of the preparation method of probe card, with reference to Fig. 2 and 6, the preparation method of the probe card includes:
S110, a substrate is provided.
The substrate selects rigid substrates, such as silicon substrate or glass substrate.
S120, substrate layer is formed in the side of substrate.
Corresponding and silicon substrate and glass substrate, substrate layer can be made respectively of silica material and metal material, right
In silicon substrate, the substrate layer to form silica can be aoxidized to substrate surface;For glass substrate, can adopt on the glass substrate
A metallic diaphragm is formed with modes such as depositions.
S130, the first thermal deformation layer is formed away from the side of substrate in substrate layer.
First thermal deformation layer material can select the metals such as copper, aluminium, silver, manganese, lead, zinc and its alloy, and can use
The mode of the depositions such as thermal evaporation, electron beam evaporation, sputtering, chemical plating, plating film forming is formed, and the first thermal deformation layer at this time is one
Flood structure.
S140, the second thermal deformation layer is formed away from the side of substrate layer in the first thermal deformation layer, wherein the first thermal deformation layer
Thermal expansion coefficient be greater than the thermal expansion coefficient of the second thermal deformation layer, the first thermal deformation layer and/or the second thermal deformation layer are conduction
Layer.
Similarly, the second thermal deformation layer can also be using the deposition such as thermal evaporation, electron beam evaporation, sputtering, chemical plating, plating
The mode of film forming is formed, and the second thermal deformation layer can then select the metals such as molybdenum, tungsten, chromium, platinum and its alloy, the hot shape of second at this time
Change layer is similarly a flood structure.
S150, the first thermal deformation layer and the second thermal deformation layer are patterned, forms at least one probe structure.
The patterning of first thermal deformation layer and the second thermal deformation layer can be realized using photoetching process, lithography mask version
Structure is to determine the foundation structure of cantilever probe, and the length and width of cantilever probe can be arranged by design lithography mask version at this time
Degree.
S160, conductive contact is formed on probe structure, conductive contact is electrically connected with the first thermal deformation layer and conductive layer, shape
At cantilever probe.
Copper, aluminium, tin and silver can be used in conductive contact or its alloy material is formed, and forms the complete of cantilever probe at this time
Structure.
S170, to substrate layer carry out patterning form patterned substrate layer, patterned substrate layer includes that at least one is vacant
Slot, cantilever probe extend to vacant slot and hanging in vacant slot.
The substrate layer portion that cantilever probe covers is emptied when substantial to the patterning process of substrate layer, to realize outstanding
The part of arm probe is hanging, to realize the flexible of cantilever probe.
The preparation method of probe card provided in an embodiment of the present invention, by sequentially forming substrate layer, the first heat on substrate
Deformation layer, the second thermal deformation layer and successively the first thermal deformation layer, the second thermal deformation layer and substrate layer are patterned again, from
And the structure of cantilever probe is formed, and keep the part of cantilever probe hanging in the vacant slot that substrate layer is formed, finally prepare shape
At a probe card, and in the probe card, through the cantilever design that is formed on vacant slot using cantilever probe in thermal deformation
It can be bent, and the second thermal deformation layer is greater than by the thermal expansion coefficient of the first thermal deformation layer in setting cantilever probe
Thermal expansion coefficient, so that cantilever probe is realized by thermal deformation to the bending for deviating from substrate side, finally to realize cantilever probe
Contacted with the self-action of chip to be measured, solve existing probe card mechanically dock accuracy not enough, be easy to produce poor contact
The problem of, the automation of probe alignment contact is realized, and can guarantee that cantilever probe is contacted with the effective of chip to be measured, really
The testing efficiency for protecting chip, helps to realize the microchip especially batch testing of Micro-LED, improves the life of microchip
At efficiency.
It should be noted that in preparation method as provided above, the sequencing of part steps and without limitation, this field
Technical staff can be adjusted according to the actual situation.Pair illustratively, step S160 also can be set before step S150, i.e.,
Conductive touching should be formed in the corresponding position on the probe structure that the first thermal deformation layer and the second thermal deformation layer need to form, first setting
Point, then pattern the first thermal deformation layer and the second thermal deformation layer formation cantilever probe.In addition, in step S160, for first
The case where thermal deformation layer is conductive layer, needs to pattern in S150, to the first thermal deformation layer and the second thermal deformation layer, is formed
After at least one probe structure, the conductive contact slot at least running through the second thermal deformation layer is formed in one end of probe structure;And
Step S160, conductive contact is formed on probe structure, be should be and is formed conductive contact in conductive contact slot, conductive contact and
The electrical connection of one thermal deformation layer.
In addition step S170, to substrate layer carry out patterning form patterned substrate layer when, can use photoetching side
Formula is formed, and needs to pattern substrate layer using wet etching or dry etching in photoetching, forms vacant slot, at this time
When wet etching or dry etching, etching solution or etching gas may there is also etching effects to cantilever probe, it is therefore desirable to
The cantilever probe of formation is protected.The embodiment of the invention also provides a kind of preparation method of probe card, Fig. 7 is the present invention
The flow chart of the preparation method for another probe card that embodiment provides, with reference to Fig. 7, the preparation method of the probe card includes:
S210, a substrate is provided.
S220, substrate layer is formed in the side of substrate.
S230, the first thermal deformation layer is formed away from the side of substrate in substrate layer.
S240, the second thermal deformation layer is formed away from the side of substrate layer in the first thermal deformation layer, wherein the first thermal deformation layer
Thermal expansion coefficient be greater than the thermal expansion coefficient of the second thermal deformation layer, the first thermal deformation layer and/or the second thermal deformation layer are conduction
Layer.
S250, the first thermal deformation layer and the second thermal deformation layer are patterned, forms at least one probe structure.
S260, conductive contact is formed on probe structure, conductive contact is electrically connected with the first thermal deformation layer and conductive layer, shape
At cantilever probe.
S270, protective layer is formed on cantilever probe surface.
Wherein the protective layer on cantilever probe surface needs to use the material of be not easy to be etched solution or etching gas corrosion, shows
Can example property it use photoresist as protective layer.Also, the upper surface and side surface of cantilever probe are both needed to be protected, and
When etching substrate layer, etching solution and etching gas are after having etched substrate layer and having formed vacant slot further from cantilever in order to prevent
The lower surface of probe etches cantilever probe, needs to carry out strictly handle to the concentration and etch period of etching solution, etching gas
Control, those skilled in the art data can rationally design according to specific experiments.
S280, to substrate layer carry out patterning form patterned substrate layer, patterned substrate layer includes that at least one is vacant
Slot, cantilever probe extend to vacant slot and hanging in vacant slot.
S290, the protective layer for removing cantilever probe surface.
Protective layer organic for photoresist etc. usually can be cleaned and be removed using organic solution, not done herein
Limitation.
The embodiment of the invention also provides a kind of chip detecting method, Fig. 8 is a kind of chip provided in an embodiment of the present invention
The flow chart of test method, with reference to any one probe card that Fig. 8, the chip detecting method use embodiment as above to provide, tool
Body includes:
The position of S310, the cantilever probe face chip electrode to be measured being moved to probe card in probe card.
Fig. 9 is a kind of chip testing structural schematic diagram provided in an embodiment of the present invention, with reference to Fig. 9, wherein the probe of selection
In card, the quantity of cantilever probe 30 and distribution should be corresponding with the electrode of chip to be measured, in test, need first to carry out probe card
It preliminarily moves, i.e., by Mechanical Moving by the electrode 40 of 30 one chip to be measured of face of cantilever probe in probe card, at this time
Each cantilever probe 30 is at a distance from an electrode 40 in controlled range.
S320, heated cantilever probe until cantilever probe occur the conductive contact electrical contact on thermal deformation and cantilever probe to
Survey the electrode of chip.
Figure 10 is another chip testing structural schematic diagram provided in an embodiment of the present invention, outstanding by heating with reference to Figure 10
The mode of arm probe 30 makes cantilever probe 30 generate thermal deformation, the environment temperature locating for probe card can usually be adjusted,
Cantilever probe 30 occurs to be bent step by step at ambient temperature, and by the way that outlet temperature value is rationally arranged, it can be ensured that cantilever
The bending degree of probe 30 so that cantilever probe after bending 30 is contacted with an electrode 40, and guarantees cantilever probe 30 and electricity
The contact of pole 40 is in a more closely electrical contact.Specifically, the relationship of the bending degree for cantilever probe 30 and temperature is bent
Line can be tested and be recorded in advance by experiment, thus cantilever probe 30 and electrode 40 reserved in matching step S310
Heating temperature is rationally arranged in distance.
It, can be by outstanding after step 320 makes the electrode of conductive contact contact measured chip of cantilever probe by heating
Arm probe carries out the measurement of electric property at least one chip to be measured.It illustratively, can be by the test that is connect with probe card
Instrument to each cantilever probe send test signal, then by cantilever probe receive feedback signal with determination chip to be measured whether
Normally, those skilled in the art can also design test mode with specific reference to the structure of chip to be measured, seldom repeat herein.
The test method of chip provided in an embodiment of the present invention is carried out by using probe card provided in an embodiment of the present invention
The test of chip can be bent when the cantilever design formed on vacant slot is in thermal deformation using cantilever probe, and pass through
The thermal expansion coefficient that the first thermal deformation layer in cantilever probe is arranged is greater than the thermal expansion coefficient of the second thermal deformation layer, so that cantilever
Probe is realized by thermal deformation to the bending for deviating from substrate side, and when testing first by the way that probe card is moved to probe
Cantilever probe is directed to the position of chip electrode to be measured in card, then by heated cantilever probe until thermal deformation occurs for cantilever probe
And the conductive contact on cantilever probe is in electrical contact the electrode of chip to be measured, and the self-action of cantilever probe Yu chip to be measured may be implemented
Contact, solve the problems, such as existing probe card mechanically dock accuracy not enough, be easy to produce poor contact, realize probe pair
The automation of quasi- contact, and can guarantee that cantilever probe is contacted with the effective of chip to be measured, it is ensured that the testing efficiency of chip has
Help realize the microchip especially batch testing of Micro-LED, improves the production efficiency of microchip.
In addition, in the present invention unless specifically defined or limited otherwise, the arts such as term " connected ", " connection ", " stacking "
Language shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or integral;It can be direct phase
Even, can also indirectly connected through an intermediary, the interaction that can be connection or two elements inside two elements is closed
System.For the ordinary skill in the art, above-mentioned term in the present invention specific can be understood as the case may be
Meaning.
Note that the above is only a better embodiment of the present invention and the applied technical principle.It will be appreciated by those skilled in the art that
The invention is not limited to the specific embodiments described herein, be able to carry out for a person skilled in the art it is various it is apparent variation,
It readjusts, be combined with each other and substitutes without departing from protection scope of the present invention.Therefore, although by above embodiments to this
Invention is described in further detail, but the present invention is not limited to the above embodiments only, is not departing from present inventive concept
In the case of, it can also include more other equivalent embodiments, and the scope of the invention is determined by the scope of the appended claims.
Claims (10)
1. a kind of probe card characterized by comprising
Substrate,
Patterned substrate layer, positioned at the side of the substrate, the patterned substrate layer includes at least one vacant slot;
At least one cantilever probe, the side of the substrate is deviated from positioned at the patterned substrate layer, and the cantilever probe extends
It is to the vacant slot and hanging on the vacant slot;
The cantilever probe includes the first thermal deformation layer, the second thermal deformation layer and conductive contact, and the first thermal deformation layer is located at
Between the patterned substrate layer and the second thermal deformation layer, the thermal expansion coefficient of the first thermal deformation layer is greater than described the
The thermal expansion coefficient of two thermal deformation layers, the conductive contact are set to the cantilever probe vacantly in one end of the vacant slot,
The first thermal deformation layer and/or the second thermal deformation layer are conductive layer, and the conductive layer is electrically connected with the conductive contact.
2. probe card according to claim 1, which is characterized in that at least one described cantilever probe and at least one described in
Vacant slot is arranged in a one-to-one correspondence.
3. probe card according to claim 1, which is characterized in that the first thermal deformation layer is conductive layer, the cantilever
Probe further includes the conductive contact slot at least running through the second thermal deformation layer;The conductive contact is located at the conductive contact slot
In, the conductive contact is electrically connected with the first thermal deformation layer.
4. probe card according to claim 1 to 3, which is characterized in that the first thermal deformation layer and second heat
The difference range of the thermal expansion coefficient of deformation layer is 10 × 10-6/℃-50×10-6/℃。
5. probe card according to claim 4, which is characterized in that the thermal expansion coefficient of the first thermal deformation layer is greater than 15
×10-6/ DEG C, the thermal expansion coefficient of the second thermal deformation layer is less than 10 × 10-6/℃。
6. probe card according to claim 1, which is characterized in that the length range of the cantilever probe in the direction of extension
It is 50-2000 μm, is being 10-400 μm perpendicular to the length range on extending direction.
7. a kind of preparation method of probe card characterized by comprising
One substrate is provided;
Substrate layer is formed in the side of the substrate;
The first thermal deformation layer is formed away from the side of the substrate in the substrate layer;
The second thermal deformation layer is formed away from the side of the substrate layer in the first thermal deformation layer, wherein the first hot shape
The thermal expansion coefficient of change layer is greater than the thermal expansion coefficient of the second thermal deformation layer, the first thermal deformation layer and/or described the
Two thermal deformation layers are conductive layer;
The first thermal deformation layer and the second thermal deformation layer are patterned, at least one probe structure is formed;
Conductive contact, the conductive contact and the first thermal deformation layer and conductive layer electricity are formed on the probe structure
Connection forms cantilever probe;
Patterning is carried out to the substrate layer and forms patterned substrate layer, the patterned substrate layer includes that at least one is vacant
Slot, the cantilever probe extend to the vacant slot and hanging in the vacant slot.
8. the preparation method of probe card according to claim 7, which is characterized in that carry out figure to the substrate layer described
Caseization is formed before patterned substrate layer, further includes:
Protective layer is formed on the cantilever probe surface;
It is described the substrate layer is carried out patterning form patterned substrate layer after, further includes:
Remove the protective layer on the cantilever probe surface.
9. a kind of chip detecting method, which is characterized in that using the probe card as described in claim 1-6 is any, comprising:
The probe card is moved to the position of the cantilever probe face chip electrode to be measured in the probe card;
The cantilever probe is heated until the conductive contact electricity that the cantilever probe occurs on thermal deformation and the cantilever probe connects
Touch the electrode of the chip to be measured.
10. chip detecting method according to claim 9, which is characterized in that in the heating cantilever probe until
The conductive contact that the cantilever probe occurs on thermal deformation and the cantilever probe is in electrical contact after the electrode of the chip to be measured,
Further include:
By the cantilever probe, electricity performance measurement is carried out at least one described chip to be measured.
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114280453A (en) * | 2021-12-24 | 2022-04-05 | 厦门大学 | Miniature flexible electrode array and test method |
CN115616260A (en) * | 2022-09-26 | 2023-01-17 | 上海泽丰半导体科技有限公司 | Thin film probe card assembly |
CN116930576A (en) * | 2023-09-13 | 2023-10-24 | 长电集成电路(绍兴)有限公司 | Probe card testing structure and preparation method thereof |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5475318A (en) * | 1993-10-29 | 1995-12-12 | Robert B. Marcus | Microprobe |
US5576630A (en) * | 1993-06-16 | 1996-11-19 | Nitto Denko Corporation | Probe structure for measuring electric characteristics of a semiconductor element |
CN1971287A (en) * | 2005-11-22 | 2007-05-30 | 旺矽科技股份有限公司 | Probe of probe card and its manufacturing method |
CN101069277A (en) * | 2004-12-24 | 2007-11-07 | 飞而康公司 | A probe card manufacturing method including sensing probe and the probe card, probe card inspection system |
JP2013246091A (en) * | 2012-05-28 | 2013-12-09 | Micronics Japan Co Ltd | Cantilever-type probe and cleaning method thereof |
-
2019
- 2019-04-23 CN CN201910329260.6A patent/CN110047772A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5576630A (en) * | 1993-06-16 | 1996-11-19 | Nitto Denko Corporation | Probe structure for measuring electric characteristics of a semiconductor element |
US5475318A (en) * | 1993-10-29 | 1995-12-12 | Robert B. Marcus | Microprobe |
CN101069277A (en) * | 2004-12-24 | 2007-11-07 | 飞而康公司 | A probe card manufacturing method including sensing probe and the probe card, probe card inspection system |
CN1971287A (en) * | 2005-11-22 | 2007-05-30 | 旺矽科技股份有限公司 | Probe of probe card and its manufacturing method |
JP2013246091A (en) * | 2012-05-28 | 2013-12-09 | Micronics Japan Co Ltd | Cantilever-type probe and cleaning method thereof |
Non-Patent Citations (2)
Title |
---|
YANWEI ZHANG ET AL.: "Thermally Actuated Microprobes for a New Wafer Probe Card", 《JOURNAL OF MICROELECTROMECHANICAL SYSTEMS》 * |
李文军: "《电工基本技能应用与实践》", 31 March 2017, 北京理工大学出版社 * |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114280453A (en) * | 2021-12-24 | 2022-04-05 | 厦门大学 | Miniature flexible electrode array and test method |
CN114280453B (en) * | 2021-12-24 | 2023-10-24 | 厦门大学 | Miniature flexible electrode array and testing method |
CN115616260A (en) * | 2022-09-26 | 2023-01-17 | 上海泽丰半导体科技有限公司 | Thin film probe card assembly |
CN115616260B (en) * | 2022-09-26 | 2024-02-23 | 上海泽丰半导体科技有限公司 | Thin film probe card assembly |
CN116930576A (en) * | 2023-09-13 | 2023-10-24 | 长电集成电路(绍兴)有限公司 | Probe card testing structure and preparation method thereof |
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