CN110034016B - Method for welding aluminum layer on front surface of semiconductor chip - Google Patents

Method for welding aluminum layer on front surface of semiconductor chip Download PDF

Info

Publication number
CN110034016B
CN110034016B CN201910228034.9A CN201910228034A CN110034016B CN 110034016 B CN110034016 B CN 110034016B CN 201910228034 A CN201910228034 A CN 201910228034A CN 110034016 B CN110034016 B CN 110034016B
Authority
CN
China
Prior art keywords
chip
front surface
metal
layer
evaporation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910228034.9A
Other languages
Chinese (zh)
Other versions
CN110034016A (en
Inventor
梁琳
颜小雪
康勇
李有康
项卫光
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhejiang Zhengbang Electronic Co ltd
Huazhong University of Science and Technology
Original Assignee
Zhejiang Zhengbang Electronic Co ltd
Huazhong University of Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhejiang Zhengbang Electronic Co ltd, Huazhong University of Science and Technology filed Critical Zhejiang Zhengbang Electronic Co ltd
Priority to CN201910228034.9A priority Critical patent/CN110034016B/en
Publication of CN110034016A publication Critical patent/CN110034016A/en
Application granted granted Critical
Publication of CN110034016B publication Critical patent/CN110034016B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/04Coating on selected surface areas, e.g. using masks
    • C23C14/042Coating on selected surface areas, e.g. using masks using masks
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14Metallic material, boron or silicon
    • C23C14/16Metallic material, boron or silicon on metallic substrates or on substrates of boron or silicon
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/24Vacuum evaporation
    • C23C14/28Vacuum evaporation by wave energy or particle radiation
    • C23C14/30Vacuum evaporation by wave energy or particle radiation by electron bombardment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers

Abstract

The invention belongs to the field of double-sided heat dissipation semiconductors, and particularly relates to a method for welding a front aluminum layer of a semiconductor chip, in particular to a process method for welding a front electrode of a wide-bandgap vertical power semiconductor device. The natural alumina layer with poor front adhesion of the chip is removed by wet etching, and then metal Ti, Ni and Ag are sequentially evaporated and plated.

Description

Method for welding aluminum layer on front surface of semiconductor chip
Technical Field
The invention belongs to the field of double-sided heat dissipation semiconductors, and particularly relates to a method for welding a front aluminum layer of a semiconductor chip, in particular to a process method for welding a front electrode of a wide-bandgap vertical power semiconductor device.
Background
With the continuous improvement of power density of semiconductor power modules, such as inverters and converters, the requirement of a system on heat dissipation is more and more strict, single-side heat dissipation gradually fails to meet the application requirement, and double-side heat dissipation is imperative. Most of commercial semiconductor bare chips in the current market are single-sided weldable: the top layer of the front electrode is made of metal Al, so that the weldability is poor, and Al can naturally form aluminum oxide in air, so that the weldability is poorer; and the metal of the top layer on the back is gold or silver, so that the welding is easy. Single-sided solderable semiconductor power modules cannot meet the ever-increasing practical heat dissipation requirements.
At present, few researches on the method for realizing the front face solderability of the semiconductor chip are made at home and abroad, and the industrial industry is rare. The university of Tianjin applied a patent to a method for metallizing an aluminum layer on the front surface of a chip in 2018, which mainly uses magnetron sputtering to metallize Ti/Ag to make the front surface of the chip solderable, and the method has the following defects: first, the aluminum pad surface on the power device usually generates a dense aluminum oxide layer due to exposure to air, the layer can significantly reduce the adhesion strength of the deposited metal layer, the aluminum layer is not removed before plating, and the aluminum oxide layer naturally oxidized on the surface of the aluminum layer. Secondly, only two layers of metal Ti/Ag are provided, and no intermediate buffer layer is provided, so that the corrosion of the solder in the packaging and welding process can not be well prevented.
Disclosure of Invention
Aiming at the defects or the improvement requirements of the prior art, the invention provides a semiconductor chip front aluminum layer solderability method, which removes a natural aluminum oxide layer with poor front adhesion of a chip by wet etching, and then sequentially evaporates and plates Ti, Ni and Ag.
To achieve the above object, according to one aspect of the present invention, there is provided a method for solderable front aluminum layer of a semiconductor chip, including the steps of:
(1) covering photoresist on a non-electrode area on the front surface of the cleaned chip by a photoetching method to obtain the front surface of the chip protected by the photoresist;
(2) wet etching treatment is carried out on the front surface of the chip protected by the photoresist to remove the alumina layer on the surface of the aluminum layer on the front surface of the chip, and the residual corrosive agent on the surface is cleaned after etching is finished to obtain the front surface of the chip with the surface alumina layer removed;
(3) sequentially evaporating metal titanium, metal nickel and metal silver on the front surface of the chip with the surface alumina layer removed to obtain the front surface of the chip with evaporated metal;
(4) and carrying out photoresist stripping treatment on the front surface of the metal-evaporated chip to obtain the semiconductor chip with the front aluminum layer capable of being welded.
Preferably, the cleaning in the step (1) is specifically: and carrying out plasma cleaning on the front surface of the chip to be processed, and removing dust and impurities on the surface of the aluminum layer on the front surface of the chip to obtain the cleaned front surface of the chip.
Preferably, when the photoresist is applied by the photolithography method, the spin coating is performed at a rotation speed of 500-.
Preferably, in the mask layer used in the photolithography of step (1), the width of the mask region corresponding to the region between the gate pad and the source pad on the front side of the chip is not less than the actual distance between the gate pad and the source pad.
Preferably, a width of a region of the mask layer corresponding to a region between the gate pad and the source pad is at least 0.08mm greater than a distance between the gate pad and the source pad.
Preferably, the etchant used in the wet etching is hot phosphoric acid with the temperature ranging from 70 ℃ to 80 ℃, and the wet etching time is 3-4 minutes.
Preferably, step (3) is performed within 1 minute after step (2) is completed, to avoid re-oxidation of the front surface of the chip in air.
Preferably, the evaporation comprises the following specific steps:
(4-1) putting the chip with the surface aluminum oxide layer removed into an evaporation table, and coating the chip at high altitude by using an electron beam evaporation source with the vacuum degree of not less than 9.0 x 10-4Pa, starting to thermally bake the chip, and keeping the temperature at 80-150 ℃ for 4-10 minutes;
(4-2) when the vacuum degree is not less than 8.0 x 10-4And (3) beginning evaporation when Pa, sequentially adopting titanium, nickel and silver in the evaporation sequence, and taking the chip after the evaporation is finished and the cooling is finished to obtain the front surface of the evaporated metal chip.
Preferably, the thickness of the evaporated metal titanium is 100nm-300nm, the thickness of the metal nickel is 200nm-1000nm, and the thickness of the metal silver is 200-1000 nm.
Preferably, the semiconductor chip is a wide bandgap vertical power semiconductor chip.
Preferably, the semiconductor chip is a MOSFET, an IGBT chip or a power diode chip, and the semiconductor chip is a Si material or a SiC material.
In general, compared with the prior art, the above technical solution contemplated by the present invention can achieve the following beneficial effects:
(1) the method for welding the aluminum layer on the front surface of the semiconductor chip adopts wet corrosion combined with one-time evaporation of the metal titanium nickel silver, so that the chip can be welded from only the back surface to double-surface welding, the process is simple and reliable, and the development of double-surface heat dissipation is greatly promoted.
(2) The invention adopts a method for plating the metal titanium nickel silver by one-time evaporation, Ti is used as a contact layer, the thermal expansion coefficient of the Ti is close to that of Si/SiC, the adhesiveness is strong, and the ohmic contact characteristic is good; ni is used as an intermediate buffer layer, the layer is in good contact with the upper layer and the lower layer of metal, and can well prevent the corrosion of solder in the process of packaging and welding; ag is used as a conductive layer, and has low resistivity, strong electromigration resistance, stable performance and good weldability.
(3) According to the invention, a photoetching method is adopted to protect the non-electrode area of the chip before wet etching, and the short circuit between electrodes caused by metal evaporation is avoided by controlling the treatment of the grinding layer at the narrow size of the chip.
(4) The method for welding the aluminum layer on the front surface of the semiconductor chip sequentially carries out welding treatment on the front surface of the chip through photoetching protection, wet etching and one-time evaporation, and is not only suitable for a general semiconductor chip with the aluminum layer on the front surface, but also suitable for a silicon carbide vertical semiconductor chip with high voltage, thinness and small size.
(5) In the invention, wet etching is adopted to remove the aluminum oxide, so that the subsequent evaporated metal can be more compact and firmer. Compared with the technology without removing the aluminum oxide layer, the metal of the scheme for removing the aluminum oxide layer is combined more firmly, is less prone to falling off in subsequent packaging, and is higher in reliability.
Drawings
Fig. 1 is a schematic diagram of the chip size of a SiC MOSFET of embodiment 1 of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
The invention provides a method for welding an aluminum layer on the front surface of a semiconductor chip, which comprises the following steps:
(1) carrying out plasma cleaning on the front surface of the chip to be processed, and removing dust and impurities on the surface of an aluminum layer on the front surface of the chip to obtain the cleaned front surface of the chip;
(2) covering photoresist on the non-electrode area on the front surface of the chip by a photoetching method to obtain the front surface of the chip protected by the photoresist;
(3) wet etching treatment is carried out on the front surface of the chip protected by the photoresist to remove the alumina layer on the surface of the aluminum layer on the front surface of the chip, and the residual corrosive agent on the surface is cleaned after etching is finished to obtain the front surface of the chip with the surface alumina layer removed;
(4) sequentially evaporating metal titanium, metal nickel and metal silver on the front surface of the chip with the surface alumina layer removed to obtain the front surface of the chip with evaporated metal;
(5) and carrying out photoresist stripping treatment on the front surface of the metal-evaporated chip to obtain the semiconductor chip with the front aluminum layer capable of being welded.
And (2) covering photoresist on the non-electrode area on the front surface of the chip by a photoetching method, wherein the photoresist can be positive photoresist or negative photoresist. The rotation speed and the spin time determine whether the photoresist is uniformly spin-coated. In order to ensure uniform photoresist spin coating, in some embodiments, the photoresist is spin coated at a rotation speed of 500-.
In some chip front-side structures, part of the non-electrode area is narrow, for example, the distance between the gate pad and the source pad of the MOSFET is very limited, only 0.08mm, so that before depositing metal, photoresist is needed to accurately control the mask layer to prevent short circuit between the source pad and the gate pad when plating the metal film. In some embodiments, in order to avoid short circuit, in the mask layer used in the step (2) of photolithography, the width of the mask region corresponding to the region between the gate pad and the source pad on the front surface of the chip is not less than the actual distance between the gate pad and the source pad, and preferably, the width of the mask region corresponding to the region between the gate pad and the source pad in the mask layer is at least 0.08mm greater than the distance between the gate pad and the source pad.
Under natural conditions, Al of the aluminum layer on the front surface of the chip can be oxidized to form aluminum oxide, the adhesion of the aluminum oxide is poor, and the aluminum oxide layer naturally formed on the aluminum layer needs to be removed before subsequent metallization. In some embodiments of the present invention, the etchant used in the wet etching is hot phosphoric acid with a temperature ranging from 70 ℃ to 80 ℃, and the wet etching time is 3 minutes to 4 minutes. For SiC MOSFET chips, the back side is Ni/Ag metal and will not be corroded by hot phosphoric acid. The height of the grid bonding pad and the height of the source bonding pad on the front side of the chip are different, the area of the grid bonding pad is smaller, and the source bonding pad can be observed to react faster and more fiercely in the corrosion process.
After photoetching, the areas of the front surface of the chip, which are not needed to be metallized, are protected by photoresist. And the front surface of the semiconductor chip is sequentially evaporated with metal Ti, Ni and Ag. In order to avoid the phenomenon of layering or falling off of the metal after metallization as much as possible and facilitate subsequent packaging and sintering, the thickness of the vapor plating metal titanium is 100nm-300nm, the thickness of the metal nickel is 200nm-1000nm, and the thickness of the metal silver is 200nm-1000 nm. The specific numerical value is determined according to specific conditions. The structure of the multilayer metal takes the adhesion between the metal and the chip into consideration and the requirements of the packaging process on the metal layer into consideration. The full-automatic control operation mode is adopted, the efficiency is high, the stability is high, the thickness of each evaporated metal layer is uniform under the high vacuum environment, and the compactness of each metal layer is high.
It is particularly noted that evaporation metallization needs to be performed quickly after wet etching of the alumina to minimize the possibility of re-oxidation of the Al layer in air. For example, step (4) is preferably performed within 1 minute after step (3) is completed, so as to prevent the front surface of the chip from being oxidized again in the air.
In some embodiments, the metal deposition step is:
(4-1) putting the chip with the surface aluminum oxide layer removed into an evaporation table, and coating the chip at high altitude by using an electron beam evaporation source with the vacuum degree of not less than 9.0 x 10-4Pa, starting to thermally bake the chip, and keeping the temperature at 80-150 ℃ for 4-10 minutes;
(4-2) when the vacuum degree is not less than 8.0 x 10-4And (3) beginning evaporation when Pa, sequentially adopting titanium, nickel and silver in the evaporation sequence, taking the chip after the evaporation is finished and cooling for not less than 10 minutes, and obtaining the front surface of the evaporated metal chip.
And (3) carrying out photoresist stripping treatment on the front surface of the metal evaporated chip, wherein a conventional photoresist stripping method can be adopted, such as stripping by adopting an organic stripping liquid, and ultrasound can also be assisted to remove metals evaporated in other areas except the grid electrode and the source electrode bonding pad.
The method for welding the aluminum layer on the front surface of the semiconductor chip is not only suitable for common semiconductor chips with the aluminum layer on the front surface, such as power MOSFET, IGBT chips or power diode chips, Si materials or SiC materials. But also for higher voltage, thinner, and smaller size SiC devices, such as SiC vertical semiconductor chips.
For the double-sided heat dissipation structure, the front surface of the chip is necessary to be metallized, and after metallization, the chip can be welded from the back surface single-sided to the front surface and the back surface both-sided. The front side metallization treatment mainly comprises two key steps: firstly, Al on the surface of Al layer needs to be removed before metal coating2O3And the second is the metal coating itself.
The invention adopts hot phosphoric acid wet etching to remove the alumina, and has simple and reliable process and low cost. For the metallization process, the following requirements are mainly made: the adhesiveness between the silicon chip and the surface of the Si or SiC chip is good; ohmic contact is good, and the conductivity is good; and subsequent welding and packaging are easy. The invention adopts a method for plating the metal titanium nickel silver by one-time evaporation, Ti is used as a contact layer, the thermal expansion coefficient of the Ti is close to that of Si/SiC, the adhesiveness is strong, and the ohmic contact characteristic is good; ni is used as an intermediate buffer layer, the layer is in good contact with the upper layer and the lower layer of metal, and can well prevent the corrosion of solder in the process of packaging and welding; ag is used as a conductive layer, and has low resistivity, strong electromigration resistance, stable performance and good weldability. The invention has the advantages that the aluminum oxide is removed by phosphoric acid wet etching, the titanium nickel silver is plated by one-time evaporation, the back surface of the chip can be welded into double-sided weldable, the process is simple and reliable, and the development of double-sided heat dissipation is greatly promoted.
The following are examples:
the embodiment aims to provide a solderable structure and a process for a front aluminum layer of a wide bandgap vertical power semiconductor chip. The metallization method has good conductivity, and the commercial semiconductor chip is improved from single-side welding to double-side welding, so that double-side heat dissipation is facilitated, the power density of the semiconductor module is improved, and the reliability of semiconductor packaging can be improved.
The following takes 1200V SiC MOSFET bare chip of CREE corporation as an example, and the invention is described more fully with reference to the specific embodiments and the drawings in the examples. It is obvious that the described embodiments are only a part of all embodiments of the invention. Other embodiments, which are not the inventor or which the applicant can obtain without making any inventive contribution, are within the scope of protection of the present patent.
In this embodiment, the front surface of the SiC MOSFET has 1 Gate Pad (Gate Pad) and 3 Source pads (Source Pad), and the surface metal of these 4 electrodes is a metal aluminum layer with a thickness of 4 μm, and the chip is schematically shown in fig. 1.
And (3) a front aluminum layer solderability process:
(1) cleaning: firstly, plasma cleaning is carried out on the SiC MOSFET chip to be processed, and dust and impurities on the surface of the chip are removed, so that the SiC MOSFET chip meets the requirements of the subsequent process.
(2) Photoetching a mask: the photolithographic masking is performed prior to the evaporation of the multi-layer metal film by protecting all other regions except the gate pad and the source pad, especially the termination structure, with photoresist. Secondly, because the distance between the MOSFET grid bonding pad and the source bonding pad is very limited and is only 0.08mm, before metal deposition, photoresist is needed to accurately control the mask layer so as to prevent short circuit between the source bonding pad and the grid bonding pad when metal coating is carried out. Here, the mask layer is set to have a width of 0.35mm corresponding to the distance between the gate pad and the source pad, and a photoresist is first spin-coated, which in this embodiment is a negative photoresist, at a rotation speed of 600 rotations for 5 seconds, and then at a high speed of 1200 rotations for 10 seconds. The rotation speed and the spin-coating time determine whether the photoresist is uniformly spin-coated. Prebaking at 143 ℃ for 8 minutes. The exposure was carried out for 60 seconds and the intensity was 3.6 x 1000. mu.W/cm 2. Development for 150 seconds and fixation for 120 seconds. Hardening the film at 143 ℃ for 40 minutes.
(3) Wet etching of Al2O3In air, under natural conditions, Al oxidizes to form alumina, which has poor adhesion and requires removal of the naturally formed alumina layer prior to subsequent metallization. The corrosive liquid is hot phosphoric acid, the temperature is 70-80 ℃, and the soaking time is 3-4 minutes. The back surface of the SiC MOSFET chip is made of Ni/Ag metal and cannot be corroded by hot phosphoric acid. The height of the grid bonding pad and the height of the source bonding pad on the front side of the chip are different, the area of the grid bonding pad is smaller, and the source bonding pad can be observed to react faster and more fiercely in the corrosion process.
(4) Cleaning: and (4) cleaning the residual phosphoric acid on the chip to prepare for the next evaporation coating.
(5)Evaporation and metal plating: after photoetching, the areas of the front surface of the chip, which are not needed to be metallized, are protected by photoresist. And the front surface of the semiconductor chip is sequentially evaporated with metal Ti, Ni and Ag. In order to avoid the phenomenon of layering or falling off of the metal after metallization as much as possible and facilitate subsequent packaging and sintering, the thickness ranges of the metal of each layer are 100nm-300nm of Ti, 200nm-1000nm of Ni and 200nm-1000nm of Ag, and the specific numerical value is determined according to specific conditions. The structure of the multilayer metal takes the adhesion between the metal and the chip into consideration and the requirements of the packaging process on the metal layer into consideration. It is particularly noted that evaporation metallization needs to be performed quickly after wet etching of the alumina to minimize the possibility of re-oxidation of the Al layer in air. Loading the cleaned chip into an evaporation table, and coating at high altitude by using an electron beam evaporation source until the vacuum degree reaches 9.0 x 10-4Pa starts to bake thermally, and the temperature is kept constant at 100 ℃ for 5 minutes. When the vacuum degree reaches 8.0 x 10-4And (4) beginning to evaporate when Pa, sequentially adopting titanium, nickel and silver in the evaporation sequence, cooling for 10 minutes after evaporation is finished, and taking the slices. The full-automatic control operation mode is adopted, the efficiency is high, the stability is high, the film thickness of each metal layer evaporated under the high vacuum environment is uniform, the compactness of each metal layer is high, the combination is good, and the surface of the silver layer is bright. After the film coating is finished, the alloy is subjected to high vacuum, and the vacuum degree is 3 x 10-3Pa, and keeping the temperature at 500 ℃ for 40 minutes. After the alloy is alloyed, the ohmic contact between the chip and each metal layer is tighter, and the weldability is enhanced.
(6) Stripping: and stripping and removing the metal evaporated on the other areas except the grid electrode and the source electrode bonding pad by adopting an organic stripping liquid and ultrasonic method. The organic stripping solution is a conventional stripping solution for stripping photoresist, such as JB-1133 (Strepper-1133).
Through the steps, the SiC MOSFET chip is changed from back welding only to front welding and back welding, necessary conditions are provided for double-side welding packaging and manufacturing of a double-side heat dissipation semiconductor module, and heat dissipation performance and power density of the semiconductor module can be improved.
The parameters related to the above embodiments can be adjusted within a certain range according to actual requirements, and the adjusted range also belongs to the protection scope of the present invention.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (5)

1. A method for welding an aluminum layer on the front surface of a semiconductor chip is characterized by comprising the following steps:
(1) covering photoresist on a cleaned non-electrode area on the front surface of the chip by a photoetching method aiming at the chip with the back electrode metal of Ni/Ag to obtain the front surface of the chip protected by the photoresist;
(2) wet etching treatment is carried out on the front surface of the chip protected by the photoresist to remove the alumina layer on the surface of the aluminum layer on the front surface of the chip, and the residual corrosive agent on the surface is cleaned after etching is finished to obtain the front surface of the chip with the surface alumina layer removed;
(3) sequentially evaporating metal titanium, metal nickel and metal silver on the front surface of the chip with the surface alumina layer removed to obtain the front surface of the chip with evaporated metal; the thickness of the vapor plating metal titanium is 100nm-300nm, the thickness of the metal nickel is 200nm-1000nm, and the thickness of the metal silver is 200-1000 nm; the evaporation plating comprises the following specific steps:
(3-1) putting the chip with the surface aluminum oxide layer removed into an evaporation table, and coating the chip at high altitude by using an electron beam evaporation source with the vacuum degree of not less than 9.0 x 10-4Pa, starting to thermally bake the chip, and keeping the temperature at 80-150 ℃ for 4-10 minutes;
(3-2) when the vacuum degree is not less than 8.0 x 10-4When Pa, evaporation is started, the evaporation sequence is titanium, nickel and silver in sequence, and after evaporation is finished and cooling is carried out, a chip is taken out, so that the front surface of the metal-evaporated chip is obtained;
(4) carrying out photoresist stripping treatment on the front surface of the metal-evaporated chip to obtain a semiconductor chip with a weldable front aluminum layer;
in the step (2), the etchant adopted by the wet etching is hot phosphoric acid with the temperature ranging from 70 ℃ to 80 ℃, and the wet etching time is 3-4 minutes;
in addition, the step (3) is carried out within 1 minute after the step (2) is completed, so that the front surface of the chip is prevented from being oxidized again in the air;
in the mask layer adopted in the photoetching in the step (1), the width of a mask region corresponding to a region between a gate bonding pad and a source bonding pad on the front side of the chip is not less than the actual distance between the gate bonding pad and the source bonding pad.
2. The solderable method of claim 1, wherein a width of an area of the mask layer corresponding to an area between the gate pad and the source pad is at least 0.08mm greater than a distance between the gate pad and the source pad.
3. The solderable method of claim 1 wherein the cleaning of step (1) is specifically: and carrying out plasma cleaning on the front surface of the chip to be processed, and removing dust and impurities on the surface of the aluminum layer on the front surface of the chip to obtain the cleaned front surface of the chip.
4. The solderable method of claim 1 wherein the photolithography is performed with a paste at 500-.
5. The solderable method of claim 1, wherein the semiconductor chip is a wide bandgap vertical power semiconductor chip.
CN201910228034.9A 2019-03-25 2019-03-25 Method for welding aluminum layer on front surface of semiconductor chip Active CN110034016B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910228034.9A CN110034016B (en) 2019-03-25 2019-03-25 Method for welding aluminum layer on front surface of semiconductor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910228034.9A CN110034016B (en) 2019-03-25 2019-03-25 Method for welding aluminum layer on front surface of semiconductor chip

Publications (2)

Publication Number Publication Date
CN110034016A CN110034016A (en) 2019-07-19
CN110034016B true CN110034016B (en) 2022-03-29

Family

ID=67236541

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910228034.9A Active CN110034016B (en) 2019-03-25 2019-03-25 Method for welding aluminum layer on front surface of semiconductor chip

Country Status (1)

Country Link
CN (1) CN110034016B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113013038A (en) * 2019-12-20 2021-06-22 上海新微技术研发中心有限公司 Method for manufacturing metal bonding pad structure of power device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203521403U (en) * 2013-03-15 2014-04-02 英飞凌科技奥地利有限公司 Semiconductor device and semiconductor equipment
WO2018117104A1 (en) * 2016-12-22 2018-06-28 田中貴金属工業株式会社 Electrode structure of back electrode of semiconductor substrate, manufacturing method thereof, and sputtering target provided to manufacture said electrode structure
CN108448217A (en) * 2018-03-01 2018-08-24 西南科技大学 The radio frequency microstrip structure of Ti/Ni/Ag material systems
CN207938784U (en) * 2018-03-01 2018-10-02 西南科技大学 The substrate integrated wave guide structure of Ti/Ni/Ag material systems

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2743409B2 (en) * 1988-11-14 1998-04-22 ヤマハ株式会社 Multilayer wiring formation method
JPH04346230A (en) * 1991-05-24 1992-12-02 Nec Corp Manufacture of integrated circuit
EP0523701B1 (en) * 1991-07-17 1998-01-07 Denso Corporation Method of forming electrodes of semiconductor device
JPH07105441B2 (en) * 1992-11-30 1995-11-13 日本電気株式会社 Method for manufacturing semiconductor device
JP2655471B2 (en) * 1993-11-17 1997-09-17 日本電気株式会社 Method for manufacturing semiconductor device
JP3647187B2 (en) * 1997-02-28 2005-05-11 株式会社リコー Manufacturing method of semiconductor device
JP3679001B2 (en) * 2000-12-22 2005-08-03 シャープ株式会社 Semiconductor device and manufacturing method thereof
US8368211B2 (en) * 2004-03-11 2013-02-05 International Rectifier Corporation Solderable top metalization and passivation for source mounted package
CN101463480A (en) * 2007-12-21 2009-06-24 王中林 Manufacturing method of weldable base material
JP4605409B2 (en) * 2008-08-21 2011-01-05 上村工業株式会社 Surface treatment method of aluminum or aluminum alloy
CN103578962A (en) * 2012-07-20 2014-02-12 中国科学院电工研究所 Metallizing method for chip front electrode and auxiliary devices
CN104112655A (en) * 2013-04-19 2014-10-22 哈尔滨工大华生电子有限公司 Semiconductor device front side metallization process
CN107658220B (en) * 2017-08-21 2020-05-08 天津大学 Method for metallizing front aluminum layer of power semiconductor chip
CN207624685U (en) * 2017-12-31 2018-07-17 深圳傲威半导体有限公司 A kind of front metal is the Transient Voltage Suppressor of silver

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN203521403U (en) * 2013-03-15 2014-04-02 英飞凌科技奥地利有限公司 Semiconductor device and semiconductor equipment
WO2018117104A1 (en) * 2016-12-22 2018-06-28 田中貴金属工業株式会社 Electrode structure of back electrode of semiconductor substrate, manufacturing method thereof, and sputtering target provided to manufacture said electrode structure
CN108448217A (en) * 2018-03-01 2018-08-24 西南科技大学 The radio frequency microstrip structure of Ti/Ni/Ag material systems
CN207938784U (en) * 2018-03-01 2018-10-02 西南科技大学 The substrate integrated wave guide structure of Ti/Ni/Ag material systems

Also Published As

Publication number Publication date
CN110034016A (en) 2019-07-19

Similar Documents

Publication Publication Date Title
CN110482482B (en) Preparation method of insulated patterned high-thermal-conductivity diamond heat dissipation device
US20110079418A1 (en) Ceramic wiring board and method of manufacturing thereof
JP5669780B2 (en) Manufacturing method of semiconductor device
US9666437B2 (en) Method for manufacturing semiconductor device
JP3485390B2 (en) Electrostatic chuck
JP2010278164A (en) Semiconductor device and method of manufacturing the same
JP6651271B2 (en) Semiconductor device and manufacturing method thereof
JP2017059636A (en) Method for manufacturing semiconductor device
US6596635B1 (en) Method for metallization of a semiconductor substrate
JP2001130986A (en) Copper plated ceramic board, peltier element using the same and method for producing copper plated ceramic board
CN110034016B (en) Method for welding aluminum layer on front surface of semiconductor chip
CN103219318B (en) High-temperature-resistant MIM capacitor for microwave internal matching transistor and manufacturing method thereof
WO2015135249A1 (en) Patterned multi-insulating material circuit substrate
JP2006114827A (en) Semiconductor device
CN109037175A (en) power device and its packaging method
JP2018006743A (en) Method for manufacturing insulative circuit board, insulative circuit board, and thermoelectric conversion module
TWI775075B (en) Ceramic substrate assemblies and components with metal thermally conductive bump pads
WO2009142077A1 (en) Process for fabricating semiconductor device
CN112260055B (en) Double-sided mounting substrate, method for manufacturing double-sided mounting substrate, and semiconductor laser
CN211350634U (en) Wafer level packaging chip
JP2017057486A (en) Production of substrate for plated power module
JP2017168635A (en) Substrate for power module and manufacturing method of power module
JPH03101234A (en) Manufacture of semiconductor device
CN102731170A (en) Technology for coating film on surface of ceramic substrate
CN116403912B (en) Method for preparing aluminum nitride/tungsten copper gold tin heat sink

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant