CN110024085B - Mirror surface bare chip image recognition system - Google Patents

Mirror surface bare chip image recognition system Download PDF

Info

Publication number
CN110024085B
CN110024085B CN201780074175.9A CN201780074175A CN110024085B CN 110024085 B CN110024085 B CN 110024085B CN 201780074175 A CN201780074175 A CN 201780074175A CN 110024085 B CN110024085 B CN 110024085B
Authority
CN
China
Prior art keywords
die
mirror
defective
image
mirror surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201780074175.9A
Other languages
Chinese (zh)
Other versions
CN110024085A (en
Inventor
岩濑友则
森下正浩
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Corp
Original Assignee
Fuji Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Corp filed Critical Fuji Corp
Publication of CN110024085A publication Critical patent/CN110024085A/en
Application granted granted Critical
Publication of CN110024085B publication Critical patent/CN110024085B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/0002Inspection of images, e.g. flaw detection
    • G06T7/0004Industrial image inspection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67288Monitoring of warpage, curvature, damage, defects or the like
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00Indexing scheme for image analysis or image enhancement
    • G06T2207/30Subject of image; Context of image processing
    • G06T2207/30108Industrial image inspection
    • G06T2207/30148Semiconductor; IC; Wafer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06VIMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V2201/00Indexing scheme relating to image or video recognition or understanding
    • G06V2201/06Recognition of objects for industrial automation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836Wafer tapes, e.g. grinding or dicing support tapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54426Marks applied to semiconductor devices or parts for alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54453Marks applied to semiconductor devices or parts for use prior to dicing
    • H01L2223/54466Located in a dummy or reference die

Abstract

A mirror die image recognition system for recognizing a mirror die having the same shape as a production die having a pattern and having no pattern and no defect from among a plurality of dies (31) of a wafer (30) by distinguishing the mirror die having a defect from the production die, the mirror die image recognition system comprising: a camera (42) for capturing an image of at least a portion of the wafer by capturing the image in a field of view; and an image processing device for processing the image captured by the camera and identifying a non-defective mirror surface die from each die in the image by distinguishing it from other dies. The image processing apparatus acquires the brightness of at least five regions including regions corresponding to the four corner portions and the central portion of each die in the image captured by the camera, determines whether or not the brightness of the at least five regions is considered to be constant, and identifies a die that is considered to have constant brightness in the at least five regions as a defective mirror die.

Description

Mirror surface bare chip image recognition system
Technical Field
The present specification discloses a technique relating to a mirror die image recognition system, a reference die setting system, and a mirror die image recognition method that recognize, from among a plurality of dies of a wafer, a mirror die having a defective mirror die and a production die, a mirror die having the same quadrilateral shape as that of a production die (normal die) having a pattern and having no pattern and defect.
Background
In general, a die supply apparatus that supplies dies (chip components) to a component mounter is equipped with a camera for performing image recognition of each die of a wafer, but even if image recognition of each die of a wafer image captured by the camera is possible, it is not possible to accurately determine which position of the wafer the die whose image is recognized is at.
Therefore, as described in patent document 1 (japanese patent application laid-open No. 11-67876) and patent document 2 (japanese patent application laid-open No. 2002-26041), a reference die having a pattern that can be distinguished from a production die by image recognition is provided at a predetermined position on a wafer, the reference die is first image-recognized, and the position of the die to be sucked is determined using the position of the reference die as a reference position.
Documents of the prior art
Patent document 1: japanese unexamined patent publication No. H11-67876
Patent document 2 Japanese patent laid-open publication No. 2002-26041
Disclosure of Invention
Problems to be solved by the invention
The conventional reference die is formed in a pattern that can be distinguished from the production die, and therefore, this causes an increase in the manufacturing cost of the wafer. Therefore, there is a demand for manufacturing a wafer without forming a reference die in order to reduce the manufacturing cost of the wafer.
However, the wafer on which the reference die is not formed needs to be provided with a reference position instead of the reference die, and therefore, it is conceivable to use a mirror die without a pattern as the reference die.
In general, a die located on the outer peripheral edge of a wafer is a mirror die without forming a pattern, but since the wafer has a circular shape, the mirror die located on the outer peripheral edge of the wafer is not a complete quadrangle like a production die with a pattern but has a shape in which a part thereof is defective due to the outer peripheral edge of the wafer. Since a plurality of defective mirror surface dies located on the outer peripheral edge of the wafer exist over the entire periphery of the wafer, it is difficult to use the mirror surface dies as reference dies.
Therefore, in the case of using the mirror die as the reference die, it is necessary to use a non-defective mirror die, and therefore it is necessary to develop a technique for identifying a non-defective mirror die from a plurality of dies of a wafer, separately from a defective mirror die and a production die.
Means for solving the problems
In order to solve the above problems, there is provided a mirror surface die image recognition system for recognizing a mirror surface die having a shape of a quadrilateral identical to that of a patterned production die and having no pattern or defect, from among a plurality of dies of a wafer diced into a plurality of dies, the mirror surface die image recognition system including: a camera for capturing an image of at least a portion of the wafer within a field of view; and an image processing device that processes an image captured by the camera to distinguish each die from other dies in the image and identify a non-defective mirror die, wherein the image processing device acquires luminances of at least five regions in the image including regions corresponding to four corner portions and a central portion of each die, determines whether or not the luminances of the at least five regions are constant, and identifies a die that is considered to have a constant luminance of the at least five regions as a non-defective mirror die. Here, "it can be regarded that the luminances of at least five regions are constant" means that the luminances of at least five regions are within a predetermined variation range in which it can be determined that the difference in luminance is substantially constant in consideration of variations in illumination light with which the bare chip is irradiated, variations in imaging conditions of the camera, and the like.
The types of the bare chips of the wafer are production bare chips with patterns, non-defective mirror bare chips in the non-pattern mirror bare chips and defective mirror bare chips, at least five areas for obtaining the brightness of each bare chip are any one of areas not including the patterns, areas including the patterns and areas including defective parts of the bare chips, and the brightness of the three areas is different from each other. Therefore, when the brightness of any one of the at least five regions of the die is different from the brightness of the other regions, it can be identified as not being a defective mirror die (that is, a production die or a defective mirror die). In addition, since the defective mirror surface bare chip has a defect in at least one corner portion, the luminance of a region including the defective corner portion among the regions of the four corner portions is different from the luminance of the other regions. Even if any corner portion of the die is defective, the central portion of the die remains without being defective. From such a relationship, if it is determined whether or not the luminances of at least five regions including the regions corresponding to the four corner portions and the central portion of each die are regarded as constant, the die whose luminances of at least five regions are regarded as constant can be recognized as a defective mirror die.
Further, each die in the image may be divided into four regions each including one corner portion, the luminances of the four regions may be acquired, whether or not the luminances of the four regions are considered to be constant may be determined, and the die that is considered to be constant in luminance of the four regions may be recognized as a defective mirror die.
In this case, a non-defective mirror die may be searched for from all dies of the wafer, but the position where the non-defective mirror die exists in the wafer is generally known.
Therefore, the image processing apparatus may be configured to include a search range specification unit configured to specify a search range for searching for a defective mirror bare chip on a wafer. By specifying a search range for searching for a non-defective mirror die, the processing time for searching for a non-defective mirror die can be shortened.
In this case, the operator may operate the search range specification unit to specify the search range, or may automatically specify the search range based on wafer map data including information on whether each die of the wafer is a production die or a non-defective mirror die.
However, when scratches or stains are attached to the area where the brightness of the mirror surface die without defects is obtained, even in the mirror surface die without defects, the brightness of the area where the scratches or stains are attached may be different from the brightness of the other area, and thus the mirror surface die without defects may not be recognized.
As a countermeasure, when a non-defective mirror die cannot be identified from the dies existing within the search range specified by the search range specifying unit, at least one of the size of the area for obtaining the brightness, the position of the area, and the number of areas may be changed to re-search the non-defective mirror die. In this way, when scratch or stain is attached to the area where the brightness of the mirror surface bare chip is obtained and the mirror surface bare chip is not recognized, by changing at least one of the size of the area where the brightness is obtained, the position of the area, and the number of the areas, the area where the brightness is obtained is changed to an area where the influence of the scratch or stain can be almost ignored, and there is a possibility that the mirror surface bare chip without a defect can be recognized.
In addition, when the number of non-defective mirror surface dies identified in the search range specified by the search range specifying unit is larger than the number of mirror surface dies that are actually not defective, the image processing apparatus may change at least one of the size of the area for obtaining the brightness, the position of the area, and the number of areas for the dies identified as the non-defective mirror surface dies, and may re-search for the non-defective mirror surface dies. For example, since the same pattern is formed in all the areas for obtaining the luminance of the production die, when the production die is erroneously recognized as a non-defective mirror die, the number of non-defective mirror dies recognized in the search range is larger than the number of non-defective mirror dies actually present. In such a case, by changing at least one of the size of the region, the position of the region, and the number of regions for obtaining the luminance with respect to the die identified as the defective mirror die, it is possible to normally identify the production die erroneously identified as the defective mirror die as not the defective mirror die (the production die or the defective mirror die).
Drawings
Fig. 1 is an external perspective view showing a die supply apparatus according to example 1.
Fig. 2 is an external perspective view of the jack-up unit and its peripheral portion.
Fig. 3 is an external perspective view of the wafer pallet.
Fig. 4 is a block diagram showing a configuration of a control system of the die supply apparatus.
Fig. 5 is a diagram illustrating five regions for obtaining luminance from an image of a die.
Fig. 6 is a diagram showing an example of an image obtained by imaging a portion including a non-defective mirror surface die in a wafer.
Fig. 7 is a diagram showing an example of an image obtained by imaging a portion of a wafer including a defective mirror die.
Fig. 8 is a diagram illustrating an example of a case where the size of the area for obtaining luminance is changed and a mirror surface bare chip without defect is searched again.
Fig. 9 is a diagram illustrating a first example of a case where a production die is erroneously recognized as a non-defective mirror surface die.
Fig. 10 is a diagram illustrating a second example in the case where a production die is erroneously recognized as a non-defective mirror die.
Fig. 11 is a diagram illustrating four regions for obtaining luminance from an image of a die in example 2.
Detailed Description
Two examples 1 and 2 will be described below.
Example 1
Hereinafter, embodiment 1 will be described with reference to fig. 1 to 10.
First, the configuration of the die supply apparatus 11 will be schematically described with reference to fig. 1 to 4.
The die supply apparatus 11 includes a magazine holding unit 22 (tray tower), a tray drawing table 23, an XY-moving mechanism 25, a tray drawing mechanism 26, a jack-up unit 28 (see fig. 2), and the like, and is provided in a state where the tray drawing table 23 is set to be inserted into a component mounter (not shown).
In a magazine (not shown) housed in the magazine holding section 22 of the die supply apparatus 11 so as to be movable up and down, a plurality of wafer pallets 32 on which the wafers 30 are mounted are placed, and during production, the wafer pallets 32 in the magazine are pulled out onto the pallet pull-out table 23 by the pallet pull-out mechanism 26, or the wafer pallets 32 on the pallet pull-out table 23 are returned into the magazine. As shown in fig. 3, the wafer 30 is bonded to a stretchable dicing sheet 34, and is divided into a plurality of dies 31 by forming dicing grooves 36 in a grid pattern. The dicing sheet 34 is attached to a dicing frame 33 having a circular opening in an expanded state, and the dicing frame 33 is attached to the pallet body 35 by screwing or the like.
Most of the dies 31 of the wafer 30 are production dies with patterns formed thereon, and the dies 31 at predetermined positions of the wafer 30 become mirror dies with no patterns formed thereon for use as reference dies (reference dies). Mirror surface dies serving as reference dies are provided at a plurality of portions of the wafer 30, and mirror surface dies having the same quadrilateral shape as the production dies and having no defect are used as the reference dies. The die 31 located at the outer periphery of the wafer 30 is a mirror-surface die without a pattern, but as shown in fig. 3, the shape of the wafer 30 is circular, and therefore the mirror-surface die located at the outer periphery of the wafer 30 is not a complete quadrangle like a production die, but is a shape in which a part thereof is broken by the outer periphery of the wafer 30.
The lift unit 28 (see fig. 2) is configured to be movable in the XY direction (horizontal front-rear-right direction) in a space region below the dicing sheet 34 of the wafer pallet 32. Then, the sticking portion of the bare chip 31 to be picked up (sucked) in the dicing sheet 34 is partially pushed up from below by a push-up pin (not shown) of the push-up cylinder 37, and the sticking portion of the bare chip 31 is partially peeled off from the dicing sheet 34, so that the bare chip 31 is lifted up to a state where it is easy to pick up.
As shown in fig. 1, the XY-moving mechanism 25 is provided with a suction head 41 and a camera 42, and the camera 42 captures an image of at least a part of the wafer 30 in a field of view, and the suction head 41 and the camera 42 are integrally moved in the XY direction by the XY-moving mechanism 25. A suction nozzle (not shown) for sucking the die 31 on the dicing sheet 34 is placed on the suction head 41 so as to be movable up and down. The camera 42 can recognize the position of the die 31 in the field of view of the camera 42 by photographing the die 31 on the dicing sheet 34 from above and processing the photographed image, but it is not possible to accurately determine which position of the die 31 of the circular wafer 30 the die 31 recognized by the image is.
Therefore, in example 1, a defective mirror die is used as a reference die among the plurality of dies 31 of the wafer 30, and the defective mirror die is first subjected to image recognition by a method described later, and the position of the production die to which suction is started is determined using the position of the defective mirror die as a reference position.
The controller 45 (see fig. 4) of the die supply apparatus 11 is mainly configured by a computer, controls the operations of the XY moving mechanism 25, the jack-up unit 28, the pallet drawing mechanism 26, and the like, and is connected to a display device 51 that displays an image (see fig. 6 and 7) of the wafer 30 captured by the camera 42 and an input device 52 such as a keyboard, a mouse, and a touch panel that is operated by an operator.
The control unit 45 of the die supply apparatus 11 also functions as an image processing apparatus, and initially recognizes an image of a defective mirror die from among the plurality of dies 31 of the wafer 30 by a method described later, estimates a position of a production die to be sucked from the position of the defective mirror die as a reference position, takes the estimated position of the production die as a target shot die position, shoots the production die by the camera 42, processes the image thereof to recognize the position of the production die, and sucks and picks up the production die by the suction nozzle of the suction head 41. Then, the position of the production die to be picked up next is estimated based on the recognition position of the production die subjected to the current picking-up operation, the estimated position of the production die to be picked up next is set as a target imaging die position, the position of the production die to be picked up next is recognized by imaging the production die to be picked up next by the camera 42, the production die to be picked up next is picked up by the suction nozzle of the suction head 41, and the above-described processes are repeated to pick up the die 31 on the dicing sheet 34 in a predetermined order.
As described above, since the production die having a pattern, the mirror die having no defect, and the mirror die having a defect are mixed in the dies 31 of the wafer 30, when the mirror die having no defect is used as the reference die, it is necessary to distinguish the mirror die having no defect from the mirror die having a defect and the production die among the dies 31 of the wafer 30.
Therefore, in embodiment 1, the control unit 45 of the die supply apparatus 11 acquires the luminances of at least five regions including regions corresponding to the four corner portions and the central portion of each die 31 in the image, determines whether or not the luminances of the at least five regions are considered to be constant, and recognizes the die 31, which is considered to be constant in luminance of the at least five regions, as a non-defective mirror die.
Specifically, as shown in fig. 5, the control unit 45 of the die supply apparatus 11 divides each die 31 recognized as an image into nine parts in a grid pattern, acquires four areas, i.e., four upper left, upper right, lower left, and lower right, corresponding to four corner parts of each die 31, and the total of five areas, i.e., five areas corresponding to the central part of each die 31, compares the luminances of the five areas, determines whether the five areas are visible as constant luminances, and recognizes the die 31, which is visible as constant luminances of the five areas, as a non-defective mirror die. Here, "it can be regarded that the luminances of the five regions are constant" means that the luminances of the five regions are within a predetermined variation range in which it can be determined that the difference between the luminances of the five regions is substantially constant in consideration of variations in the illumination light irradiated to the bare chip 31, variations in the imaging conditions of the camera 42, and the like.
As shown in fig. 5 to 7, the types of the dies 31 of the wafer 30 are a production die with a pattern, a non-defective mirror die and a defective mirror die among the non-patterned mirror dies, and five regions for obtaining the luminance of each die 31 are any one of a region not including the pattern, a region including the pattern, and a region including a defective portion of the die 31, and the luminances of the three regions are different from each other. Therefore, when the brightness of any one of the five regions of the die 31 is different from the brightness of the other regions, it is recognized that the die is not a defective mirror die (that is, a production die or a defective mirror die).
For example, the die 31 illustrated in fig. 5 is a mirror die that is not defective because the upper left area is patterned and the brightness of the upper left area is different from the brightness of the other areas.
The die 31 on the lower right of the wafer 30 illustrated in fig. 6 is not defective, and all of the five regions are not patterned, and therefore, the brightness of the five regions can be regarded as constant, and the die is recognized as a defective mirror die.
Since the lower right corner of the lower right die 31 of the wafer 30 illustrated in fig. 7 is defective, the luminance of the lower right region is different from the luminance of the other regions, and it is recognized that the die is not a defective mirror die.
In this way, at least one corner portion of the mirror surface bare chip having a defect is defective, and therefore, the luminance of a region including the defective corner portion among the regions of the four corner portions is different from the luminance of the other regions. Even if any corner portion of the die 31 is broken, the central portion of the die 31 remains without being broken. From such a relationship, as in embodiment 1, if it is determined whether or not the luminances of five regions corresponding to the four corner portions and the central portion of each die 31 are constant, the die 31 that can be regarded as having constant luminances in the five regions can be recognized as a mirror die without defects.
In this case, although the non-defective mirror die can be searched for from all the dies 31 of the wafer 30, the processing time for searching for the non-defective mirror die becomes long when searching for the non-defective mirror die from all the dies 31 of the wafer 30 because the number of dies 31 of the wafer 30 is large. In addition, the location of the existence of defect-free mirror die in the wafer 30 is generally known.
Therefore, in embodiment 1, the control unit 45 of the die supply apparatus 11 is provided with a function (search range specifying unit) for specifying a search range for searching for a defective mirror surface die on the wafer 30. The processing time for searching for a non-defective mirror die can be shortened by specifying the search range for searching for a non-defective mirror die.
In this case, the operator may operate the input device 52 (search range specifying unit) to specify the search range while viewing the image of the wafer 30 displayed on the display device 51, or the controller 45 of the die supply apparatus 11 may automatically specify the search range. For example, when the wafer map data including the information of the types (the acceptable die, the defective die, and the like) of the dies 31 of the wafer 30 includes the information of the flawless mirror die, the control unit 45 of the die supply apparatus 11 may automatically specify the search range based on the wafer map data.
However, as shown in fig. 8, when scratches or stains are attached to the area where the brightness of the non-defective mirror surface bare chip is obtained, even if the non-defective mirror surface bare chip is used, the brightness of the area where the scratches or stains are attached may be different from the brightness of the other area, and thus the non-defective mirror surface bare chip may not be recognized.
Therefore, in embodiment 1, when a defective mirror die cannot be identified from the dies 31 existing within the designated search range, the control unit 45 of the die supply apparatus 11 changes at least one of the size of the area for obtaining the brightness, the position of the area, and the number of areas, and searches for the defective mirror die again. In the example shown in fig. 8, the size of the area for obtaining luminance is reduced, and the area for obtaining luminance is changed to an area in which the influence of scratches or stains can be almost ignored, whereby a defect-free mirror surface bare chip can be recognized.
As shown in fig. 9, even in the case of a production die, if the same pattern is formed in all of the five areas for obtaining the brightness, the brightness of the five areas can be regarded as constant, and therefore the production die is erroneously recognized as a defective mirror surface die.
As shown in fig. 10, even in the case of a production die, when a pattern is formed only in a region where luminance is not obtained and a pattern is not formed in five regions where luminance is obtained, it can be considered that the luminance of the five regions is constant, and therefore the production die is erroneously recognized as a defective mirror die.
When the production die is erroneously recognized as a non-defective mirror die as in the examples of fig. 9 and 10, the number of recognized defective mirror dies is larger than the number of actually existing non-defective mirror dies.
Therefore, in embodiment 1, when the number of non-defective mirror die identified in the specified search range is larger than the number of mirror die that are actually present, the control unit 45 of the die supply apparatus 11 changes at least one of the size of the area for obtaining the brightness, the position of the area, and the number of areas for the die identified as the non-defective mirror die, and searches for the non-defective mirror die again. In this way, when the production die is erroneously recognized as a non-defective mirror die, at least one of the size of the area for obtaining the luminance, the position of the area, and the number of areas is changed, so that the production die erroneously recognized as a non-defective mirror die may be normally recognized as not a non-defective mirror die (that is, a production die or a defective mirror die).
In the embodiment 1 described above, the luminances of five regions corresponding to the four corner portions and the central portion of each die in the image of the wafer 30 captured by the camera 42 are acquired, it is determined whether or not the luminances of the five regions can be regarded as constant, and a die that can be regarded as constant in luminance of the five regions is recognized as a defective mirror die, so that a defective mirror die can be recognized from the plurality of dies 31 of the wafer 30. This makes it possible to use the defective mirror die as a reference die (reference die) and to determine the position of the die 31 to be sucked from the position of the defective mirror die as a reference.
In example 1, the luminances of five regions corresponding to the four corner portions and the central portion of each die 31 are obtained, but an additional region for obtaining luminances may be added to the five regions to obtain luminances of six or more regions.
Example 2
Next, example 2 will be described with reference to fig. 11. Note that, the same reference numerals are given to substantially the same portions as those in embodiment 1, and the description is omitted or simplified, and the description is mainly given of different portions.
In example 1 described above, the luminances of at least five regions including regions corresponding to the four corner portions and the central portion of each die 31 were obtained, but in example 2, as shown in fig. 11, each die 31 in the image was divided into four regions each including one corner portion, the luminances of the four regions were obtained, whether or not the luminances of the four regions were considered to be constant was determined, and the die 31 whose luminance was considered to be constant was identified as a non-defective mirror die.
The same effects as in example 1 can be obtained.
It should be noted that the present invention is not limited to the above-described embodiments 1 and 2, and the configuration of the die supply apparatus 11, the configuration of the wafer pallet 32, and the like may be appropriately changed, and it goes without saying that various changes may be made without departing from the scope of the present invention.
Description of the reference numerals
11 \ 8230and a bare chip supply device; 30 \ 8230and a wafer; 31 \ 8230and bare chip; 32 \ 8230and a wafer supporting plate; 34 \ 8230and cutting plate; 37 \ 8230and a jacking cylinder; 41 8230a suction head; 42 8230a camera; 45 8230j a control unit (image processing device, search range specifying unit); 52 \ 8230and an input device (search range specifying unit).

Claims (12)

1. A mirror surface die image recognition system for recognizing a mirror surface die having a quadrilateral shape identical to a patterned production die and having no pattern or defect, from among a plurality of dies of a wafer diced to be divided into the plurality of dies, the mirror surface die image recognition system being characterized by comprising:
a camera for capturing an image of at least a portion of the wafer within a field of view; and
an image processing device for processing an image captured by the camera to identify a non-defective mirror surface die from each die in the image by distinguishing it from other dies,
the image processing device acquires the brightness of at least five regions including regions corresponding to the four corner portions and the central portion of each bare chip in the image, determines whether the difference between the brightness of the at least five regions is substantially constant, and identifies the bare chip with the difference between the brightness of the at least five regions being substantially constant as a non-defective mirror bare chip.
2. A mirror surface die image recognition system for recognizing a mirror surface die having a quadrilateral shape identical to a patterned production die and having no pattern or defect, from among a plurality of dies of a wafer diced to be divided into the plurality of dies, the mirror surface die image recognition system being characterized by comprising:
a camera for capturing at least a part of the wafer in a field of view; and
an image processing device for processing an image captured by the camera to identify a non-defective mirror surface die from each die in the image by distinguishing it from other dies,
the image processing apparatus divides each die in the image into four regions each including one corner portion, acquires luminances of the four regions, determines whether a difference in luminance between the four regions is substantially constant, and identifies a die having a substantially constant difference in luminance between the four regions as a non-defective mirror die.
3. The mirror die image recognition system of claim 1,
the image processing apparatus includes a search range specifying unit that specifies a search range for searching for a defective mirror bare chip in a wafer.
4. The mirror die image recognition system of claim 2, wherein,
the image processing apparatus includes a search range specifying unit that specifies a search range for searching for a non-defective mirror surface die in a wafer.
5. The mirror die image recognition system of claim 3, wherein,
the search range specifying section specifies the search range based on wafer mapping data including information on whether each die of the wafer is a production die or a non-defective mirror die.
6. The mirror die image recognition system of claim 4, wherein,
the search range specifying section specifies the search range based on wafer mapping data including information on whether each die of the wafer is a production die or a non-defective mirror die.
7. The mirror die image recognition system according to any one of claims 3 to 6,
when a defective mirror die cannot be identified from among the dies existing within the search range specified by the search range specifying unit, the image processing apparatus changes at least one of the size of the area for obtaining the brightness, the position of the area, and the number of areas and searches for the defective mirror die again.
8. The mirror die image recognition system according to any one of claims 3 to 6,
when the number of non-defective mirror surface bare chips recognized within the search range specified by the search range specifying unit is larger than the number of mirror surface bare chips that are actually not defective, the image processing apparatus changes at least one of the size of the area for acquiring the brightness, the position of the area, and the number of areas for the bare chips recognized as non-defective mirror surface bare chips, and re-searches for the non-defective mirror surface bare chips.
9. The mirror die image recognition system of claim 7,
when the number of non-defective mirror surface bare chips recognized within the search range specified by the search range specifying unit is larger than the number of mirror surface bare chips that are actually not defective, the image processing apparatus changes at least one of the size of the area for acquiring the brightness, the position of the area, and the number of areas for the bare chips recognized as non-defective mirror surface bare chips, and re-searches for the non-defective mirror surface bare chips.
10. A reference die setting system is characterized in that,
a defective mirror die recognized by the mirror die image recognition system according to any one of claims 1 to 9 is set as a reference die which is a reference position for determining the position of each production die.
11. A mirror surface die image recognition method for recognizing a mirror surface die having a same quadrilateral shape as a patterned production die and having no pattern and no defect, from among a plurality of dies of a wafer diced in such a manner as to be divided into the plurality of dies, differently from the defective mirror surface die and the production die,
at least a part of the wafer is captured within a field of view of a camera, the captured image is processed by an image processing device to acquire luminances of at least five regions including regions corresponding to four corner portions and a central portion of each die in the image, it is determined whether or not a difference in luminance of the at least five regions is substantially constant, and a die whose difference in luminance is substantially constant is recognized as a non-defective mirror die.
12. A mirror surface die image recognition method for recognizing a mirror surface die having the same shape of a quadrilateral as a patterned production die and having no pattern and no defect, from among a plurality of dies of a wafer diced by dividing into the plurality of dies, by distinguishing the defective mirror surface die and the production die,
at least a part of the wafer is captured in a field of view of a camera, the captured image is processed by an image processing device to divide each die in the image into four regions each including one corner portion, the luminances of the four regions are acquired, it is determined whether or not the difference in luminance between the four regions is substantially constant, and a die whose difference in luminance between the four regions is substantially constant is recognized as a non-defective mirror die.
CN201780074175.9A 2017-01-06 2017-01-06 Mirror surface bare chip image recognition system Active CN110024085B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2017/000279 WO2018127973A1 (en) 2017-01-06 2017-01-06 Mirror die image recognition system

Publications (2)

Publication Number Publication Date
CN110024085A CN110024085A (en) 2019-07-16
CN110024085B true CN110024085B (en) 2023-03-21

Family

ID=62790850

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201780074175.9A Active CN110024085B (en) 2017-01-06 2017-01-06 Mirror surface bare chip image recognition system

Country Status (5)

Country Link
US (1) US11030734B2 (en)
EP (1) EP3567626B1 (en)
JP (1) JP6635625B2 (en)
CN (1) CN110024085B (en)
WO (1) WO2018127973A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7430451B2 (en) * 2020-04-02 2024-02-13 株式会社ディスコ cutting equipment
CN114798479A (en) * 2022-03-09 2022-07-29 深圳宏芯宇电子股份有限公司 Bare chip screening method, device, equipment and storage medium

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1167876A (en) * 1997-08-14 1999-03-09 Hitachi Tokyo Electron Co Ltd Die recognition method and semiconductor manufacture device
US5881888A (en) * 1995-10-23 1999-03-16 Kabushiki Kaisha Shinkawa Wafer die pick-up method
JP2001035893A (en) * 1999-07-23 2001-02-09 Hitachi Ltd Apparatus for inspecting circuit pattern
CN1365445A (en) * 2000-03-24 2002-08-21 奥林巴斯光学工业株式会社 Apparatus for detecting defect
JP2002310627A (en) * 2001-04-19 2002-10-23 Sharp Corp Inspection method for semiconductor element, inspection program of semiconductor element, and recording medium recorded with the inspection program of the semiconductor element
JP2003031601A (en) * 2001-07-19 2003-01-31 Sony Corp Electronic component mounting device
JP2003086641A (en) * 2001-09-14 2003-03-20 Toko Inc Wafer mapping system
JP2007286000A (en) * 2006-04-20 2007-11-01 Dainippon Printing Co Ltd Inspecting device, inspecting method, and inspecting processing program
JP2008010447A (en) * 2006-06-27 2008-01-17 Renesas Technology Corp Method of manufacturing semiconductor device
JP2009192541A (en) * 2009-05-25 2009-08-27 Hitachi Ltd Defect inspection device
JP2010272615A (en) * 2009-05-20 2010-12-02 Panasonic Corp Chip inspection device and chip inspection method

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10011200A1 (en) * 2000-03-08 2001-09-13 Leica Microsystems Defect classification method for wafer inspection compares with reference is automatic and suitable for production line use
JP2002026041A (en) 2000-07-12 2002-01-25 Nec Machinery Corp Die bonder
US6756796B2 (en) * 2002-08-09 2004-06-29 Texas Instruments Incorporated Method of search and identify reference die
US7362494B2 (en) * 2006-04-13 2008-04-22 Texas Instruments Incorporated Micromirror devices and methods of making the same
JP2008145226A (en) * 2006-12-08 2008-06-26 Olympus Corp Apparatus and method for defect inspection
US20080188016A1 (en) * 2007-02-02 2008-08-07 Texas Instruments, Inc. Die detection and reference die wafermap alignment

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5881888A (en) * 1995-10-23 1999-03-16 Kabushiki Kaisha Shinkawa Wafer die pick-up method
JPH1167876A (en) * 1997-08-14 1999-03-09 Hitachi Tokyo Electron Co Ltd Die recognition method and semiconductor manufacture device
JP2001035893A (en) * 1999-07-23 2001-02-09 Hitachi Ltd Apparatus for inspecting circuit pattern
CN1365445A (en) * 2000-03-24 2002-08-21 奥林巴斯光学工业株式会社 Apparatus for detecting defect
JP2002310627A (en) * 2001-04-19 2002-10-23 Sharp Corp Inspection method for semiconductor element, inspection program of semiconductor element, and recording medium recorded with the inspection program of the semiconductor element
JP2003031601A (en) * 2001-07-19 2003-01-31 Sony Corp Electronic component mounting device
JP2003086641A (en) * 2001-09-14 2003-03-20 Toko Inc Wafer mapping system
JP2007286000A (en) * 2006-04-20 2007-11-01 Dainippon Printing Co Ltd Inspecting device, inspecting method, and inspecting processing program
JP2008010447A (en) * 2006-06-27 2008-01-17 Renesas Technology Corp Method of manufacturing semiconductor device
JP2010272615A (en) * 2009-05-20 2010-12-02 Panasonic Corp Chip inspection device and chip inspection method
JP2009192541A (en) * 2009-05-25 2009-08-27 Hitachi Ltd Defect inspection device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
A comparison of five standard methods for evaluating image intensity uniformity in partially parallel imaging MRI;Frank L Goerner 等;《Am. Assoc. Phys. Med.》;20130801;第40卷(第8期);文献号:082302 *

Also Published As

Publication number Publication date
JPWO2018127973A1 (en) 2019-07-25
US11030734B2 (en) 2021-06-08
US20190392574A1 (en) 2019-12-26
EP3567626B1 (en) 2021-09-01
WO2018127973A1 (en) 2018-07-12
JP6635625B2 (en) 2020-01-29
EP3567626A1 (en) 2019-11-13
EP3567626A4 (en) 2019-12-04
CN110024085A (en) 2019-07-16

Similar Documents

Publication Publication Date Title
US10721849B2 (en) Component data handling device and component mounting system
JP2002024804A (en) Part recognition data forming method, forming apparatus electronic component mounting apparatus, and recording medium
JP2014060249A (en) Die bonder and die position recognition method
CN110024085B (en) Mirror surface bare chip image recognition system
JP2010186867A (en) Method of positioning ejector pin and electronic component feeder using the same
JP5761771B2 (en) Wafer map data verification system
JP2021193744A (en) Semiconductor manufacturing equipment and method for manufacturing semiconductor device
JP4883636B2 (en) Electronic component orientation inspection apparatus, electronic component orientation inspection method, and electronic component placement machine
WO2017081773A1 (en) Image processing device and image processing method for base plate
JP6823156B2 (en) Backup pin recognition method and component mounting device
JP5903229B2 (en) Die bonder and semiconductor manufacturing method
KR20180116406A (en) An inspection information generation device, an inspection information generation method, and a defect inspection device
JP7427652B2 (en) A system and component mounting system consisting of a mounting data creation support device, a mounting data creation support method, a visual inspection machine, and a control device.
JP5773490B2 (en) Die push-up operation management system
JP2017130592A (en) Component data handling device, component data handling method, and component mounting system
JP2722469B2 (en) Recognition position correction method
JP2003156311A (en) Method and apparatus for detection and registration of alignment mark
CN110024098B (en) Bare chip element supply device
JP2007047933A (en) Method and device for image recognition of rectangular component
KR20170036222A (en) Method of inspecting dies
WO2022254703A1 (en) Component pickup device, component mounting device
EP3941176A1 (en) Object determination method and object determination device
JP2008283006A (en) Wafer position correction method and bonding equipment
JP2003258008A (en) Method for picking up electronic component
JP2001118860A (en) Method and device for recognizing semiconductor element, method and device for picking up thereby, and method and device for transfer

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant