JP2003086641A - Wafer mapping system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wafer mapping system capable of forming map data with cheap and simple arrangement. SOLUTION: A scanner 2 is disposed between an inspection process 1 and an assembly process 3, and imaging data on a surface of a wafer (W) obtained by the scanner 2 is supplied to a data processor 4. The data processor 4 corrects the distortion of the supplied image data (D1), and then a grid line suggesting a boundary between chips is formed. Thus, a region for forming individual chips is specified and the presence or absence of a marking (Mk) is determined in each region for forming individual chips to form mapping data.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for providing map data to a semiconductor manufacturing line in which an ink mark type manufacturing apparatus and a map type manufacturing apparatus coexist.

[0002]

2. Description of the Related Art In the process of manufacturing a semiconductor device, final device assembly is performed only for non-defective chips except defective chips. Here, the selection of non-defective / defective chips on the wafer is performed by a probing inspection device in the inspection process. As a matter of course, the result of the probing inspection as to whether the chip to be tested is good or bad must be recognizable by a die bonding device in the assembly process. Usually, good chips on the wafer during assembly process
The recognition of the defect determination result depends on one of two methods, ink marking and mapping.

Here, the ink marking method is a method that has been widely used in the past, and the surface of the object chip on the wafer determined to be defective is marked with ink in an inspection process (marking). It is a method. Ink marking on the defective chip is performed in parallel with the inspection work in the inspection process. In the assembly process, when the chips are taken out from the wafer, the marked chips are skipped, and only the good chips are taken out and assembled into a semiconductor device. In addition, the detection of the presence / absence of marking is currently mainly performed optically.

On the other hand, the mapping method is a method that has come to be carried out with the progress of control technology and data processing technology in recent years, and is a method that uses coordinate (map) data of a sample chip on a wafer. Is. Usually, the map data is electronically created at the same time as the inspection work, and is temporarily stored inside an information recording medium such as a data server. In the assembly process, when a wafer is set on the die bonding apparatus, map data corresponding to the wafer is taken in from the information recording medium. After that, the die bonding apparatus takes out only non-defective chips on the wafer according to the map data and assembles them into a semiconductor device.

[0005]

Techniques relating to efficient manufacturing methods and manufacturing apparatuses for semiconductor devices are advancing day by day. If the latest manufacturing method and manufacturing apparatus are introduced, naturally, it is thought that semiconductor devices can be manufactured more efficiently than before. However, the equipment used to manufacture semiconductor devices is very expensive. For this reason, it is rare for existing production lines to replace all the equipment in a process at once, and in fact, the merit of introducing new equipment
It is customary to partially replace the new manufacturing equipment after comprehensively considering the disadvantages.

The probing inspection apparatus is particularly expensive among the apparatuses for manufacturing semiconductor devices, as the inspection apparatus is expensive in other fields. Therefore, replacement of the probing inspection device is not easy. On the other hand, the die bonding apparatus can be replaced relatively easily if it has a merit in improving the assembling efficiency as compared with the conventionally used apparatus. The mapping type device has an advantage that the work speed can be increased, and many devices in recent years have adopted the mapping type. However, many conventional probing inspection apparatuses adopt only the ink marking method and do not have the function of creating map data.

Therefore, when a map type device is newly introduced into an existing semiconductor manufacturing line, an ink mark type device and a map type device coexist in the semiconductor manufacturing line, which causes a difference between processes or between devices. There is a discrepancy in the communication of information. In such a case, it is necessary to invest a large amount of money to renew the inspection equipment and unify the equipment of the semiconductor manufacturing line to the map method, or to introduce a new equipment / system for creating map data. There was Therefore, an object of the present invention is to provide a wafer mapping system capable of creating map data with a low cost and a simple configuration.

[0008]

The present invention for solving the above-mentioned problems includes a scanner device for creating image data of a wafer surface and a data processing device for creating map data. The data processing for creating the map data includes a first step of correcting distortion generated in the image data, a second step of identifying individual chip forming areas on the image data, and a defective chip for each chip forming area. And a third step of determining the presence or absence of the identification information.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION A scanner device is arranged between an inspection process and an assembly process, and image data of a wafer surface obtained by the scanner device is supplied to a data processing device. The data processing device corrects the distortion generated in the image data and then specifies each chip formation region. Then, the presence or absence of a defective mark is determined for each chip formation area on the image data, and the determination result is reflected in the simultaneously created map data to complete the map data. The obtained map data is stored and managed in the data processing device, and when a new wafer is set in the manufacturing device of the assembling process, the map data corresponding to the wafer is supplied from the data processing device to the assembling process.

In order to correct the distortion occurring in the image data, a vertical reference point and a horizontal reference point are set on the image data, and the vertical coordinate points of the vertical reference points are aligned by rotation, and then, The correction amount is calculated for each pixel of the image data from each coordinate value of the horizontal reference point. Specifically, a vertical reference point is set at two intersections of a vertical scribe line that bisects the wafer into left and right and two horizontal scribe lines located at the uppermost and lowermost tiers, and the vertical reference point is set to A horizontal reference point is set at two intersections of a horizontal scribe line that bisects the vertical direction and two vertical scribe lines that are located on the leftmost side and the rightmost side.

The individual chip formation regions are specified by superimposing grid lines on the image data. Specifically, the boundary between chips is defined by a plurality of horizontal parallel lines dividing the two vertical reference points by the number of chip formations and a plurality of vertical parallel lines dividing the two horizontal reference points by the number of chip formations. Generate a mesh-like grid line that implies.
When this grid line is superimposed on the image data on the monitor screen, the area surrounded by the grid line corresponds to each chip area, and each chip formation area can be specified.

[0012]

EXAMPLE A schematic semiconductor manufacturing process to which a wafer mapping system according to the present invention is applied is shown in FIG. The thick arrows in FIG. 1 indicate the flow of wafers, and the dotted arrows indicate the flow of data. In FIG. 1, the wafer W that has undergone the chemical / physical processing is supplied to the inspection step 1. Therefore, the wafer is subjected to a characteristic inspection for each chip, and as a result of the inspection,
A defective mark M is formed on the surface of the chip to be inspected that is determined to be defective.
k is given. The wafer whose characteristic inspection has been completed for all the chips is transferred to the scanner 2. The scanner 2 images the wafer surface (entire image) and creates image data D1. The wafer whose surface has been imaged is transferred to the assembly step 3, while the obtained image data D1 is supplied to the data processing system 4.

In the data processing system 4, the image data D1
Are subjected to various treatments so that the formation area of each chip can be specified. Then, the presence or absence of a defective mark is determined for each identified chip formation region. Map data is created for each wafer from various data including this determination result, and the completed map data is stored and managed in the system. When a new wafer is set on the die bonding apparatus in the assembling step 3, map data corresponding to the wafer is supplied from the data processing system 4 to the assembling step 3. As a result, in the assembling step 3, only non-defective chips are extracted from the wafer based on the supplied map data and semiconductor devices are assembled.

Here, inside the data processing system 4, each process as shown in FIG. 2 is specifically performed to create map data. First, pre-processing 11 is performed on the image data D1. Here, image enlargement is performed to display the image on the wafer surface on the monitor at an appropriate magnification, gray scale conversion is performed to convert the image data from color format to monochrome format, and color tone correction is performed to adjust the brightness and contrast of the image. .

It is inevitable that some distortion will occur in the optically photographed image. In particular, when an image taken by a scanner is displayed on a monitor screen, what is supposed to be a square is often a parallelogram although it should be a little, due to the hardware characteristics of the scanner. Therefore, in order to correct the distortion occurring in the image data D1,
Reference point setting 12, image rotation 1 for image data D1
3 and distortion correction 14 are sequentially performed.

That is, first, in the reference point setting 12,
Vertical reference points P1, P2, horizontal reference points P3, P4
To set. By the way, a plurality of scribe lines for separating chips are provided on the actual wafer surface. Therefore, the horizontal scribe lines SL1 and SL2 provided on the uppermost and lowermost stages and the vertical scribe lines SL3 and SL provided on the leftmost and rightmost sides.
4, a vertical scribe line SLV that divides the wafer into left and right portions, and a horizontal scribe line SLH that divides the wafer into upper and lower portions are used to set reference points P1 to P4.

Specifically, as shown in FIG. 3, the scribe lines SL1 to S are formed by the images displayed on the monitor screen.
Check L4, SLV, and SLH. The intersection of the scribe line SL1 and SLV and the scribe line SL2
Pixels at the intersections of SLV and SLV are artificially designated by a mouse or the like, and the vertical reference point P is set on the image data D1.
Set 1 and P2. Similarly, the scribe line S
Intersection of L3 and SLH and scribe line SL4 and SLH
Pixels at the intersections of are artificially designated with a mouse or the like, and horizontal reference points P3 and P4 are set on the image data D1.
To set.

Then, in the image rotation 13, the upper and lower reference points P1 and P2 set in the preceding process are arranged vertically on the screen, in other words, the vertical coordinate values of the reference points P1 and P2 are set. Rotate the entire image so that it looks the same.
After the image is rotated, the left and right reference points P3,
The image distortion is corrected so that P4s are arranged horizontally on the screen. Here, the specific image distortion correction operation is based on the coordinate values of the reference points P3 and P4 after rotation and the coordinate value of an arbitrary pixel, and the coordinate value of the arbitrary pixel (especially in the vertical direction). It is performed by calculating the correction amount of. By performing such two processes of rotation / distortion correction, the image displayed on the monitor screen changes as shown in FIGS. 4 (a) and 4 (b), and the image almost reflects the actual wafer surface. Become.

After the image distortion correction is completed, binarization 1
5, the threshold value is set for the color tone and each pixel forming the image is binarized. That is, the defective mark Mk is displayed in black, and most of the other is displayed in white (or vice versa). Then, the process proceeds to the grid generation 16 to generate a mesh-shaped grid line G that implies the boundary between chips, and superimposes it on the binarized image data D1 as shown in FIG. Then, each area surrounded by the grid lines G on the screen corresponds to an area where individual chips are formed.

By the way, as described above, the scribe lines at the top, bottom, left, and right are used to make the reference point P1.
When P4 to P4 are set, a plurality of horizontal parallel lines and vertical parallel lines that divide the reference points between the reference points P1 and P2 and the reference points P3 and P4 by the number of chips formed in each direction are drawn. , It is possible to easily generate a grid line G that implies the boundary between chips. Note that when the grid lines G are generated in this way, the reference points P1 to P4 become the image data D.
1 functions as a reference point for aligning the grid line G with each other, and the alignment of the image data D1 and the grid line G is automatically performed without performing a special alignment process.

After the grid lines are generated, the process proceeds to the defect judgment 17, and for each area surrounded by the grid lines G,
From the state (white or black) of the pixels in the area, it is determined whether or not the defective mark Mk is provided on the actual chip on the wafer implied by the area. Since the defective mark Mk is supposed to be provided substantially in the center of the chip, as shown in FIG. 6, a judgment area JR is further set inside the area surrounded by the grid lines G, and the judgment area JR is set within the judgment area JR. The presence or absence of the defective mark Mk is determined from the pixel state. When the determination region JR is set in this way, the number of pixels to be determined can be reduced, and at the same time, the color tone is the same as that of the defective mark Mk that appears like noise near the grid line G (boundary between chips). There is an advantage that the influence of the existing pixels can be eliminated.

Map data creation 18 is performed in response to the identification of the formation area of each chip in the grid generation 16 and the determination of the presence or absence of the defect mark Mk in the defect determination 17. Here, map data is created for each wafer based on information such as wafer information, chip number, chip existing position (= coordinates), and inspection result. Then, the result of the defect determination 17 is reflected on the sector of the inspection result to complete the map data. The map data created as a result of the above processing is stored in the data processing system 4. Then, it is downloaded from the data processing system 4 to the die bonding apparatus in response to a request from the assembly process.

In the above description of the embodiment, the format of the image data D1 is converted from color to monochrome in the preprocessing 11 of the data processing in the data processing system 4. However, in the case where the monochrome image data D1 is directly obtained from the scanner 2, the grayscale processing is naturally unnecessary. Of course, even when the data processing system is constructed so that the subsequent data processing is performed in color, the grayscale processing is not necessary.

Further, in correcting the distortion occurring in the image data D1, it has been described that the scribe line is used to set the respective reference points in the vertical direction and the horizontal direction. However, each reference point does not necessarily have to be set at the intersection of two scribe lines, and each reference point should be set at a characteristic portion of another wafer surface (for example, the position where an alignment mark exists). I don't mind. Further, in correcting the distortion generated in the image data D1, it is described that after performing vertical alignment by rotation, the correction amount is calculated from the coordinates of the horizontal reference point. By reversing this, after performing horizontal alignment by rotation, the correction amount may be calculated from the coordinates of the vertical reference point.

In an actual semiconductor device manufacturing line, a taping process, a cutting process, a wafer storage pool, etc. exist between the inspection process 1 and the assembly process 3, but they are not shown in FIG. In FIG. 1, the scanner 2
It is shown that the image data of the wafer surface is created immediately after the inspection step 2. However, the image data may be created after the taping / cutting process or after being stored in the pool for convenience of the process. In addition, in the inspection step 1, there is a coexistence of ink marking type and map type inspection devices, and the wafer may have to be inspected by both the inspection devices. In such a case, the wafer mapping system may be provided immediately after the ink marking type inspection device in the inspection process 1.

[0026]

As described above, the wafer mapping system according to the present invention is composed of a scanner device and a data processing device in terms of hardware, and supplies the image data of the wafer surface obtained by the scanner device to the data processing device. And create map data. At that time, as the first step,
After setting the reference points in the vertical and horizontal directions and aligning the vertical coordinate values of the vertical reference points by image rotation, calculate the correction amount for each pixel of the image data from each coordinate value of the horizontal reference points, Correct the distortion that occurs in the image data. As a second step, a grid is created that implies boundaries between chips, and individual chip formation regions are specified. And the third
As a step, the presence or absence of identification information of defective chips is determined for each chip formation region, and map data reflecting the determination result is created.

According to the present invention as described above, the map data can be easily obtained from the identification information of the defective mark of the ink mark system without introducing an expensive device dedicated to the semiconductor. Further, the distortion occurring in the image data obtained by the scanner device is simpler than that of the image data obtained by the CCD camera, and can be easily corrected. Therefore, it is possible to easily and inexpensively construct a wafer mapping system both in terms of hardware and software.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a wafer mapping system according to the present invention.

FIG. 2 is a flowchart of data processing for creating map data.

FIG. 3 is a diagram showing an image when a reference point is set.

FIG. 4 is a view showing a process of distortion correction.

FIG. 5 is a diagram showing an image when grid lines based on the reference chip area data are created on the image data.

FIG. 6 is a diagram showing a determination area in defective mark determination.

[Explanation of symbols]

1: Inspection process 2: Scanner device 3: Assembly process 4: Data processing device AM1 to AM4:
Alignment mark D1: Image data D2: Reference chip area data G: Grid line
Mk: Defect mark P1, P2: Vertical reference point P3, P4: Horizontal reference point W: Wafer

Claims (5)

[Claims] 1. A wafer mapping system for providing map data including information on defective chips for which extraction work from a wafer should be skipped, based on identification information of defective chips on the wafer, the wafer mapping system comprising: The data processing device includes a scanner device for creating surface image data and a data processing device for creating the map data, and the data processing for creating the map data in the data processing device eliminates distortion generated in the image data. A first step of correcting, and a second step of specifying individual chip formation regions on the image data
And a third step of determining presence / absence of identification information of the defective chip for each chip formation region. 2. The first step includes first and second reference points arranged in a first direction on a wafer surface,
A first operation of setting third and fourth reference points arranged in the second direction on the wafer surface, and a first operation of aligning the coordinate positions of the first and second reference points in the first direction by rotating the image. 2. The work of No. 2 and the third work of obtaining a distortion correction amount from the coordinate positions of the third and fourth reference points are included.
The wafer mapping system described in. 3. The second step is characterized in that grid lines implying boundaries between chips are generated and the individual chip formation regions are specified by superimposing the grid lines on the image data. The wafer mapping system according to claim 1. 4. The first operation of the first step is to set the first reference point at an intersection of a vertical scribe line that divides the wafer into two substantially left and right and a horizontal scribe line that is located at the uppermost stage. The second reference point is set at the intersection of the vertical scribe line that bisects the wafer into left and right and the horizontal scribe line that is located at the bottom, and the horizontal reference line that divides the wafer into upper and lower halves. The third reference point is set at the intersection of the scribe line and the leftmost vertical scribe line, and the horizontal scribe line that divides the wafer into upper and lower halves and the rightmost vertical scribe line. The wafer mapping system according to claim 2, wherein the fourth reference point is set at the intersection of 5. The plurality of horizontal parallel lines dividing the first reference point and the second reference point into the number of vertical chip formations, and the third reference point in the second step. And a grid-like grid line that indicates the boundary between the chips, which is composed of a plurality of vertical parallel lines that divides between the fourth reference point by the number of chips formed in the horizontal direction, and generates the grid lines in the image data. The wafer mapping system according to claim 4, wherein the individual chip formation regions are specified by overlapping.