CN110021690B - Method for reducing contact resistance of n-type AlGaN material and application thereof - Google Patents
Method for reducing contact resistance of n-type AlGaN material and application thereof Download PDFInfo
- Publication number
- CN110021690B CN110021690B CN201910209262.1A CN201910209262A CN110021690B CN 110021690 B CN110021690 B CN 110021690B CN 201910209262 A CN201910209262 A CN 201910209262A CN 110021690 B CN110021690 B CN 110021690B
- Authority
- CN
- China
- Prior art keywords
- ohmic contact
- layer
- type ohmic
- contact metal
- temperature treatment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Abstract
The invention relates to a method for reducing contact resistance of an n-type AlGaN material and application thereof. The method for reducing the contact resistance of the n-type AlGaN material comprises the following steps: firstly, removing the n-AlGaN layer with the depth of 1/5-1/2 by etching, and then carrying out high-temperature treatment on the surface of the etched n-AlGaN layer. The method solves the ohmic contact problem of the existing high Al component n-AlGaN material, remarkably reduces the contact resistance of the high Al component n-AlGaN material, improves the electrical property of the material, greatly reduces the working voltage of the relevant device prepared by the material, greatly reduces the heat dissipation of the device, and further improves the performance of the device.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to a method for reducing contact resistance of an n-type AlGaN material and application thereof.
Background
Ultraviolet LEDs, especially high Al component AlGaN-based deep ultraviolet LEDs (DUV-LEDs) with the light-emitting wavelength less than 280nm, attract the eyes of countless domestic and foreign researchers in recent years due to the huge application prospect in the fields of ultraviolet curing, medical treatment, military, water/air purification, sterilization and disinfection and the like, and become one of the research hotspots of wide-bandgap semiconductors.
However, the n-type contact performance of AlGaN with high Al composition for deep ultraviolet LD, LED and other optoelectronic devices is mainly limited to two aspects compared with GaN materials, on one hand, as the Al composition increases, the deep level defects gradually increase to increase the ionization energy of Si donors, decrease the mobility, and cause lower conductance, and as the Al composition increases, the electron affinity gradually decreases to cause higher schottky barrier at gold-half interface, and these intrinsic characteristics of the materials cause higher contact resistance of n-AlGaN; on the other hand, in the preparation process of the device, the etching process inevitably influences the surface of the material, for the GaN material, N vacancies are generated on the surface by etching to form a heavily doped layer, which is beneficial to forming ohmic contact, for the AlGaN material, particularly the AlGaN with high Al component, the N vacancies generated by etching are used as deep level compensation centers rather than shallow donors, and the ohmic contact of the N-AlGaN material is more difficult to form due to higher contact barrier. Therefore, ohmic contact of n-AlGaN materials with high Al composition is one of the problems to be solved in the development of such devices.
At present, two types of methods are generally adopted in the field to solve the problem, wherein one type is to obtain lower contact resistance by optimizing alloy conditions such as a metal electrode film system structure, heat treatment and the like; another is by surface treatment of the contact layer, such as wet etching, plasma bombardment and cleaning. The improvement of the optimized metal structure is limited, the process difficulty and the cost are increased, the controllability of wet etching of solutions such as acid and alkali is low, the instability and the repeatability are poor, and plasma bombardment needs special equipment and can cause secondary damage, so that the contact problem of the n-AlGaN material cannot be effectively solved by the conventional means.
Disclosure of Invention
Aiming at the problems and the defects, the invention provides a method for remarkably reducing the contact resistance of an n-type AlGaN material, and solves the problem that the ohmic contact preparation of the current high-Al-component n-type AlGaN material is difficult.
The technical scheme provided by the invention is as follows:
a method for reducing contact resistance of an n-type AlGaN-based material, comprising: firstly, removing the n-AlGaN layer with the depth of 1/5-1/2 by etching, and then carrying out high-temperature treatment on the surface of the etched n-AlGaN layer.
According to the invention, the etching technology and the high-temperature treatment technology are combined, and the high-temperature treatment is carried out on the surface of the etched n-AlGaN layer, so that the contact resistance of the n-type AlGaN material is obviously reduced, and the electrical property of the n-type AlGaN material is improved; therefore, the working voltage of the related device manufactured by the method is greatly reduced, the heat dissipation capacity of the device is greatly improved, and the performance of the device is further improved.
In the invention, the etching can be wet etching, dry ICP etching or RIE etching.
In the present invention, the high temperature treatment means: under the condition of protective gas, carrying out high-temperature treatment on the surface of the etched n-AlGaN layer by using process gas;
wherein the process gas is NH3And N2/H2The mixed gas of (3); preferably, when the mixed gas is NH3And N2When the flow rate is 1 (1-3); when the mixed gas is NH3And H2The flow ratio is 1 (1-3).
Wherein the temperature of the high-temperature treatment is 800-1200 ℃, and preferably 900-1100 ℃; the pressure is 50 to 150mbar, preferably 80 to 120 ℃; the treatment time is 10-120 min; preferably, the rate of temperature rise and fall is 1-3 deg.C/sec during the high temperature treatment.
Wherein the protective gas is N2,N2The flow rate is 1000-9000 sccm.
The high-temperature treatment can be carried out in any closed heating equipment which can be filled with required gas and can sustain high temperature.
The invention also provides application of the method in preparing a semiconductor device. The semiconductor device includes: ultraviolet Light Emitting Diodes (LEDs), ultraviolet Laser Diodes (LDs), ultraviolet photodetectors, High Electron Mobility Transistors (HEMTs), Heterojunction Bipolar Transistors (HBTs), biological detection sensors, and the like.
The invention also provides a preparation method of the deep ultraviolet LED chip, which comprises the following steps:
(1) epitaxially growing an AlN layer, an AlN/AlGaN layer, an n-AlGaN layer, a multi-quantum well layer, a p-AlGaN layer and a p-GaN layer on the surface of the substrate in sequence;
(2) removing the p-GaN layer, the p-AlGaN layer and the multi-quantum well layer corresponding to partial regions, removing the n-AlGaN layer by adopting the method, performing high-temperature treatment, and cooling to room temperature after the treatment is finished;
meanwhile, preparing a deep etching channel on the surface of the exposed n-AlGaN layer, extending to the surface of the substrate, and dividing the material into independent units;
(3) preparing n-type ohmic contact metal on the surface of the n-AlGaN layer subjected to high-temperature treatment in the step (2), and annealing; manufacturing p-type ohmic contact metal on the surface of the p-GaN layer, and annealing;
(4) firstly, integrally depositing an insulating layer on the surface of the obtained material, then removing the insulating layer corresponding to the n-type ohmic contact metal and the p-type ohmic contact metal to expose the corresponding n-type ohmic contact metal and the corresponding p-type ohmic contact metal, and preparing an n electrode and a p electrode on the surface of the insulating layer;
(5) and carrying out post-treatment to obtain the deep ultraviolet LED chip with the inverted structure.
In the above chip preparation method, in step (3), the annealing process conditions of the n-type ohmic contact metal are as follows: the temperature is 600-1000 ℃, the annealing time is 20-60 s, and the annealing atmosphere is N2. The n-type ohmic contact metal is one or a combination of more of titanium, aluminum, nickel, gold, vanadium and chromium or an alloy thereof.
In the step (3), the annealing process conditions of the p-type ohmic contact metal are as follows: the temperature is 350-650 ℃, the annealing time is 50-300 s, and the annealing atmosphere gas is O2(ii) a The p-type ohmic contact metal is one or more of nickel, silver, gold, titanium, palladium and tungsten or an alloy thereof.
In the step (4), the metal material of the electrode is selected from one or more of chromium, platinum, titanium, gold, aluminum, indium, vanadium and palladium or an alloy thereof.
In the step (5), the post-processing includes: grinding, polishing, scribing and the like.
The invention also provides the deep ultraviolet LED chip prepared by the method.
Compared with the prior art, the invention has the following beneficial effects:
1. the method solves the ohmic contact problem of the existing high Al component n-AlGaN material, remarkably reduces the contact resistance of the high Al component n-AlGaN material, improves the electrical property of the material, greatly reduces the working voltage of a related device prepared by the material, greatly improves the heat dissipation capacity of the device, and further improves the performance of the device.
2. The high-temperature surface treatment method under the special atmosphere adopted by the invention has the advantages of simplicity, easiness and strong controllability in the operation process, and can ensure the repeatability and reliability of mass production; and the subsequent process of the device is slightly influenced, the structural characteristics of the material cannot be damaged, and the process compatibility is very good.
3. The method has wide application range and can be suitable for semiconductor devices such as ultraviolet Light Emitting Diodes (LEDs), ultraviolet Laser Diodes (LDs), ultraviolet photoelectric detectors, High Electron Mobility Transistors (HEMTs), Heterojunction Bipolar Transistors (HBTs), biological detection sensors and the like.
Drawings
Fig. 1 is a diagram of a reticle used in manufacturing an electrode in example 1, where w is a side length of the electrode, d1, d2, d3, d4, d5, d6, and d7 are distances between two adjacent electrodes, and T1, T2, T3, T4, T5, T6, T7, and T8 refer to the electrodes, respectively.
FIG. 2 is a graph showing the results of the test of example 1, wherein (a) is an I-V curve of two samples in example 1, and (b) is an I-V curve between electrodes of sample 2.
FIG. 3 is a flow chart of a structural cross section of a deep ultraviolet LED chip manufacturing process described in example 2; wherein (a) - (g) are cross-sectional flow charts of each step in the preparation process;
in the figure: 1 is a sapphire substrate, 2 is an AlN layer, 3 is an AlN/AlGaN superlattice layer, 4 is an n-AlGaN layer, 5 is a multi-quantum well layer, 6 is a p-AlGaN layer, 7 is a p-GaN layer, 8 is n-type ohmic contact metal, 9 is p-type ohmic contact metal, and 10 is SiO2An insulating layer, 11 an n-electrode, and 12 a p-electrode.
FIG. 4 is an I-V curve of a deep ultraviolet LED chip as described in example 2.
Detailed Description
The following examples are intended to illustrate the invention but are not intended to limit the scope of the invention.
Example 1
The embodiment provides a method for reducing contact resistance of an n-type AlGaN material, which comprises the following steps:
(1) epitaxially growing an AlN layer, an AlN/AlGaN superlattice layer and an n-AlGaN layer on a substrate in sequence;
(2) etching part of the n-AlGaN layer to reach 200nm deeply; the etching can be wet etching, dry ICP etching or RIE etching;
(3) in a protective gas N2NH at a flow rate of 9000sccm in a flow rate ratio of 3:13And N2The mixed gas is used as a process gas, and the material obtained in the step (2) is subjected to high-temperature treatment;
the temperature of the high-temperature treatment is 900 ℃, the pressure is 100mbar, and the treatment time is 30 min; in the high-temperature treatment process, the rate of temperature rise and temperature drop is 2 ℃/sec;
and after the high-temperature treatment is finished, cooling to room temperature.
And (3) effect testing:
sample 1: the n-type AlGaN material obtained by the methods of step (1) and step (2) in example 1;
sample 2: the n-AlGaN material obtained in example 1 had a doping concentration of 1017~1018cm-3. Consistent with the doping concentration of sample 1.
Carrying out electrode manufacturing on the sample 1 and the sample 2, and carrying out high-temperature alloy to form ohmic contact; wherein the subsequent process comprises the following steps: photolithography, development, metal evaporation, lift-off, and the like; the figure of the photoetching plate adopted by photoetching is shown in figure 1, the side length w of an electrode is 200 mu m, and different distances dn are respectively 10, 15, 20, 25, 30, 35 and 40 mu m;
the test results were as follows:
measuring the I-V curve of each two adjacent electrodes in the graph of FIG. 1, measuring the current value of the electrodes within the same voltage range of-2V, and plotting the obtained data as shown in FIG. 2;
wherein FIG. 2(a) is a comparison of I-V curves between two electrodes T1-T2 for sample 1 and sample 2; as can be seen from fig. 2(a), sample 1 is not subjected to high temperature treatment after etching, and the contact is not ohmic; after the sample 2 is subjected to high-temperature treatment, the contact is represented as ohmic contact, and the contact resistance of the ohmic contact is kept unchanged along with the change of current; therefore, the contact resistance can be greatly reduced by high-temperature treatment.
FIG. 2(b) is an I-V curve between each two adjacent electrodes of the sample 2, and the specific contact resistivity of the sample 2 is obtained by fitting the data as ρc=4.3×10-4(Ω·cm2)。
Example 2
The embodiment provides a preparation method of a deep ultraviolet LED chip, which comprises the following steps:
(1) utilizing MOCVD equipment to epitaxially grow an AlN layer 2, an AlN/AlGaN layer 3, an n-AlGaN layer 4, a multi-quantum well layer 5, a p-AlGaN layer 6 and a p-GaN layer 7 on a clean sapphire surface 1 in sequence, wherein the structure of the layer is shown in a figure 3 (a);
(2) removing the p-GaN layer, the p-AlGaN layer, the multi-quantum well layer and the n-AlGaN layer with partial thickness in partial region by photoetching and ICP etching technology to expose the surface of the n-AlGaN layer, as shown in figure 3 (b);
(3) through photoetching and ICP etching technology, preparing a deep etching channel of the chip, extending to the surface of the sapphire, and dividing the chip into independent units, as shown in FIG. 3 (c);
(4) with N2+H2/NH3Performing high-temperature treatment on the material obtained in the step (3) as a process gas; wherein the high-temperature treatment temperature is 900 ℃, the high-temperature treatment time is 30min, and the heating rate and the cooling rate are 2 ℃/sec.
(5) Preparing N-type ohmic contact metal 8 on the surface of the N-AlGaN layer by a stripping method, and carrying out N treatment at the temperature of 600-1000 DEG C2Rapidly annealing for 20-60 s in the atmosphere; specifically, the n-type ohmic contact metal is one or a combination of several of titanium, aluminum, nickel, gold, vanadium, chromium or an alloy thereof, as shown in fig. 3 (d);
(6) manufacturing a p-type ohmic contact metal 9 on the surface of the p-GaN layer by a stripping method, and quickly annealing for 50-300 s in an O2 atmosphere at 350-650 ℃; specifically, the p-type ohmic contact metal is made of one or more of nickel, silver, gold, titanium, palladium, tungsten, or their alloys, as shown in fig. 3 (e);
(7) depositing a layer of SiO on the surface of the material by a PECVD method2An insulating layer 10; removing the insulating layer parts corresponding to the n-type ohmic contact metal and the p-type ohmic contact metal by using a photolithography technique and an ICP etching technique to expose the corresponding n-type ohmic contact metal and the corresponding p-type ohmic contact metal, as shown in fig. 3 (f);
(8) thickening metal is made on the n electrode and the p electrode by a stripping method to obtain an n electrode 11 and a p electrode 12; specifically, the thickened electrode is one or a combination of several of chromium, aluminum, titanium, vanadium, nickel, gold or an alloy thereof, as shown in fig. 3 (g).
(9) And preparing the deep ultraviolet LED chip with the inverted structure through the following steps of grinding, polishing, scribing and the like.
And (3) effect testing:
the I-V characteristic curve of the chip obtained in example 2 is shown in FIG. 4. As can be seen from FIG. 4, the operating voltage of the chip is only 6V at 20 mA. And the working voltage of the chip without high-temperature treatment is 8V.
Although the invention has been described in detail hereinabove with respect to a general description and specific embodiments thereof, it will be apparent to those skilled in the art that modifications or improvements may be made thereto based on the invention. Accordingly, such modifications and improvements are intended to be within the scope of the invention as claimed.
Claims (12)
1. A method for reducing contact resistance of an n-type AlGaN material, comprising: firstly, removing the n-AlGaN layer with the depth of 1/5-1/2 by etching, then carrying out high-temperature treatment on the surface of the etched n-AlGaN layer, and finally preparing n-type ohmic contact metal on the surface of the n-AlGaN layer subjected to the high-temperature treatment;
the high-temperature treatment refers to: under the condition of protective gas, carrying out high-temperature treatment on the surface of the etched n-AlGaN layer by using process gas; the process gas is N2And NH3Is a mixed gas of, or is H2And NH3The mixed gas of (3);
the temperature of the high-temperature treatment is 800-1200 ℃;
the pressure of the high-temperature treatment is 50-150 mbar.
2. The method as claimed in claim 1, wherein the temperature of the high temperature treatment is 900-1100 ℃.
3. A method according to claim 1 or 2, wherein the pressure of the high temperature treatment is 80-120 mbar.
4. The method according to claim 1 or 2, wherein the temperature increase and decrease rate is 1-3 ℃/sec during the high temperature treatment.
5. The method of claim 1, wherein when the mixed gas is NH3And N2When the flow rate is 1 (1-3); when the mixed gas is NH3And H2The flow ratio is 1 (1-3).
6. A method for manufacturing a semiconductor device, comprising the method according to any one of claims 1 to 5.
7. The method for manufacturing a semiconductor device according to claim 6, wherein the semiconductor device is: ultraviolet light emitting diode, ultraviolet laser diode, ultraviolet photoelectric detector, high electron mobility transistor, heterojunction bipolar transistor, biological detection sensor.
8. A preparation method of a deep ultraviolet LED chip is characterized by comprising the following steps:
(1) epitaxially growing an AlN layer, an AlN/AlGaN layer, an n-AlGaN layer, a multi-quantum well layer, a p-AlGaN layer and a p-GaN layer on the surface of the substrate in sequence;
(2) removing the p-GaN layer, the p-AlGaN layer and the multi-quantum well layer corresponding to partial regions, removing the n-AlGaN layer by adopting the method of any one of claims 1 to 5, performing high-temperature treatment, and cooling to room temperature after the treatment is finished;
meanwhile, preparing a deep etching channel on the surface of the exposed n-AlGaN layer, extending to the surface of the substrate, and dividing the material into independent units;
(3) preparing n-type ohmic contact metal on the surface of the n-AlGaN layer subjected to the high-temperature treatment in the step (2), and annealing; manufacturing p-type ohmic contact metal on the surface of the p-GaN layer, and annealing;
(4) firstly, integrally depositing an insulating layer on the surface of the obtained material, then removing the insulating layer corresponding to the n-type ohmic contact metal and the p-type ohmic contact metal to expose the corresponding n-type ohmic contact metal and the corresponding p-type ohmic contact metal, and preparing an n electrode and a p electrode on the surface of the insulating layer;
(5) and carrying out post-treatment to obtain the deep ultraviolet LED chip with the inverted structure.
9. The method for preparing the deep ultraviolet LED chip according to claim 8, wherein in the step (3), the annealing process conditions of the n-type ohmic contact metal are as follows: the temperature is 600-1000 ℃, the annealing time is 20-60 s, and the annealing atmosphere is N2;
The n-type ohmic contact metal is one or a combination of more of titanium, aluminum, nickel, gold, vanadium and chromium or an alloy thereof.
10. The method for preparing the deep ultraviolet LED chip according to claim 9, wherein in the step (3), the annealing process conditions of the p-type ohmic contact metal are as follows: the temperature is 350-650 ℃, the annealing time is 50-300 s, and the annealing atmosphere gas is O2(ii) a The p-type ohmic contact metal is one or more of nickel, silver, gold, titanium, palladium and tungsten or an alloy thereof.
11. The method for preparing the deep ultraviolet LED chip according to claim 9, wherein in the step (4), the metal material of the electrode is selected from one or more of chromium, platinum, titanium, gold, aluminum, indium, vanadium, palladium, or an alloy thereof.
12. The deep ultraviolet LED chip prepared by the preparation method according to any one of claims 8 to 11.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910209262.1A CN110021690B (en) | 2019-03-19 | 2019-03-19 | Method for reducing contact resistance of n-type AlGaN material and application thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910209262.1A CN110021690B (en) | 2019-03-19 | 2019-03-19 | Method for reducing contact resistance of n-type AlGaN material and application thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110021690A CN110021690A (en) | 2019-07-16 |
CN110021690B true CN110021690B (en) | 2021-02-09 |
Family
ID=67189692
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910209262.1A Active CN110021690B (en) | 2019-03-19 | 2019-03-19 | Method for reducing contact resistance of n-type AlGaN material and application thereof |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110021690B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112750925B (en) * | 2020-12-31 | 2022-04-08 | 广东省科学院半导体研究所 | Deep ultraviolet LED device structure and preparation method thereof |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102148154B (en) * | 2010-12-21 | 2012-10-10 | 中国电子科技集团公司第五十五研究所 | Multilayer ohmic contact system of gallium nitride device with composite metal barrier layer |
CN102185064A (en) * | 2011-04-19 | 2011-09-14 | 武汉华炬光电有限公司 | AlGaN base deep ultraviolet light-emitting diode (LED) device using multiple quantum well electronic barrier layer to improve luminescent efficiency and manufacturing method of AlGaN base deep ultraviolet LED device |
-
2019
- 2019-03-19 CN CN201910209262.1A patent/CN110021690B/en active Active
Also Published As
Publication number | Publication date |
---|---|
CN110021690A (en) | 2019-07-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6686610B2 (en) | Light emitting diode | |
US8525198B2 (en) | Ultraviolet light emitting diode devices and methods for fabricating the same | |
JP5596222B2 (en) | Semiconductor laminate, method for manufacturing the same, and semiconductor element | |
US9543467B2 (en) | Light emitting device | |
JPH1093137A (en) | Iii-v nitride semiconductor element | |
CN106025025A (en) | Epitaxial growth method capable of improving deep-ultraviolet LED luminous performance | |
CN101009346A (en) | Non polarity A side nitride film growing on the silicon substrate and its making method and use | |
JP2007059719A (en) | Nitride semiconductor | |
CN105023980A (en) | LED with P type A1InGaN contact layer, and preparation method thereof | |
CN110021690B (en) | Method for reducing contact resistance of n-type AlGaN material and application thereof | |
CN106876530B (en) | A kind of epitaxial wafer of gallium nitride based light emitting diode and preparation method thereof | |
Cho et al. | Analysis of reverse tunnelling current in GaInN light-emitting diodes | |
TWI394294B (en) | Light emitting element and manufacturing method thereof | |
KR20130068448A (en) | Light emitting diode | |
KR101528098B1 (en) | Method for manufacturing gallium nitride-type light emitting diode using oblique angle deposition and RTA | |
CN114497186A (en) | Preparation method of diamond/gallium oxide heterogeneous pn junction diode | |
CN111244234A (en) | Deep ultraviolet LED epitaxial wafer capable of improving n-type ohmic contact | |
US20140027770A1 (en) | Semiconductor laminate and process for production thereof, and semiconductor element | |
CN107275435B (en) | The ultraviolet avalanche probe of high-gain | |
CN111952424B (en) | Preparation method of AlGaInN-based LED with P-face passivation layer | |
CN212434643U (en) | Deep ultraviolet LED epitaxial wafer capable of improving N-type ohmic contact | |
KR101239848B1 (en) | A Manufacturing Method of Light emission Diode | |
KR20040079506A (en) | Method for manufacturing of light emitting device with composed chemical semiconductor | |
TWI394217B (en) | Method for fabricating bipolar transistor | |
US7397062B2 (en) | Heterojunction bipolar transistor with improved current gain |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20201016 Address after: 101300, No. two, 1 road, Shunyi Park, Zhongguancun science and Technology Park, Beijing, Shunyi District Applicant after: Beijing zhongbosin Semiconductor Technology Co., Ltd Address before: 100871 Beijing the Summer Palace Road, Haidian District, No. 5 Applicant before: Peking University |
|
TA01 | Transfer of patent application right | ||
GR01 | Patent grant | ||
GR01 | Patent grant |