CN109994141A - A kind of shared charge pump system applied to flash structure memory - Google Patents
A kind of shared charge pump system applied to flash structure memory Download PDFInfo
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- CN109994141A CN109994141A CN201711495611.8A CN201711495611A CN109994141A CN 109994141 A CN109994141 A CN 109994141A CN 201711495611 A CN201711495611 A CN 201711495611A CN 109994141 A CN109994141 A CN 109994141A
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- 239000003990 capacitor Substances 0.000 claims abstract description 48
- 230000005611 electricity Effects 0.000 claims description 14
- 230000006870 function Effects 0.000 claims description 10
- 240000002853 Nelumbo nucifera Species 0.000 claims description 3
- 235000006508 Nelumbo nucifera Nutrition 0.000 claims description 3
- 235000006510 Nelumbo pentapetala Nutrition 0.000 claims description 3
- 238000004146 energy storage Methods 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 10
- 239000000758 substrate Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 238000005086 pumping Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
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Abstract
The present invention provides a kind of shared charge pump systems applied to flash memory, including preceding driving stage charge pump, share level charge pump, positive high-voltage charge pump private-use class, negative high voltage charge pump private-use class, the first control switch and the second control switch, wherein, the storage capacitor shared in charge pump system is divided into the first storage capacitor, the second storage capacitor and third storage capacitor.The present invention is based on the device property of flash structure memory, the positive or negative voltage charge pump of different conditions is used, and the shared one-step charge pump of selectivity efficiently reduces the area of charge pump system, meanwhile, chip area is also saved, production cost is reduced.
Description
Technical field
The present invention relates to memory technology field, in particular to a kind of shared charge applied to flash structure memory
Pumping system.
Background technique
With the development of semiconductor technology, based on low-power consumption, inexpensive design requirement, the supply voltage of memory is usual
It is relatively low.However, the read-write in order to realize storage information, it usually needs much higher than the program voltage and erasing electricity of supply voltage
Pressure.Therefore, charge pump is widely used in memory, for by lower supply voltage obtain higher reading voltage,
Program voltage and erasing voltage.
Fig. 1 is a kind of existing flash cell flash electrical block diagram.In flash cell flash circuit, institute
Stating flash cell is 2T unit, is made of operating unit MN0 and selecting unit MN1, and the MN0 cell gate is SG, and draining is
BL, source electrode are connected to the drain electrode of the unit MN1, and substrate is connected to the substrate S PW of the unit MN1, the MN1 cell gate
For CG, source electrode SL.Wherein the grid of operating unit MN0 stores electricity to there is a special storing data layer between substrate
Son or hole are realized by applying operation voltage to each port described cell S G, CG, BL, SL, SPW to the flash cell MN0
Read operation, write operation and erasing operation.
When being operated to the flash cell, needs charge pump system while positive voltage and negative voltage being provided.So needing
Positive high-voltage charge pump system and negative high voltage charge pump system are wanted, what positive or negative high voltage charge pump be usually composed in series by, and Fig. 2 is existing
A kind of flash structure memory positive or negative high voltage charge pump system structural schematic diagram having, including positive charge pump 21 and negative charge pump
22。
When carrying out erasable operation to the flash cell, while positive high-voltage charge pump and negative high voltage charge pump are needed, because
The device property of flash structure memory, the load of negative high voltage charge pump current is larger when write operation, positive high voltage charge when wiping operation
Pump current loading is larger, in order to which the chip area for providing enough two high voltage electricities of driving capability pumps is all very big, production cost
It gets higher.
Summary of the invention
In view of the above-mentioned deficiencies in the prior art, it is applied to flash structure the object of the present invention is to provide one kind to deposit
The shared charge pump system of reservoir has a common voltage-multiplying circuit and storage capacitor structure, needs high current in positive high voltage
It uses when load (wiping operation) to positive high voltage, is used when negative high voltage needs large current load (write operation) to positive/negative-pressure,
Not only it can satisfy the driving requirement that read-write is wiped, but also chip area can be saved.
In order to reach above-mentioned technical purpose, the technical scheme adopted by the invention is that:
A kind of shared charge pump system applied to flash structure memory, the shared charge pump system include preceding driving stage
Charge pump, share level charge pump, positive high-voltage charge pump private-use class, negative high voltage charge pump private-use class, the first control switch and second
Control switch, wherein the storage capacitor in shared charge pump system is divided into the first storage capacitor, the second storage capacitor and third storage
It can capacitor；
Share level charge pump includes the first storage capacitor and charge pump of arbitrarily downgrading again, and one end of the first storage capacitor connects electricity of arbitrarily downgrading again
The input terminal of lotus pump；
Positive high-voltage charge pump private-use class includes the second storage capacitor and positive high-voltage charge pump, and one end connection of the second storage capacitor is just
The input terminal of high voltage electricity pump；
Negative high voltage charge pump private-use class includes third storage capacitor and negative high voltage charge pump, and one end connection of third storage capacitor is negative
The input terminal of high voltage electricity pump；
First control switch and the second control switch cannot simultaneously turn on；
One end of the first storage capacitor in the output end connection share level charge pump of preceding driving stage charge pump, share level charge pump
In the input terminal of charge pump of arbitrarily downgrading again connect the first control switch and the second control switch, the first control switch connects positive high voltage
The second storage capacitor in charge pump private-use class, positive high-voltage charge pump output programming positive high voltage used, the second control switch connect
Connect the third storage capacitor in negative high voltage charge pump private-use class, negative high voltage charge pump output programming negative high voltage used.
Preferably, the storage capacitor in the shared charge pump system uses low pressure MOS device and metal capacitance superposition side
Formula.
Preferably, the share level charge pump, the positive high-voltage charge pump private-use class, the negative high voltage charge pump private-use class
It is level-one either multi stage charge pump.
Preferably, the preceding driving stage charge pump includes a driving inverter switch, two resistance and two control switches,
Wherein, driving inverter switch, which is connected by a PMOS device with a NMOS device, forms, and a resistance connects a PMOS device and one
Control switch, another resistance connect a NMOS device and another control switch, and two control switches are selectively connected described in control
The output amplitude of preceding driving stage charge pump.
Preferably, the share level charge pump includes two PMOS devices, a NMOS device and a storage capacitor, wherein
When shared charge pump system work, the output selectivity of share level charge pump is supplied to the positive height in positive high-voltage charge pump private-use class
Charge pump, or the negative high voltage charge pump being supplied in negative high voltage charge pump private-use class are pressed, when shape is being write in flash memory work
When state, negative high voltage needs biggish load, and at this moment the first control switch turns off, the conducting of the first control switch, share level charge pump
The realization multiplication of voltage function signal of output is supplied to the negative high voltage charge pump in negative high voltage charge pump private-use class, and positive high-voltage charge pump
Positive high-voltage charge pump in private-use class loads very small at this time, is driven with the clock of VDD power supply threshold；Opposite, work as flash
For memory operation in wiping (non-write programming) state, positive high voltage needs biggish load, and at this moment the second control switch turns off, and first
The realization multiplication of voltage function signal of control switch conducting, the output of share level charge pump is supplied in positive high-voltage charge pump private-use class just
High voltage electricity pump, and the negative high voltage charge pump circuit in negative high voltage charge pump private-use class load at this time it is very small, with VDD power supply threshold
Clock driving.
The present invention is above-mentioned using shared charge pump system due to using, and beneficial effect obtained is to be based on flash
The positive or negative voltage charge pump of the device property of structure memory, different conditions uses, the shared one-step charge pump of selectivity,
The area of charge pump system is efficiently reduced, meanwhile, chip area is also saved, production cost is reduced.
The present invention will be further described with reference to the accompanying drawings and detailed description.
Detailed description of the invention
Fig. 1 is a kind of existing flash cell flash electrical block diagram.
Fig. 2 is existing flash structure memory positive or negative high voltage charge pump system structural schematic diagram.
Fig. 3 is a kind of shared charge pump system knot applied to flash structure memory of one of present invention specific implementation
Structure schematic diagram.
Fig. 4 is a kind of two shared charge pump system knot applied to flash structure memory of specific implementation of the invention
Structure schematic diagram.
Fig. 5 is a kind of three shared charge pump system knot applied to flash structure memory of specific implementation of the invention
Structure schematic diagram.
Specific embodiment
It referring to Fig. 3, is a kind of shared charge pump system applied to flash structure memory of one of present invention specific implementation
System structural schematic diagram.The shared charge pump system for being applied to flash structure memory includes preceding driving stage charge pump 31, shares
Grade charge pump 32, positive high-voltage charge pump private-use class 33, negative high voltage charge pump private-use class 34, the control of the first control switch S1 and second
Switch S2, wherein share level charge pump 32 includes the first storage capacitor C1 and charge pump doubler that arbitrarily downgrades again, the first energy storage electricity
The one end for holding C1 connects the input terminal for the charge pump doubler that arbitrarily downgrades again, and positive high-voltage charge pump private-use class 33 includes the second energy storage electricity
Hold the input of one end connection positive high-voltage charge pump Pump_pos of C2 and positive high-voltage charge pump Pump_pos, the second storage capacitor C2
End, negative high voltage charge pump private-use class 34 include third storage capacitor C3 and negative high voltage charge pump Pump_neg, third storage capacitor
The input terminal of one end connection negative high voltage charge pump Pump_neg of C3, the first control switch S1 and the second control switch S2 cannot be same
When be connected.
Referring to Fig. 3, should be applied in the shared charge pump system of flash structure memory, preceding driving stage charge pump 31
Output end connects one end of the first storage capacitor C1 in share level charge pump 32, the charge of arbitrarily downgrading again in share level charge pump 32
The input terminal for pumping doubler connects the first control switch S1 and the second control switch S2, the first control switch S1 connection positive high voltage
The second storage capacitor C2 in charge pump private-use class 33, positive high-voltage charge pump Pump_pos export flash-flash-cell and compile
The positive high voltage Hv_vpos of Cheng Suoyong, the third storage capacitor in the second control switch S2 connection negative high voltage charge pump private-use class 34
C3, negative high voltage charge pump Pump_neg export flash-flash-cell programming negative high voltage Hv_vneg used.
Referring to Fig. 4, for a kind of two shared charge pump system applied to flash structure memory of specific implementation of the invention
System structural schematic diagram.The shared charge pump system for being applied to flash structure memory includes preceding driving stage charge pump 41, shares
Grade charge pump 42, positive high-voltage charge pump private-use class 43, negative high voltage charge pump private-use class 44, the control of the first control switch S1 and second
Switch S2.
Referring in Fig. 4, the preceding driving stage charge pump 41 includes driving inverter switch PMOS device PM1, NMOS device
NM1, first resistor R1, second resistance R2, third control switch S3 and the 4th control switch S4, wherein third control switch S3 with
4th control switch S4 selectively conducting controls the output amplitude of the preceding driving stage charge pump 41, preceding driving stage charge pump 41
Output end connects one end of the first storage capacitor C1 of share level charge pump 42, and the other end of the first storage capacitor C1 connects altogether
The input terminal of the charge pump doubler that arbitrarily downgrades again in grade charge pump 42 is enjoyed, CK is clock input signal.
Referring in Fig. 4, the output end of share level charge pump 42 connects the first control switch S1 and the second control switch S2, the
One end of the second storage capacitor C2 in one control switch S1 connection positive high-voltage charge pump private-use class 43, positive high-voltage charge pump are dedicated
The input terminal of the other end connection positive high-voltage charge pump Pump_pos of the second storage capacitor C2 in grade 43, positive high-voltage charge pump
Pump_pos exports flash-flash-cell programming positive high voltage Hv_vpos used.
Referring in Fig. 4, third storage capacitor C3's in the second control switch S2 connection negative high voltage charge pump private-use class 44
One end, another input terminal for terminating to negative high voltage charge pump Pump_neg of third storage capacitor C3, negative high voltage charge pump Pump_
Neg exports flash-flash-cell programming negative high voltage Hv_vneg used.
Referring to Fig. 5, for a kind of three shared charge pump system applied to flash structure memory of specific implementation of the invention
System structural schematic diagram.This is applied in the shared charge pump system of flash structure memory, and 51 be preceding driving stage charge pump, CK
For clock input signal, PM1 is PMOS device, and NM1 is NMOS device, clock input signal CK be connected to PMOS device PM1 and
On the grid of NMOS device NM1, the source electrode of PMOS device PM1 connects power supply signal VDD, and the source electrode of NMOS device NM1 is grounded,
PMOS device PM1 drain electrode connects together output CKb signal with the drain electrode of NMOS device NM1, and CKb signal is clock input signal
The power supply signal of signal after CK reverse phase, clock input signal CK and CKb signal is all VDD.
Referring in Fig. 5,52(times of share level charge pump is arbitrarily downgraded) purpose be the signal times that will be inputted for power supply threshold 0 to 1VDD
The power supply threshold for being pressed onto 0 to 2VDD gives subsequent positive high-voltage charge pump Pump_pos and negative high voltage charge pump Pump_neg use.
PM2, PM3 are PMOS device, and NM2 is NMOS device, and clock input signal CK is connected to PMOS device PM3's and NMOS device NM2
On grid, the source electrode of PMOS device PM3 connects the drain electrode of PM2, the source electrode ground connection of NMOS device NM2, PMOS device PM3 drain electrode and
The drain electrode of NMOS device NM2 is connected to output multiplication of voltage function signal CKH, multiplication of voltage function signal CKH together and is connected to PMOS device simultaneously
The grid of PM2.When initial clock input signal CK is high level, CKb signal is low level 0, output end multiplication of voltage function signal
CKH is low level 0, and PMOS device PM2 is connected, and A point is slowly flushed to VDD current potential；When clock input signal CK failing edge, CKb
Rising edge, when CKb rises, the current potential of A point is lifted to 2VDD, and NMOS device NM2 is closed, PMOS device PM3 conducting, the storage of A point
2VDD current potential output end CKH is transmitted to by PMOS device PM3；When clock input signal CK rising edge, CKb failing edge is defeated
Outlet CKH is forgotten about it low level；So final output CKH provides 0 CLK signal for arriving 2VDD, to realize multiplication of voltage function.
Referring in Fig. 5, the output selectivity of share level charge pump 52 is supplied in positive high-voltage charge pump private-use class 53 just
High voltage electricity pumps Pump_pos, or the negative high voltage charge pump Pump_neg being supplied in negative high voltage charge pump private-use class 54, when
Flash memory works in write state, and negative high voltage hv_vneg needs biggish load, and at this moment the first control switch S1 is closed
Disconnected, the first control switch S2 conducting, the CKH for the realization multiplication of voltage function that share level charge pump 52 exports is supplied to negative high voltage charge pump
Negative high voltage charge pump Pump_neg in private-use class 54, and the positive high-voltage charge pump Pump_ in positive high-voltage charge pump private-use class 53
Pos loads very small at this time, is driven with the clock of VDD power supply threshold.Opposite, when flash memory work is (non-write in wiping
Programming) state when, positive high voltage hv_vpos needs biggish load, and at this moment the second control switch S2 is turned off, the first control switch S1
The CKH of conducting, the realization multiplication of voltage function that share level charge pump 52 exports is supplied to the positive height in positive high-voltage charge pump private-use class 53
Charge pump Pump_pos is pressed, and the negative high voltage charge pump Pump_neg circuit in negative high voltage charge pump private-use class 54 loads at this time
It is very small, it is driven with the clock of VDD power supply threshold.
Illustrate the present invention for preferred embodiment above, for the invention thinking other expand for example, same sample prescription
Formula switches the difference of power device grid voltage mode, and the different form of bleeder circuit changes, therefore all concepts under this invention
With spiritual equivalent change or modification for it, in the range of should be included in claims of the present invention.
Claims (5)
1. a kind of shared charge pump system applied to flash structure memory, which is characterized in that the shared charge pump system
Including preceding driving stage charge pump, share level charge pump, positive high-voltage charge pump private-use class, negative high voltage charge pump private-use class, the first control
System switch and the second control switch, wherein the storage capacitor in shared charge pump system is divided into the first storage capacitor, the second energy storage
Capacitor and third storage capacitor；
Share level charge pump includes the first storage capacitor and charge pump of arbitrarily downgrading again, and one end of the first storage capacitor connects electricity of arbitrarily downgrading again
The input terminal of lotus pump；
Positive high-voltage charge pump private-use class includes the second storage capacitor and positive high-voltage charge pump, and one end connection of the second storage capacitor is just
The input terminal of high voltage electricity pump；
Negative high voltage charge pump private-use class includes third storage capacitor and negative high voltage charge pump, and one end connection of third storage capacitor is negative
The input terminal of high voltage electricity pump；
First control switch and the second control switch cannot simultaneously turn on；
One end of the first storage capacitor in the output end connection share level charge pump of preceding driving stage charge pump, share level charge pump
In the input terminal of charge pump of arbitrarily downgrading again connect the first control switch and the second control switch, the first control switch connects positive high voltage
The second storage capacitor in charge pump private-use class, positive high-voltage charge pump output programming positive high voltage used, the second control switch connect
Connect the third storage capacitor in negative high voltage charge pump private-use class, negative high voltage charge pump output programming negative high voltage used.
2. being applied to the shared charge pump system of flash structure memory as described in claim 1, which is characterized in that described
Storage capacitor in shared charge pump system uses low pressure MOS device and metal capacitance stacked system.
3. being applied to the shared charge pump system of flash structure memory as described in claim 1, which is characterized in that described
Share level charge pump, the positive high-voltage charge pump private-use class, the negative high voltage charge pump private-use class are that level-one is either multistage
Charge pump.
4. being applied to the shared charge pump system of flash structure memory as described in claim 1, which is characterized in that described
Preceding driving stage charge pump includes a driving inverter switch, two resistance and two control switches, wherein driving inverter switch
It is connected and is formed with a NMOS device by a PMOS device, a resistance connects a PMOS device and a control switch, and another resistance connects
A NMOS device and another control switch are connect, the selectively conducting of two control switches controls the output of the preceding driving stage charge pump
Amplitude.
5. being applied to the shared charge pump system of flash structure memory as described in claim 1, which is characterized in that described
Share level charge pump includes two PMOS devices, a NMOS device and a storage capacitor, wherein shared charge pump system work
When, the output selectivity of share level charge pump is supplied to the positive high-voltage charge pump in positive high-voltage charge pump private-use class, or provides
To the negative high voltage charge pump in negative high voltage charge pump private-use class, when flash memory work is in write state, negative high voltage need compared with
Big load, at this moment the first control switch turns off, the conducting of the first control switch, the realization multiplication of voltage function of share level charge pump output
Signal is supplied to the negative high voltage charge pump in negative high voltage charge pump private-use class, and the positive high voltage electricity in positive high-voltage charge pump private-use class
Lotus pump loads very small at this time, is driven with the clock of VDD power supply threshold；Opposite, when flash memory work is (non-in wiping
Write programming) state when, positive high voltage needs biggish load, and at this moment the second control switch turns off, and the conducting of the first control switch is shared
The realization multiplication of voltage function signal of grade charge pump output is supplied to the positive high-voltage charge pump in positive high-voltage charge pump private-use class, and negative high
It presses the negative high voltage charge pump circuit in charge pump private-use class to load at this time very small, is driven with the clock of VDD power supply threshold.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201711495611.8A CN109994141A (en) | 2017-12-31 | 2017-12-31 | A kind of shared charge pump system applied to flash structure memory |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711495611.8A CN109994141A (en) | 2017-12-31 | 2017-12-31 | A kind of shared charge pump system applied to flash structure memory |
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