CN109982521B - Preparation method of 16-layer arbitrary interconnection circuit board - Google Patents
Preparation method of 16-layer arbitrary interconnection circuit board Download PDFInfo
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- CN109982521B CN109982521B CN201910232791.3A CN201910232791A CN109982521B CN 109982521 B CN109982521 B CN 109982521B CN 201910232791 A CN201910232791 A CN 201910232791A CN 109982521 B CN109982521 B CN 109982521B
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- copper foil
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Laser Beam Processing (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention relates to a preparation method of a 16-layer arbitrary interconnected circuit board, which comprises the steps of firstly carrying out brown oxidation treatment on an upper copper foil layer and a lower copper foil layer of a printed circuit substrate to form brown oxidation layers, placing the treated printed circuit substrate on a carbon dioxide laser processing table to carry out carbon dioxide laser drilling, removing glue copper after chemical micro-etching is removed, filling copper in laser holes, then adopting laser to directly image, and finally respectively laying a layer of prepreg above the upper copper foil layer and below the lower copper foil layer and adopting oil pressure equipment to carry out pressing. The steps are repeated until a 16-layer circuit board is laminated. The preparation method is simple, the steps are easy to operate, and the printed circuit substrate has ultrahigh-order and multilayer design after 8 times of laser, 8 times of hole filling and electroplating and 7 times of pressing, so that the printed circuit substrate has enough space for arranging circuits and mounting components, thereby realizing powerful functional application and perfect user experience of electronic products.
Description
Technical Field
The invention relates to a preparation method of a 16-layer arbitrary interconnected circuit board, belonging to the technical field of printed circuit board processing.
Background
Electronic products such as smart mobile phones, tablet computers and wearable devices are developing towards miniaturization and multi-functionalization, the number of components to be carried is greatly increased, and the space reserved for a circuit board is more and more limited. In such a background, the precision of the PCB is continuously improved, so that the PCB can accommodate more components with reduced size, weight and volume. The 16-layer arbitrary interconnected circuit board is used as an extremely high-density circuit board, has long processing flow and extremely high requirements on materials, equipment and production processes.
Disclosure of Invention
The invention aims to solve the problems and provides a preparation method of a 16-layer arbitrary interconnection circuit board.
The invention adopts the following technical scheme: a preparation method of a 16-layer arbitrary interconnected circuit board comprises the following steps:
(1) carrying out brown oxidation treatment on an upper copper foil layer and a lower copper foil layer of a printed circuit substrate to form a brown oxidation layer, wherein the micro-etching amount of the brown oxidation layer is 2.5-3.5 mu m;
(2) placing the processed printed circuit substrate on a carbon dioxide laser processing table for carbon dioxide laser drilling;
(3) removing the browning layers of the upper copper foil layer and the lower copper foil layer by chemical microetching, and then removing gelatinized copper, wherein the chemical microetching amount is 0.8 mu m;
(4) an insoluble anode is used for vertical continuous electroplating equipment, copper ions are provided by copper oxide powder, the electroplating uniformity and the electroplating smoothness are improved, and the laser holes are filled with copper;
(5) manufacturing circuit patterns on the upper copper foil layer and the lower copper foil layer by a laser direct imaging process;
(6) respectively laying a layer of prepreg above the upper copper foil layer and below the lower copper foil layer, and laminating by adopting oil pressure equipment, wherein the prepreg is heated in the laminating process, the heating temperature is 205 ℃ at most, and the heating rate is 3 ℃/min;
(7) repeating the steps (1) - (6) for 7 times in total until 16 layers of any interconnected circuit boards are formed. In order to avoid the poor reliability caused by excessive solidification of the materials pressed in the front, the pressing pressure is increased along with the increase of the pressing times, and the pressure range is 320-380 psi.
Furthermore, the intermediate level of printed circuit board is the thermosetting resin substrate layer, and the thickness of intermediate level is 0.05~0.075 mm.
Further, immersion treatment is adopted during the browning treatment, the treatment temperature is 30-40 ℃, and the linear speed is 1.6-1.8 m/min.
Furthermore, the carbon dioxide laser adopts flat-head pulse waves, the diameter of a processed aperture is 1.6-2.2 mm, the pulse width is 3-12 mu s, the energy is 6-14 MJ, and the number of the processed apertures is 3-4.
Furthermore, the alignment precision of the laser direct imaging process is 25 μm.
Further, the pressure uniformity of the oil pressure device in the step (6) is less than 50 μm.
Further, the prepreg in the step (6) is an FR-4 board, the thermal cracking temperature of the FR-4 board is 380 ℃, and the Z-axis expansion coefficient is 155 PPM/DEG C.
Further, in the step (7), the pressure of the first two times of pressing in the 7 times of pressing is 320psi, the pressure of the middle three times of pressing is 350psi, and the pressure of the last two times of pressing is 380psi, so as to avoid the poor reliability caused by excessive curing of the materials of the first pressing.
The preparation method is simple, the steps are easy to operate, and the printed circuit substrate has ultrahigh-order and multilayer design after 8 times of laser, 8 times of hole filling and electroplating and 7 times of pressing, so that the printed circuit substrate has enough space for arranging circuits and mounting components, thereby realizing powerful functional application and perfect user experience of electronic products.
Drawings
Fig. 1 is a schematic structural diagram of a 16-layer circuit board according to the present invention.
FIG. 2 is a schematic diagram of steps of an embodiment of the present invention.
Fig. 2-1 to 2-6 are schematic diagrams of corresponding steps in the embodiment of the present invention.
Detailed Description
The invention will be further described with reference to the accompanying drawings.
The first embodiment is as follows: as shown in fig. 2-1 to 2-6, a method for manufacturing a 16-layer arbitrary interconnection circuit board, taking 4-layer lamination into 6-layer lamination as an example, includes the following steps:
(1) brown oxidation treatment: performing brown oxidation treatment on an upper copper foil layer and a lower copper foil layer of a printed circuit substrate to be subjected to laser drilling to form a brown oxidation layer; the middle layer of the printed circuit board is a thermosetting resin base material layer, and the thickness is 0.075 mm.
(2) Placing the printed circuit substrate on a carbon dioxide laser processing table for carbon dioxide laser processing; the carbon dioxide laser adopts flat head pulse wave, and according to different thicknesses of prepregs of the printed circuit board, the processed aperture diameter is 2.2mm, the pulse width is 11 mus, the energy is 11mj, and the number of the shots is 4.
(3) Removing the browning layers on the upper copper foil layer and the lower copper foil layer through chemical etching, and then removing the gelatinized copper.
(4) By using insoluble anode vertical continuous electroplating equipment and adopting copper oxide powder to replace copper balls to provide copper ions, the electroplating uniformity and the electroplating smoothness are improved, the laser holes are filled with copper, and the copper surface depression after hole filling is less than or equal to 10 microns.
(5) Manufacturing circuit patterns on the upper copper foil layer and the lower copper foil layer by a laser direct imaging process;
(6) the FR4 material with high heat resistance and low expansion coefficient is adopted for pressing, the thermal cracking temperature is as high as 380 ℃, the Z-axis expansion coefficient is 155 PPM/DEG C (when the temperature exceeds 170 ℃), the pressing pressure is 320psi, and the heating rate is 3 ℃/min.
Example two: as shown in fig. 2-1 to 2-6, a method for manufacturing a 16-layer arbitrary interconnection circuit board, taking 4-layer lamination into 6-layer lamination as an example, includes the following steps:
(1) brown oxidation treatment: performing brown oxidation treatment on an upper copper foil layer and a lower copper foil layer of a printed circuit substrate to be subjected to laser drilling to form a brown oxidation layer; the intermediate layer of the printed circuit board is a thermosetting resin base material layer, and the thickness is 0.05 mm.
(2) Placing the printed circuit substrate on a carbon dioxide laser processing table for carbon dioxide laser processing; the carbon dioxide laser adopts flat head pulse wave, and according to different thicknesses of prepregs of the printed circuit board, the processed aperture diameter is 1.6mm, the pulse width is 12 mus, the energy is 9mj, and the number of the shots is 3.
(3) Removing the browning layers on the upper copper foil layer and the lower copper foil layer through chemical etching, and then removing the gelatinized copper.
(4) By using insoluble anode vertical continuous electroplating equipment and adopting copper oxide powder to replace copper balls to provide copper ions, the electroplating uniformity and the electroplating smoothness are improved, the laser holes are filled with copper, and the copper surface depression after hole filling is less than or equal to 10 microns.
(5) Manufacturing circuit patterns on the upper copper foil layer and the lower copper foil layer by a laser direct imaging process;
(6) the FR4 material with high heat resistance and low expansion coefficient is adopted for lamination, the thermal cracking temperature is as high as 380 ℃, the Z-axis expansion coefficient is 155 PPM/DEG C (when the temperature exceeds 170 ℃), the lamination pressure is 320psi, and the heating rate is 3 ℃/min;
the steps (1) to (6) in the second embodiment are repeated for 7 times in a cumulative manner, the pressure of the first two times of pressing in the 7 times of pressing is 320psi, the pressure of the middle three times of pressing is 350psi, and the pressure of the last two times of pressing is 380psi, so as to avoid the poor reliability caused by excessive curing of the materials of the first pressing, and finally form the 16-layer circuit board shown in fig. 1.
Claims (4)
1. A preparation method of a 16-layer arbitrary interconnection circuit board is characterized by comprising the following steps: the method comprises the following steps:
(1) carrying out brown oxidation treatment on an upper copper foil layer and a lower copper foil layer of a printed circuit substrate to form a brown oxidation layer, wherein the micro-etching amount of the brown oxidation layer is 2.5-3.5 mu m;
(2) placing the processed printed circuit substrate on a carbon dioxide laser processing table for carbon dioxide laser drilling;
(3) removing the browning layers of the upper copper foil layer and the lower copper foil layer by chemical microetching, and then removing gelatinized copper, wherein the chemical microetching amount is 0.8 mu m;
(4) an insoluble anode is used for vertical continuous electroplating equipment, copper ions are provided by copper oxide powder, the electroplating uniformity and the electroplating smoothness are improved, and the laser holes are filled with copper;
(5) manufacturing circuit patterns on the upper copper foil layer and the lower copper foil layer by a laser direct imaging process;
(6) respectively laying a layer of prepreg above the upper copper foil layer and below the lower copper foil layer, and laminating by adopting oil pressure equipment, wherein the prepreg is heated in the laminating process, the heating temperature is 205 ℃ at most, and the heating rate is 3 ℃/min;
(7) repeating the steps (1) - (6) for 7 times until a 16-layer arbitrary interconnected circuit board is formed; in order to avoid the poor reliability caused by excessive curing of the materials pressed in front, the pressing pressure is increased along with the increase of the pressing times, and the pressure range is 320-380 psi;
the browning treatment adopts immersion treatment, the treatment temperature is 30-40 ℃, and the linear speed is 1.6-1.8 m/min;
the carbon dioxide laser adopts flat-head pulse waves, the diameter of a processed aperture is 1.6-2.2 mm, the pulse width is 3-12 mu s, the energy is 6-14 MJ, and the number of the processed pulses is 3-4;
the prepreg in the step (6) is an FR-4 board, the thermal cracking temperature of the FR-4 board is 380 ℃, and the Z-axis expansion coefficient is 155 PPM/DEG C;
in the step (7), the pressure of the first two times of pressing in the 7 times of pressing is 320psi, the pressure of the middle three times of pressing is 350psi, and the pressure of the last two times of pressing is 380psi, so that the problem that the reliability of the material pressed in the front is poor due to excessive curing is solved.
2. The method of manufacturing a 16-layer arbitrary interconnect circuit board of claim 1, wherein: the intermediate layer of the printed circuit board is a thermosetting resin base material layer, and the thickness of the intermediate layer is 0.05-0.075 mm.
3. The method of manufacturing a 16-layer arbitrary interconnect circuit board of claim 1, wherein: the alignment precision of the laser direct imaging process is 25 mu m.
4. The method of manufacturing a 16-layer arbitrary interconnect circuit board of claim 1, wherein: and (4) the pressure uniformity of the oil pressure equipment in the step (6) is less than 50 um.
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CN111970844A (en) * | 2020-09-07 | 2020-11-20 | 深圳市星河电路股份有限公司 | Manufacturing process flow method of HDI board with any layer |
WO2022151012A1 (en) * | 2021-01-13 | 2022-07-21 | 柏承科技(昆山)股份有限公司 | Film stripping, degumming and chemical copper processing three-in-one process capable of preventing degumming contamination |
CN116634675B (en) * | 2023-05-25 | 2023-11-21 | 江苏博敏电子有限公司 | Method for eliminating laser hole adhesive residue of core plate layer of any layer of interconnection printed circuit board |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5544773A (en) * | 1991-09-06 | 1996-08-13 | Haruta; Youichi | Method for making multilayer printed circuit board having blind holes and resin-coated copper foil used for the method |
CN104349609A (en) * | 2013-08-08 | 2015-02-11 | 北大方正集团有限公司 | Printed circuit board and manufacturing method thereof |
CN105101623A (en) * | 2015-08-27 | 2015-11-25 | 高德(无锡)电子有限公司 | Circuit board with ultra-thin medium layers and fabrication technology of circuit board |
CN105530767A (en) * | 2016-01-26 | 2016-04-27 | 江苏博敏电子有限公司 | Streamline production process for HDI board |
CN107454760A (en) * | 2017-08-24 | 2017-12-08 | 高德(无锡)电子有限公司 | The radium-shine through-hole approaches of carbon dioxide laser |
Family Cites Families (1)
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JPH1154914A (en) * | 1997-08-06 | 1999-02-26 | Mitsubishi Gas Chem Co Inc | Manufacturing built-up multilayered printed wiring board |
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Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5544773A (en) * | 1991-09-06 | 1996-08-13 | Haruta; Youichi | Method for making multilayer printed circuit board having blind holes and resin-coated copper foil used for the method |
CN104349609A (en) * | 2013-08-08 | 2015-02-11 | 北大方正集团有限公司 | Printed circuit board and manufacturing method thereof |
CN105101623A (en) * | 2015-08-27 | 2015-11-25 | 高德(无锡)电子有限公司 | Circuit board with ultra-thin medium layers and fabrication technology of circuit board |
CN105530767A (en) * | 2016-01-26 | 2016-04-27 | 江苏博敏电子有限公司 | Streamline production process for HDI board |
CN107454760A (en) * | 2017-08-24 | 2017-12-08 | 高德(无锡)电子有限公司 | The radium-shine through-hole approaches of carbon dioxide laser |
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Address after: Jiangsu province Wuxi Chunhui road 214101 Xishan City Economic Development Zone No. 32 Patentee after: Gaode (Jiangsu) Electronic Technology Co.,Ltd. Address before: Jiangsu province Wuxi Chunhui road 214101 Xishan City Economic Development Zone No. 32 Patentee before: GULTECH (JIANGSU) ELECTRONIC TECHNOLOGIES CO.,LTD. |
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