CN109949769A - It is capable of the display device of expansion of gradation - Google Patents

It is capable of the display device of expansion of gradation Download PDF

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Publication number
CN109949769A
CN109949769A CN201811507279.7A CN201811507279A CN109949769A CN 109949769 A CN109949769 A CN 109949769A CN 201811507279 A CN201811507279 A CN 201811507279A CN 109949769 A CN109949769 A CN 109949769A
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CN
China
Prior art keywords
voltage
signal
driving voltage
display device
gamma
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Granted
Application number
CN201811507279.7A
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Chinese (zh)
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CN109949769B (en
Inventor
金江旼
崔湳坤
金南宪
朴柱焕
李薔美
李政桓
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Samsung Display Co Ltd
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Samsung Display Co Ltd
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Publication of CN109949769A publication Critical patent/CN109949769A/en
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Publication of CN109949769B publication Critical patent/CN109949769B/en
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Classifications

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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
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    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3607Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
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    • G09G3/2007Display of intermediate tones
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    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

This application involves a kind of display device, the display device includes: data driver, and the data driver is for driving multiple data lines;Voltage generator, the voltage generator is for generating at least one driving voltage to be provided to data driver;And drive control device, the drive control device is used in response to being provided to data driver from external received first picture signal and control signal by the second picture signal and benchmark gamma selection signal, wherein, drive control device based on include in the first picture signal metadata output for changing at least one driving voltage voltage level voltage control signal and benchmark gamma selection signal, and data driver receives benchmark gamma selection signal and at least one driving voltage so that the data voltage signal for corresponding to the second picture signal is provided to the multiple data line.

Description

It is capable of the display device of expansion of gradation
Cross reference to related applications
This application claims on December 11st, 2017 the 10-2017-0169660 South Korea patent application submitted it is preferential Power and equity, the disclosure of the South Korea patent application are all incorporated herein by quoting.
Technical field
The present invention herein relates to a kind of display device, being capable of expansion of gradation (gray scale more particularly, to one kind Expansion display device).
Background technique
The known mankind can recognize that about 10 in the natural environment-4To 109Nit (cd/m2) wide luminance dynamic model It encloses, and people are for high dynamic range (high dynamic range, HDR) technology for taking into account this cognitive features It is more and more interested.
However, luminance dynamic range of the existing displayable luminance dynamic range of display device compared to HDR image content It is rather narrow.For example, the peak brightness specification of HDR image is currently 10,000 nit, but what current display device can be shown Peak brightness is about 1,000 nits.
Therefore, it in order to show the HDR image content with the broader brightness range that can be shown than display device, shows Device should be utilized in narrow brightness range (that is, gamma (gamma) characteristic) Lai Bianhuan HDR image according to display device The image processing algorithm of appearance.
Meanwhile data image signal is converted to analog gray voltages so as to driving data line by data driver.It can show The range of the grayscale voltage shown is limited by the limit of the bit number of the data image signal handled in data driver.
Summary of the invention
The present invention provides a kind of display device for capableing of expansion of gradation.
The embodiment of present inventive concept provides a kind of display device, and the display device includes: display panel, the display Panel has the multiple pixels for being respectively connected to multiple grid lines and multiple data lines;Gate drivers, the gate drivers Drive the multiple grid line;Data driver, the multiple data line of data driver drive;Voltage generator, institute It states voltage generator and generates at least one driving voltage to be provided to data driver;And drive control device, the driving control Second picture signal and benchmark gamma selection signal are provided to data in response to the first picture signal and control signal and driven by device processed It moves device and controls gate drivers.Drive control device can be based on including that metadata in the first picture signal is exported for changing Become the voltage control signal of the voltage level of at least one driving voltage, and outputting reference gamma selection signal.Data-driven Device can receive benchmark gamma selection signal and at least one driving voltage will correspond to the data voltage letter of the second picture signal Number it is provided to multiple data lines.
In embodiment, drive control device can include: metadata analysis circuit, the metadata analysis circuit analysis member number Maximum brightness signal and minimum brightness signal are obtained accordingly;Bit expander, the bit expander believe the first image It number is transformed in the expansion for corresponding to the maximum gray of maximum brightness signal between minimum gray corresponding to minimum brightness signal The picture signal of exhibition;And the image signal transformation of extension is the second image by gamma-correction circuit, the gamma-correction circuit Signal.
In embodiment, gamma-correction circuit may be in response to maximum brightness signal and the control of minimum brightness signal output voltage Signal and benchmark gamma selection signal.
In embodiment, voltage generator may be in response to voltage control signal and generate the first driving voltage and the second driving electricity Pressure.
In embodiment, the second driving voltage can have the voltage level lower than the first driving voltage.
In embodiment, the voltage level of the first driving voltage can be determined according to maximum brightness signal, and second drives The voltage level of dynamic voltage can be determined according to minimum brightness signal.
In embodiment, data driver can include: resistance string, the resistance string are generated in the first driving voltage and second Multiple gamma electric voltages between driving voltage;Reference voltage selection circuit, the reference voltage selection circuit is in response to benchmark gal Horse selection signal selects a part of gamma electric voltage in the multiple gamma electric voltage, and using the gamma electric voltage selected as multiple The output of benchmark gamma electric voltage;Second voltage generator, it is more that the second voltage generator is based on the generation of multiple benchmark gamma electric voltages A voltage;And decoder, the decoder using the voltage corresponding to the second picture signal among the multiple voltage as Grayscale voltage output.Grayscale voltage can be provided to respectively the multiple data line as data voltage signal.
In embodiment, reference voltage selection circuit may include multiple selectors, each choosing in the multiple selector It selects device and receives multiple gamma electric voltages, and in response to benchmark gamma selection signal by a gamma in the multiple gamma electric voltage Voltage is exported as benchmark gamma electric voltage.
In embodiment, resistance string may include being sequentially connected in series between the first driving voltage and the second driving voltage Multiple resistors, and the voltage of the connecting node between the multiple resistor is defeated as the multiple gamma electric voltage Out.
In embodiment, data driver can include: shift register, the shift register and clock signal synchronization Export latching clock signal;Latch cicuit, the latch cicuit and latching clock signal synchronously latch the second picture signal;Number Mode converter, the digital analog converter receive benchmark gamma selection signal and at least one driving voltage, and will be electric from latching Second image signal transformation of road output is grayscale voltage;And output buffer, the output buffer become grayscale voltage It is changed to data voltage signal, and data voltage signal is exported to data line.
In embodiment, metadata can be included in the vertical blanking interval of the first picture signal.
The embodiment of present inventive concept provides a kind of display device, and the display device includes: display panel, the display Panel has the multiple pixels for being respectively connected to multiple grid lines and multiple data lines;Gate drivers, the gate drivers Drive the multiple grid line;Data driver, the multiple data line of data driver drive;Voltage generator, institute It states voltage generator and generates at least one driving voltage and multiple benchmark gamma electric voltages to be provided to data driver;And driving Second picture signal is provided to by controller, the drive control device in response to the first picture signal, control signal and metadata Data driver and control gate drivers.Drive control device can be used for based on exporting including luminance information in the metadata Change the voltage control signal of the voltage level of at least one driving voltage and the voltage level of multiple benchmark gamma electric voltages.Data Driver can receive multiple benchmark gamma electric voltages and at least one driving voltage will correspond to the data electricity of the second picture signal Pressure signal is provided to multiple data lines.
In embodiment, drive control device can include: metadata analysis circuit, the metadata analysis circuit analysis member number Maximum brightness signal and minimum brightness signal are obtained accordingly;Bit expander, the bit expander believe the first image It number is transformed in the expansion for corresponding to the maximum gray of maximum brightness signal between minimum gray corresponding to minimum brightness signal The picture signal of exhibition;And the image signal transformation of extension is the second image by gamma-correction circuit, the gamma-correction circuit Signal.
In embodiment, gamma-correction circuit may be in response to maximum brightness signal and the control of minimum brightness signal output voltage Signal.
In embodiment, voltage generator may be in response to voltage control signal and generate the first driving voltage and the second driving electricity Pressure.
In embodiment, the second driving voltage can have the voltage level lower than the first driving voltage.The multiple benchmark Gamma electric voltage can have the voltage level different from each other between the first driving voltage and the second driving voltage.
In embodiment, data driver can include: resistance string, the resistance string are based on the multiple benchmark gamma electric voltage Generate multiple voltages between the first driving voltage and the second driving voltage;And decoder, the decoder will be the multiple The voltage corresponding to the second picture signal among voltage is exported as grayscale voltage.Grayscale voltage can be used as data voltage signal It is provided to multiple data lines respectively.
In embodiment, resistance string may include being sequentially connected in series between the first driving voltage and the second driving voltage Multiple resistors, and using the voltage of the connecting node between the multiple resistor as the multiple voltage output.
In embodiment, data driver can include: shift register, the shift register and clock signal synchronization Export latching clock signal;Latch cicuit, the latch cicuit and latching clock signal synchronously latch the second picture signal;Number Mode converter, the digital analog converter receive at least one driving voltage and the multiple benchmark gamma electric voltage, and will be from lock The second image signal transformation for depositing circuit output is grayscale voltage;And output buffer, the output buffer are electric by gray scale Buckling is changed to data voltage signal, and data voltage signal is exported to data line.
In embodiment, metadata can be included in the vertical blanking interval of the first picture signal.
Detailed description of the invention
Attached drawing is included to provide and further understand to present inventive concept, and attached drawing is incorporated to and constitutes this Shen A part please.Attached drawing shows the exemplary embodiment conceived according to the present invention, and together with the description for illustrating structure of the present invention The principle of think of.
Fig. 1 is the block diagram for showing the configuration of display device for the embodiment conceived according to the present invention.
Fig. 2 shows display device received first picture signal example.
Fig. 3 is the block diagram for showing the configuration of drive control device for the embodiment conceived according to the present invention.
Fig. 4 is the block diagram for showing the configuration of imaging signal processing circuit for the embodiment conceived according to the present invention.
Fig. 5 is the curve graph of the operation of the imaging signal processing circuit of the embodiment for describing to conceive according to the present invention.
Fig. 6 is the block diagram for showing the configuration of data driver for the embodiment conceived according to the present invention.
Fig. 7 is the block diagram for showing the configuration for the digital analog converter being shown in FIG. 6 for the embodiment conceived according to the present invention.
Fig. 8 shows the configuration for the direct transform device of the embodiment conceived according to the present invention being shown in FIG. 7.
Fig. 9 is the block diagram for showing the configuration of display device for another embodiment conceived according to the present invention.
Figure 10 is the image signal process electricity in drive control device for showing another embodiment conceived according to the present invention The block diagram of the configuration on road.
Figure 11 is the electricity for showing the digital analog converter in data driver for another embodiment conceived according to the present invention The block diagram of road configuration.
Figure 12 shows the configuration for the direct transform device of another embodiment conceived according to the present invention being shown in FIG. 11.
Specific embodiment
Hereinafter, the embodiment of present inventive concept is described in detail with reference to the attached drawings.
Fig. 1 is the block diagram for showing the configuration of display device for the embodiment conceived according to the present invention.Fig. 2 shows display devices Received first picture signal example.
Referring to Fig.1, display device 100 includes: display panel 110, drive control device 120, voltage generator 130, grid Driver 140 and data driver 150.
Display panel 110 includes: multiple data line DL1 to DLm, is arranged as intersecting the multiple data line DL1 to DLm's Multiple gate lines G L1 to GLn and the multiple data line DL1 to DLm and the multiple gate lines G L1 are arranged in GLn's Multiple pixel PX at intersection region (or zone of intersection).Multiple data line DL1 to DLm and multiple gate lines G L1 to GLn are exhausted each other Edge.
Although each pixel PX being not shown in the figure, in pixel PX can include: be connected to corresponding data line and The switching transistor of corresponding grid line and the liquid crystal capacitor and storage for being connected to switching transistor.
Each pixel PX in the case where display device 100 is organic light-emitting display device, in pixel PX can include: have Machine light-emitting component and switching transistor for operating organic illuminating element.
The graphics processor (not shown) for being connected to display device 100 will be by the first image to metadata coding acquisition Signal RGB1 and full HD (full high definition, the FHD) image or ultra high-definition with high dynamic range (HDR) (ultra-high definition, UHD) image is provided to drive control device 120.
As shown in Figure 2, the first picture signal RGB1 includes the blanking interval (blanking interval) for every frame With activity data interval (active data interval).Metadata is included in the blanking interval of the first picture signal RGB1 In, and including the HDR information about corresponding frame.Metadata may include the minimum and maximum luminance information of corresponding frame, but not It is limited to this, and metadata may also include such as backlight peak brightness, tone mapping (tone mapping) and/or the letter of colour temperature Breath.
In this embodiment, metadata is included in the blanking interval of the first picture signal RGB1 in every frame, still In order to which the increase (for example, bit rate that picture signal is reduced or minimized) of bit rate is reduced or minimized, can not transmit has With the metadata of the value identical value in former frame.In another embodiment, metadata can be stored for every content.
Drive control device 120 is from external (for example, outside of display device 100) first picture signal RGB1 of reception and such as Vertical synchronizing signal, horizontal synchronizing signal, master clock signal and data enable signal for controlling the first picture signal RGB1 Display control signal CTRL.Drive control device 120 is based on control signal CTRL, will be according to the work item of display panel 110 Part is provided to number by the first picture signal RGB1 of processing the second picture signal RGB2 obtained and first control signal CONT1 Gate drivers 140 are provided to according to driver 150, and by second control signal CONT2.First control signal CONT1 can be wrapped It includes clock signal clk, reversal signal POL and line and latches (line latch) signal LOAD, and second control signal CONT2 may include vertical synchronization initial signal, output enable signal, grid impulse signal etc..In this embodiment, drive control Device 120 is based on including that the first picture signal RGB1 is transformed to the second picture signal by metadata in the first picture signal RGB1 RGB2, and output voltage control signal VCTRL.
Voltage generator 130 generates the multiple voltages and clock signal of the operation for display panel 110.In the embodiment In, gate clock signal CKV and ground voltage VSS are provided to gate drivers 140 by voltage generator 130.In addition, voltage occurs Device 130 also generate the first driving voltage VGMA_UH of operation for data driver 150, the second driving voltage VGMA_UL, Third driving voltage VGMA_LH and the 4th driving voltage VGMA_LL.
Voltage generator 130 is in response to voltage control signal VCTRL setting the first driving electricity from drive control device 120 Press the voltage electricity of the voltage level of VGMA_UH, the voltage level of the second driving voltage VGMA_UL, third driving voltage VGMA_LH Flat and the 4th driving voltage VGMA_LL voltage level.
Gate drivers 140 are sent out in response to the second control signal CONT2 from drive control device 120 and from voltage The gate clock signal CKV and ground voltage VSS of device 130 are given birth to drive gate lines G L1 to GLn.Gate drivers 140 may include grid Pole drive integrated circult (IC).Other than gate driving IC, gate drivers 140 can also be by using amorphous silicon membrane crystal Manage the amorphous silicon gate could (ASG) of (a-Si TFT) and using oxide semiconductor, crystalline semiconductor and/or poly semiconductor etc. Circuit is implemented.Gate drivers 140 can pass through thin-film technique and pixel PX11 to PXnm simultaneously (concurrently) (example Such as, simultaneously it) is formed.In the case, gate drivers 140 may be provided at the setting of the side of display panel 110 (for example, pre- Calmly) in region (for example, non-display area).
Data driver 150 is in response to the second picture signal RGB2 from drive control device 120, first control signal CONT1 and benchmark gamma selection signal GSEL is by using the first driving voltage VGMA_UH, the second driving voltage VGMA_UL, Three driving voltage VGMA_LH and the 4th driving voltage VGMA_LL export the data voltage for driving data line DL1 to DLm Signal D1 to Dm.
When gate drivers 140 drive a grid by using the gate-on voltage of setting (for example, predetermined) level When polar curve, the switching transistor being connected in the one-row pixels PX of this grid line becomes to be connected.At this point, data driver 150 Grayscale voltage corresponding to the second picture signal RGB2 is provided to data line DL1 to DLm.Data line DL1 is provided to DLm's Grayscale voltage is applied to corresponding liquid crystal capacitor and storage by the switching transistor be connected.Here, in order to anti- The only deterioration of liquid crystal capacitor, data driver 150 can will correspond to the grayscale voltage of the second picture signal RGB2 in every frame Between positive (+) polarity and negative (-) polarity alternately.First driving voltage VGMA_UH and the second driving voltage VGMA_UL is to be used for The voltage of positive polarity driving, and third driving voltage VGMA_LH and the 4th driving voltage VGMA_LL are driven for negative polarity Voltage.
Drive control device 120 will be used to select between the first driving voltage VGMA_UH and the second driving voltage VGMA_UL Multiple reference voltages between multiple reference voltages and third driving voltage VGMA_LH and the 4th driving voltage VGMA_LL Benchmark gamma selection signal GSEL is provided to data driver 150.
Fig. 3 is the block diagram for showing the configuration of drive control device for the embodiment conceived according to the present invention.
Referring to Fig. 3, drive control device 120 includes imaging signal processing circuit 210 and control signal generating circuit 220.
First picture signal RGB1 is transformed to the second picture signal RGB2 by imaging signal processing circuit 210.In addition, image Signal processing circuit 210 based on include in the first picture signal RGB1 metadata output for changing at least one driving electricity The voltage control signal VCTRL and benchmark gamma selection signal GSEL of the voltage level of pressure.
Signal generating circuit 220 is controlled to be based on exporting first control signal CONT1 from external received control signal CTRL With second control signal CONT2.First control signal CONT1 may include horizontal synchronization initial signal, clock signal and line lock Signal is deposited, and second control signal CONT2 may include vertical synchronization initial signal, output enable signal and grid impulse letter Number.
Fig. 4 is the block diagram for showing the configuration of imaging signal processing circuit for the embodiment conceived according to the present invention.
Referring to Fig. 4, imaging signal processing circuit 210 includes bit expander 211, gamma-correction circuit 212 and member Data analysis circuit 213.The detection of metadata analysis circuit 213 includes the metadata in the first picture signal RGB1, and point The metadata detected is analysed to export maximum brightness signal L_MAX and minimum brightness signal L_MIN.
Bit expander 211 believes the first image in response to maximum brightness signal L_MAX and minimum brightness signal L_MIN Number RGB1 is transformed to the picture signal RGB' of extension.
Gamma-correction circuit 212 is in response to maximum brightness signal L_MAX and minimum brightness signal L_MIN by the image of extension Signal RGB' is transformed to the second picture signal RGB2.In addition, gamma-correction circuit 212 in response to maximum brightness signal L_MAX and Minimum brightness signal L_MIN output voltage control signal VCTRL and benchmark gamma selection signal GSEL.
Fig. 5 is the curve graph of the operation of the imaging signal processing circuit of the embodiment for describing to conceive according to the present invention.
Referring to Fig. 4 and Fig. 5, when the bit width of the first picture signal RGB1 is 10 bit, the first picture signal RGB1 It can show 0 to 1023 gray level (that is, grayscale).First picture signal RGB1 can show 0 to 1023 gray level in a frame (that is, grayscale), but in normal working conditions include some in 1024 gray levels (that is, grayscale).For example, for showing First picture signal RGB1 of the image at sunlight seabeach may include many high brightness gray levels (for example, 800 or higher gray scale Grade), and the first picture signal RGB1 for showing the image in dark cave may include many low-luminance grayscale grades (for example, 400 or lower gray level).
Fig. 5 has been illustrated by way of example wherein for the normalization (normalized) of the first picture signal RGB1 Maximum brightness is 45% and normalized minimum brightness the case where being 12%.The example according to shown in Fig. 5 is included in the first figure As the maximum brightness signal L_MAX of the metadata in signal RGB1 can represent 45%, and minimum brightness signal L_MIN can be represented 12%.
Bit expander 211 shown in Fig. 4 is in response to maximum brightness signal L_MAX and minimum brightness signal L_MIN First picture signal RGB1 is transformed in maximum gray scale (that is, maximum gray) G_MAX and minimal gray grade (that is, minimum ash Rank) extension between G_MIN picture signal RGB'.For example, maximum gray scale G_MAX can be 1023 and minimal gray grade G_MIN can be 0.
As shown in Figure 5, when the gray level corresponding to minimum brightness signal L_MIN is 350 and corresponds to maximum brightness When the gray level of signal L_MAX is 690, bit expander 211 by from the 350 to 690 of the first picture signal RGB1 it is effective Gray level expands to from 0 to 1023 gray level.In this embodiment, the picture signal of the first picture signal RGB1 and extension Bit width in each of RGB' is 10 bits.
The picture signal RGB' of 212 pairs of gamma-correction circuit extensions executes gamma correction, and believes in response to maximum brightness The picture signal RGB' of extension is transformed to the second picture signal RGB2 by number L_MAX and minimum brightness signal L_MIN.Gamma correction Circuit 212 can correspond among such as various gamma curves of gamma 2.2, gamma 2.3 and gamma 2.4 be suitable for display device 100 any one gamma curve executes gamma correction.
In addition, can the quantization error as caused by gamma-correction circuit 212 can by change be used for data driver 150 behaviour Make the first driving voltage to the 4th driving voltage VGMA_UH, VGMA_UL, VGMA_LH and VGMA_LL voltage level and The voltage level of benchmark gamma electric voltage compensates.The voltage level and the 4th driving voltage VGMA_ of first driving voltage VGMA_UH The voltage level of LL can determine according to maximum brightness signal L_MAX, and the voltage level of the second driving voltage VGMA_UL and The voltage level of third driving voltage VGMA_LH can be determined according to minimum brightness signal L_MIN.
Fig. 6 is the block diagram for showing the configuration of data driver for the embodiment conceived according to the present invention.
Referring to Fig. 6, data driver 150 includes: shift register 310, latch cicuit 320, digital analog converter (DAC) 330 and output buffer 340.In Fig. 6, clock signal clk, line latch signal LOAD and reversal signal POL are packets It includes from the signal in the first control signal CONT1 that drive control device 120 shown in Fig. 1 provides.
Shift register 310 and clock signal clk synchronously successively activate latching clock signal CK1 to CKm.Latch cicuit 320 synchronously latch the second picture signal RGB2 with the latching clock signal CK1 to CKm from shift register 310, and ring Latch data signal DA1 to DAm should simultaneously (for example, simultaneously) be provided to digital analog converter 330 in line latch signal LOAD.
120 receiving polarity of drive control device shown in Fig. 1 of digital analog converter 330 transformation signal POL and benchmark gamma Selection signal GSEL, and the first driving voltage to the 4th driving voltage is received from voltage generator 130 shown in Fig. 1 VGMA_UH, VGMA_UL, VGMA_LH and VGMA_LL.Digital analog converter 330 will correspond to the latch number from latch cicuit 320 It is believed that the grayscale voltage Y1 to Ym of number DA1 to DAm is exported to output buffer 340.Output buffer 340 is from digital analog converter 330 receive grayscale voltage Y1 to Ym, and export data voltage signal D1 to Dm to data in response to line latch signal LOAD Line DL1 to DLm.
Fig. 7 is the block diagram for showing the configuration for the digital analog converter being shown in FIG. 6 for the embodiment conceived according to the present invention.
Referring to Fig. 7, digital analog converter 330 includes direct transform device 410 and negative converter 430.
Direct transform device 410 includes: resistance string 412, reference voltage selection circuit 414, voltage generator 416 and decoder 418.The voltage generator 130 shown in Fig. 1 of resistance string 412 receives the first driving voltage VGMA_UH and the second driving voltage VGMA_UL, and generate multiple gamma electric voltage VGAU0 to VGAUj.
First driving voltage VGMA_UH and the second driving voltage VGMA_UL partial pressure is exported multiple gals by resistance string 412 Horse voltage VGAU0 to VGAUj.
Reference voltage selection circuit 414 in response to benchmark gamma selection signal GSEL by multiple gamma electric voltage VGAU0 extremely A part of gamma electric voltage in VGAUj is exported as multiple benchmark gamma electric voltage VREFU1 to VREFUx.
Voltage generator 416 is based on multiple benchmark gamma electric voltage VREFU1 to VREFUx and generates multiple voltage VU0 to VUy. Here, each of j, x and y are positive integers.
Decoder 418 refers to multiple voltage VU0 when reversal signal POL is in the first level (for example, high level) Latch data signal DA1 to DAm is transformed to grayscale voltage Y1 to Ym to VUy.
Negative converter 430 includes: resistance string 432, reference voltage selection circuit 434, voltage generator 436 and decoder 438。
Resistance string 432 is by the third driving voltage VGMA_LH and 4 wheel driven of the voltage generator 130 shown in Fig. 1 Dynamic voltage VGMA_LL partial pressure is to generate multiple gamma electric voltage VGAL0 to VGALj.
Reference voltage selection circuit 434 in response to benchmark gamma selection signal GSEL by multiple gamma electric voltage VGAL0 extremely A part of gamma electric voltage in VGALj is exported as multiple benchmark gamma electric voltage VREFL1 to VREFLx.
Voltage generator 436 is based on multiple benchmark gamma electric voltage VREFL1 to VREFLx and generates multiple voltage VL0 to VLy. Here, each of j, x and y are positive integers.
Decoder 438 refers to multiple voltage VL0 when reversal signal POL is in second electrical level (for example, low level) Latch data signal DA1 to DAm is transformed to grayscale voltage Y1 to Ym to VLy.
Fig. 8 shows the configuration in the direct transform device shown in Fig. 7 for the embodiment conceived according to the present invention.
Referring to Fig. 8, resistance string 412 receives the first driving voltage VGMA_UH and the second driving voltage VGMA_UL, and defeated Gamma electric voltage VGAU0 to VGAU255 out.Resistance string 412 includes being sequentially connected in series in the first driving voltage VGMA_UH and second Resistor R0 between driving voltage VGMA_UL is to R255.Made in the voltage of resistor R0 to the connecting node between R255 For gamma electric voltage VGAU0 to VGAU255 output.
Reference voltage selection circuit 414 includes selector 451 to 460.Selector 451 to 460 is selected in response to benchmark gamma Signal GSEL is selected using a part of gamma electric voltage of the gamma electric voltage VGAU0 into VGAU255 as benchmark gamma electric voltage VREFU1 extremely VREFU10 output.
For example, selector 451 can be exported gamma electric voltage VGAU248 as benchmark gamma electric voltage VREFU10, selector 452 can export gamma electric voltage VGAU220 as benchmark gamma electric voltage VREFU9, and selector 460 can be by gamma electric voltage VGAU8 is exported as benchmark gamma electric voltage VREFU1.
Voltage generator 416 receives benchmark gamma electric voltage VREFU1 to VREFU10, and generates voltage VU0 to VU1023. Voltage generator 416 can generate multiple voltages by the partial pressure between two adjacent reference voltages.For example, voltage generator 416 can generate voltage VU0 to VU90 by the partial pressure between benchmark gamma electric voltage VREFU1 and benchmark gamma electric voltage VREFU2, and And voltage VU91 to VU120 is generated by the partial pressure between benchmark gamma electric voltage VREFU2 and benchmark gamma electric voltage VREFU3.With This mode, voltage generator 416 can generate voltage VU0 extremely by using 10 benchmark gamma electric voltage VREFU1 to VREFU10 VU1023.Based on the voltage VU0 of benchmark gamma electric voltage VREFU1 to VREFU10 to the voltage difference between VU1023 and by two The quantity for the voltage that adjacent reference voltage generates can according to the method for the setting (for example, default) in voltage generator 416 come It determines.
Reference voltage VU0 is extremely when reversal signal POL is in the first level (for example, high level) for decoder 418 Latch data signal DA1 to DAm is transformed to grayscale voltage Y1 to Ym by VU1023.
In this embodiment, resistance string 412 includes 256 voltage VGAU0 to VGAU255 of 256 resistors and output, But the quantity of resistor and the quantity of output voltage can variedly change.
In this embodiment, 10 conduct benchmark gamma electric voltages of the selection circuit 414 by voltage VGAU0 into VGAU255 VREFU1 to VREFU10 output, but the quantity of reference voltage can be various with appropriate ways well known by persons skilled in the art Change to various kinds.As the quantity of reference voltage becomes much larger, data voltage is transformed in the picture signal RGB2 that will be received Distortion during signal D1 to Dm can be reduced or minimized.
The negative converter 430 being shown in FIG. 7 can have similar with the circuit configuration of direct transform device 410 shown in Fig. 8 Circuit configuration.
Referring to Fig. 4 to Fig. 8, the first picture signal RGB1 can be transformed to by bit expander 211 maximum gray scale (that is, Maximum gray) extension between G_MAX and minimal gray grade (that is, minimum gray) G_MIN picture signal RGB', then can be by Gamma-correction circuit 212 is transformed to have already passed through the second picture signal RGB2 of gamma correction.It therefore, can be by by the first image Signal RGB1 is transformed to the second picture signal RGB2 and obtains the effect for increasing the quantity of displayable gray level (that is, grayscale).
When the voltage electricity of the first driving voltage to the 4th driving voltage VGMA_UH, VGMA_UL, VGMA_LH and VGMA_LL It is flat when being changed according to maximum brightness signal L_MAX and minimum brightness signal L_MIN, it is exported from resistance string 412 and resistance string 432 The voltage level of multiple gamma electric voltage VGAU0 to VGAU255 and VGAL0 to VGAL255 can be changed.
In addition, as benchmark gamma selection signal GSEL is according to maximum brightness signal L_MAX and minimum brightness signal L_MIN And change, the benchmark gamma electric voltage VREFU1 selected by reference voltage selection circuit 414 and reference voltage selection circuit 434 is extremely The voltage level of VREFU10 and VREFL1 to VREFL10 can be changed.
By changing the first driving voltage to the 4th driving voltage VGMA_UH, VGMA_UL, VGMA_LH and VGMA_LL's Voltage level and by benchmark gamma selection signal GSEL selection benchmark gamma electric voltage VREFU1 to VREFU10 and VREFL1 extremely The voltage level of VREFL10 can adjust the voltage level of grayscale voltage Y1 to Ym.Therefore, it can reduce or prevent by by first The brightness that picture signal RGB1 is transformed to image shown caused by the second picture signal RGB2 changes.
Fig. 9 is the block diagram for showing the configuration of display device for another embodiment conceived according to the present invention.
Referring to Fig. 9, display device 500 includes display panel 510, drive control device 520, voltage generator 530, grid drive Dynamic device 540 and data driver 550.The display device 500 as shown in Fig. 9, which has to be substantially similar in Fig. 1, to be shown Display device 100 configuration configuration, therefore redundancy description can be omitted.
Other than the first driving voltage to the 4th driving voltage VGMA_UH, VGMA_UL, VGMA_LH and VGMA_LL, packet It includes the voltage generator 530 in display device 500 and is additionally in response to the voltage control signal VCTRL from drive control device 520 And generate multiple benchmark gamma electric voltage VREFU1 to VREFUx and VREFL1 to VREFLx.
Figure 10 is the image signal process electricity in drive control device for showing another embodiment conceived according to the present invention The block diagram of the configuration on road.
Referring to Fig.1 0, imaging signal processing circuit 610 includes bit expander 611, gamma-correction circuit 612 and member Data analysis circuit 613.The detection of metadata analysis circuit 613 includes the metadata in the first picture signal RGB1, and point The metadata detected is analysed to export maximum brightness signal L_MAX and minimum brightness signal L_MIN.
Bit expander 611 believes the first image in response to maximum brightness signal L_MAX and minimum brightness signal L_MIN Number RGB1 is transformed to the picture signal RGB' of extension.
Gamma-correction circuit 612 is in response to maximum brightness signal L_MAX and minimum brightness signal L_MIN by the image of extension Signal RGB' is transformed to the second picture signal RGB2.In addition, gamma-correction circuit 612 in response to maximum brightness signal L_MAX and Minimum brightness signal L_MIN output voltage control signal VCTRL.
Figure 11 is the electricity for showing the digital analog converter in data driver for another embodiment conceived according to the present invention The block diagram of road configuration.
Referring to Fig.1 1, digital analog converter 630 includes direct transform device 710 and negative converter 730.
Direct transform device 710 includes resistance string 712 and decoder 714.The voltage generator shown in Fig. 9 of resistance string 712 530 receive the first driving voltage VGMA_UH, the second driving voltage VGMA_UL and multiple benchmark gamma electric voltage VREFU1 extremely VREFUx, and generate multiple voltage VU0 to VUy.Decoder 714 reversal signal POL be in the first level (for example, High level) when with reference to multiple voltage VU0 to VUy latch data signal DA1 to DAm is transformed to grayscale voltage Y1 to Ym.
Negative converter 730 includes resistance string 732 and decoder 734.The voltage generator shown in Fig. 9 of resistance string 732 530 receive third driving voltage VGMA_LH, the 4th driving voltage VGMA_LL and multiple benchmark gamma electric voltage VREFL1 extremely VREFLx, and generate multiple voltage VL0 to VLy.Decoder 734 reversal signal POL be in second electrical level (for example, Low level) when with reference to multiple voltage VL0 to VLy latch data signal DA1 to DAm is transformed to grayscale voltage Y1 to Ym.
Figure 12 shows the configuration of direct transform device shown in the Figure 11 for another embodiment conceived according to the present invention.
Referring to Fig.1 2, resistance string 712 receives the first driving voltage VGMA_UH, the second driving voltage VGMA_UL and benchmark Gamma electric voltage VREFU1 to VREFU10, and generate voltage VU0 to VU1023.Resistor R0 is sequentially connected in series to R255 Between second driving voltage VGMA_UL and the first driving voltage VGMA_UH.Benchmark gamma electric voltage VREFU1 to VREFU10 difference Setting (for example, predetermined) node being connected among the connecting node of resistor R0 to R255.
Reference voltage VU0 is extremely when reversal signal POL is in the first level (for example, high level) for decoder 714 Latch data signal DA1 to DAm is transformed to grayscale voltage Y1 to Ym by VU1023.
It in this embodiment, can be by changing the first driving voltage VGMA_UH, the second driving voltage VGMA_UL and base The voltage level of quasi- gamma electric voltage VREFU1 to VREFU10 changes the voltage level of voltage VU0 to VU1023.
It can be by changing the first driving voltage to the 4th driving voltage VGMA_UH, VGMA_UL, VGMA_LH and VGMA_LL Voltage level and the voltage level of benchmark gamma electric voltage VREFU1 to VREFU10 and VREFL1 to VREFL10 adjust ash Spend the voltage level of voltage Y1 to Ym.Therefore, it can reduce or prevent by the way that the first picture signal RGB1 is transformed to the second image The brightness change of shown image caused by signal RGB2.
Display device with above-mentioned configuration can drive to change for data according to including luminance information in the metadata The voltage level of driving voltage in dynamic device and in effective brightness range expanded images signal bit width.Therefore, quilt The gray scale for being extended to the tonal range that can otherwise show more than display device can be shown.With than will be with other The image for the higher gray level resolution that mode obtains can be shown.
Although will be appreciated that can be used in the text term " first ", " second ", " third " etc. come describe various elements, Component, regions, layers, and/or portions, but these elements, component, regions, layers, and/or portions should not be limited by these terms. These terms are used to distinguish an element, component, region, layer or part and another element, component, region, layer or part. Therefore, without departing from the spirit and scope of the present invention, first element described below, component, region, layer or part Second element, component, region, layer or part can be referred to as.
Term used herein is in order to for the purpose of describing particular embodiments without being intended to the limitation present invention.Such as institute in text It uses, unless the context clearly indicates otherwise, otherwise "one" and " a kind of (person) " of singular are intended to also include plural number Form.It will be further understood that illustrating exist when using the terms "include", "comprise" and its various modifications in the present specification Feature, entirety, step, operation, the element and/or component stated, but do not preclude the presence or addition of it is one or more its Its feature, entirety, step, operation, element, component and/or their group.As used herein, term "and/or" includes one Any combination of continuous item listed by a or more and all combinations.A column element is expressed in when such as " at least one (kind) " When before, modification permutation element is without the Individual components in the modification column.
As used herein, term " substantially ", " about " and similar terms are used as approximate term and are not used as degree Term, and be intended to explain by it will be appreciated by those of ordinary skill in the art that the inherent variability in measured value or calculated value. In addition, when describing the embodiment of the present invention, the use of " can (can with) " refers to " one or more implementations of the invention Example ".As used in the text, term " use " and its modification can consider synonymous with term " utilization " and its modification respectively. In addition, term " exemplary " is intended to refer to example or illustration.
The electronics or electric device and/or any other relevant apparatus of the embodiment according to the present invention described in the text or Component can use any suitable hardware, firmware (for example, specific integrated circuit), software or software, firmware and hardware Combination is to implement.For example, the various assemblies of these devices can be formed on integrated circuit (IC) chip or be formed in list In only IC chip.In addition, the various assemblies of these devices can be implemented in flexible printed circuit film, carrier package (TCP), print On printed circuit board (PCB), or formed on one substrate.In addition, the various assemblies of these devices can be at one or more On one or more processors in multiple computing devices run, execute computer program instructions and with other systems component Interactive process or thread to execute various functions described in the text.Computer program instructions are stored in memory, The memory can be in the computing device using the standard memory devices such as by taking random access memory (RAM) as an example Implement.Computer program instructions can also be stored in other non-transitories by taking CD-ROM, flash drive etc. as an example and count In calculation machine readable media.Moreover, in the case where not departing from the spirit and scope of exemplary embodiment of the present invention, this field skill Art personnel will be recognized that the function of various computing devices can be combined or be integrated into single computing device, or tool The function of the computing device of body can be dispersed in other one or more computing devices.
It, should be with general and descriptive meaning although embodiment is disclosed herein and uses specific term It uses and explains them, rather than the purpose for limitation.In some embodiments, for the ability when submitting the disclosure It is evident that unless specifically indicated otherwise for field technique personnel, the feature that otherwise describes in conjunction with specific embodiments, characteristic and/ Or element can be used alone, or be applied in combination with feature, characteristic and/or the element of other embodiments description is combined.Therefore, It will be appreciated by those skilled in the art that in the spirit for not departing from the present inventive concept disclosed in claim and its equivalent In the case where range, various change in form and details can be wherein being made.

Claims (10)

1. a kind of display device, the display device include:
Display panel, the display panel include the multiple pixels for being respectively connected to multiple grid lines and multiple data lines;
Gate drivers, the multiple grid line of gate driver drive;
Data driver, the multiple data line of data driver drive;
Voltage generator, the voltage generator generate at least one driving voltage to be provided to the data driver;And
Drive control device, the drive control device is in response to the first picture signal and controls signal for the second picture signal and benchmark Gamma selection signal is provided to the data driver and controls the gate drivers,
Wherein, the drive control device be configured to include in the first image signal metadata output for changing The voltage control signal of the voltage level of at least one driving voltage and the benchmark gamma selection signal is exported, and
The data driver is configured to receive the benchmark gamma selection signal and at least one described driving voltage with will be right The data voltage signal of second picture signal described in Ying Yu is provided to the multiple data line.
2. display device according to claim 1, wherein the drive control device includes:
Metadata analysis circuit, metadata described in the metadata analysis circuit analysis are bright to obtain maximum brightness signal and minimum Spend signal;
The first image signal is transformed to corresponding to the maximum brightness by bit expander, the bit expander The maximum gray of signal and picture signal corresponding to the extension between the minimum gray of the minimum brightness signal;And
The image signal transformation of the extension is second picture signal by gamma-correction circuit, the gamma-correction circuit.
3. display device according to claim 2, wherein the gamma-correction circuit is configured in response to described most light It spends signal and the minimum brightness signal exports the voltage control signal and the benchmark gamma selection signal.
4. display device according to claim 2, wherein the voltage generator is configured to control in response to the voltage Signal generates the first driving voltage and the second driving voltage.
5. display device according to claim 4, wherein second driving voltage has than first driving voltage Low voltage level.
6. display device according to claim 4, wherein the voltage level of first driving voltage is according to the maximum Luminance signal determines, and the voltage level of second driving voltage determines according to the minimum brightness signal.
7. display device according to claim 4, wherein the data driver includes:
Resistance string, the resistance string generate multiple gammas electricity between first driving voltage and second driving voltage Pressure;
Reference voltage selection circuit, the reference voltage selection circuit select described more in response to the benchmark gamma selection signal A part of gamma electric voltage in a gamma electric voltage, and the selected gamma electric voltage is defeated as multiple benchmark gamma electric voltages Out;
Second voltage generator, the second voltage generator are based on the multiple benchmark gamma electric voltage and generate multiple voltages;With And
Decoder, the decoder is using the voltage corresponding to second picture signal among the multiple voltage as gray scale Voltage output,
Wherein, the grayscale voltage is provided to the multiple data line as the data voltage signal respectively.
8. display device according to claim 7, wherein the reference voltage selection circuit includes multiple selectors, institute It states each selector in multiple selectors to be configured to receive the multiple gamma electric voltage, and is selected in response to the benchmark gamma Signal is selected to export a gamma electric voltage in the multiple gamma electric voltage as benchmark gamma electric voltage.
9. display device according to claim 7, wherein the resistance string includes being sequentially connected in series to drive described first Multiple resistors between dynamic voltage and second driving voltage, and be configured to the company between the multiple resistor The voltage for connecing node is exported as the multiple gamma electric voltage.
10. a kind of display device, the display device include:
Display panel, the display panel include the multiple pixels for being respectively connected to multiple grid lines and multiple data lines;
Gate drivers, the multiple grid line of gate driver drive;
Data driver, the multiple data line of data driver drive;
Voltage generator, the voltage generator generate at least one driving voltage and multiple benchmark gamma electric voltages to be provided to State data driver;And
Drive control device, the drive control device believe the second image in response to the first picture signal, control signal and metadata It number is provided to the data driver and controls the gate drivers, wherein the drive control device is configured to wrap The luminance information output in the metadata is included for changing the voltage level of at least one driving voltage and described more The voltage control signal of the voltage level of a benchmark gamma electric voltage, and
The data driver is configured to receive the multiple benchmark gamma electric voltage and at least one described driving voltage with will be right The data voltage signal of second picture signal described in Ying Yu is provided to the multiple data line.
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