CN109936360B - Pulse counting device and radiation detection system - Google Patents

Pulse counting device and radiation detection system Download PDF

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CN109936360B
CN109936360B CN201910316368.1A CN201910316368A CN109936360B CN 109936360 B CN109936360 B CN 109936360B CN 201910316368 A CN201910316368 A CN 201910316368A CN 109936360 B CN109936360 B CN 109936360B
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pulse
code value
processing unit
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CN109936360A (en
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奚道明
刘苇
陈瑞
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Suzhou Ruimeisi Technology Co.,Ltd.
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Suzhou Ruimaisi Medical Technology Co ltd
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Abstract

The application discloses pulse counting device and radiation detection system, this pulse counting device can include at least one count passageway, and every count passageway all includes: a plurality of comparators each configured to compare an amplitude of the acquired pulse signal with a corresponding preset amplitude threshold value and output a level signal indicating a result of the comparison; an encoder configured to encode the level signals output by the plurality of comparators in a preset encoding manner in a plurality of clock cycles to obtain a plurality of encoded values; and a processing unit configured to sequentially determine target code values among the plurality of code values in a time sequence in which the plurality of code values are obtained, and control corresponding counters to count according to the target code values. The identification and recovery of the pulse stacking event can be realized through the technical scheme provided by the application, and the counting accuracy of the pulse signals is improved.

Description

Pulse counting device and radiation detection system
Technical Field
The present disclosure relates to the field of signal processing technologies, and in particular, to a pulse counting device and a radiation detection system.
Background
The statements in this section merely provide background information related to the present disclosure and may not constitute prior art.
In the detection of radioactive ray particles with high count rate, a phenomenon that adjacent pulse signals output by the detector are partially or even completely overlapped often occurs, which is called a pulse stacking event, as shown in fig. 1. The pulse stacking event causes overlapping waveforms of the multiple pulse signals, affecting subsequent information extraction for each pulse signal, which can cause a series of problems such as count loss, spectral distortion, etc., which can degrade the performance of the detector. Therefore, it is important to accurately identify whether a pulse signal has a pulse stacking event and accurately count the pulse signals having the pulse stacking event.
The counting of pulse signals is generally achieved in the prior art by means of voltage comparators and counters, in particular: the pulse signal output by the detector is compared with a preset threshold voltage by a voltage comparator, the frequency of the jump of the edge (rising edge or falling edge) of the level signal output by the voltage comparator in unit time is recorded by a counter, and the number of the obtained pulse signals is determined according to the counting data output by the counter. However, for pulse signals in which a pulse stacking event occurs, the number of pulse signals recorded for different threshold voltages is not the same. Meanwhile, due to the fact that the randomness of the time interval and the amplitude of the adjacent pulse signals is high, the pulse signals cannot be accurately counted, and therefore the follow-up imaging quality is affected.
Disclosure of Invention
An object of an embodiment of the present application is to provide a pulse counting device and a radiation detection system, so as to improve the counting accuracy of pulse signals.
To solve the above technical problem, embodiments of the present application provide a pulse counting device, which may include at least one counting channel, each counting channel may include:
a plurality of comparators each configured to compare an amplitude of the acquired pulse signal with a corresponding preset amplitude threshold value and output a level signal indicating a result of the comparison;
an encoder configured to encode the level signals output by the comparators in a preset encoding manner in a plurality of clock cycles to obtain a plurality of encoded values;
and a processing unit configured to sequentially determine target code values among the plurality of code values in a time sequence in which the plurality of code values are obtained, and control corresponding counters to count according to the target code values, wherein the target code values are greater than or equal to the code values spaced apart therefrom by a preset time.
Optionally, the encoder is specifically configured to:
preferentially encoding the level signals output by the comparators in an order corresponding to the magnitude of the preset amplitude thresholds in each clock cycle, and transmitting the obtained encoded values to the processing unit; or alternatively
The level signals output by the comparators are encoded in each of the clock cycles, all the obtained encoded values for all the level signals are added, and the added encoded values are sent to the processing unit.
Optionally, the processing unit is specifically configured to perform the following operations:
determining whether a current coded value among a plurality of coded values is the target coded value according to a preset determination mode; when the current coding value is determined to be a target coding value, controlling the corresponding counter to count according to the target coding value; and taking the next code value which is spaced from the current code value by a preset time from the plurality of code values as the current code value, and repeating the operations of determining the target code value and controlling the counter to count until the counter finishes counting all the acquired pulse signals.
Optionally, the processing unit is further specifically configured to:
comparing a current code value with a last code value when the number of code values is 2, and determining the maximum value of the current code value and the last code value as the target code value;
when the number of the code values is greater than 2, determining the target code value in the following manner;
calculating a first derivative of the current encoded value among a plurality of the encoded values according to the following formula (1):
Y i =X i+1 -X i (1);
when Y is i When equal to 0, calculating a first derivative of a next code value spaced from the current code value by a preset time and a second derivative of the current code value among a plurality of code values according to the following formulas (2) - (3), respectively:
Y i+1 =X i+2 -X i+1 (2)
Z i =Y i+1 -Y i (3)
wherein X is i 、X i+1 And X i+2 Respectively representing the last code value, the current code value and the next code value of preset time every two intervals,Y i And Y i+1 Respectively represent and X i And X i+1 Corresponding first derivative, Z i Representation and X i The corresponding second derivative, i is a positive integer, and
when Z is i When the number is less than 0, X is calculated i+1 Determining the target coding value;
when Y is i Greater than 0 and Y i+1 When the number is less than 0, X is calculated i+1 And determining the target coding value.
Optionally, the processing unit is further specifically configured to:
when X is to be i+1 If X, when the target code value is determined i+1 And j, controlling j counters in the plurality of counters to count according to a preset counting mode, and keeping the current counting state of the rest counters in the plurality of counters, wherein j preset amplitude thresholds corresponding to the j counters are smaller than the preset amplitude thresholds corresponding to the rest counters, and j is a positive integer.
Optionally, the processing unit is further specifically configured to:
and controlling one counter corresponding to the current coding value in the plurality of counters to count according to a preset counting mode, and keeping the current counting state of the rest counters in the plurality of counters.
Optionally, the processing unit is further configured to reconstruct the pulse signal according to count data output by the plurality of counters.
Optionally, each counting channel further comprises:
a detector coupled to the plurality of comparators and configured to generate the corresponding pulse signals in response to the detected radioactive rays.
Optionally, the detector comprises a photodetector or a radiation detector.
Optionally, the radiation detector comprises a semiconductor radiation detector, a gas detector or a scintillation detector.
Optionally, each counting channel further comprises:
an amplifying circuit provided between the detector and the plurality of comparators and configured to adjust the amplitude, polarity, and/or width of the pulse signal output from the detector, and transmit the adjusted pulse signal to the plurality of comparators.
Optionally, each counting channel further comprises:
a clock source configured to provide synchronized clock signals to the encoder and the processing unit to cause the encoder and the processing unit to operate at a preset clock frequency.
Optionally, the comparator comprises a voltage comparator or a current comparator, and the encoder comprises a priority encoder.
Optionally, the counter is disposed in the processing unit or connected to the processing unit, and corresponds to a plurality of the comparators.
Optionally, the comparator, the encoder, the processing unit and the counter are each composed of separate electronic components or are implemented by logic resources in an FPGA chip.
Embodiments of the present application also provide a radiation detection system that may include the pulse counting device described above.
As can be seen from the technical solutions provided by the embodiments of the present application, in the embodiments of the present application, the acquired pulse signals are compared with corresponding preset amplitude thresholds by using a plurality of comparators, and level signals indicating comparison results are output, the level signals sent by the plurality of comparators are encoded by using an encoder in a plurality of clock cycles according to a preset encoding mode to obtain a plurality of encoded values, a processing unit sequentially determines a target encoded value among the plurality of encoded values according to a time sequence of obtaining the plurality of encoded values, and controls the corresponding counter to count according to the target encoded value, so that the purpose of accurately counting the pulse signals can be achieved, further the subsequent imaging quality can be improved, and the sorting and counting function according to the amplitude of the pulse signals can be achieved. Also, whether the pulse signal generates the pulse stacking event can be accurately identified according to the count data output from each counter.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments described in the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a waveform diagram of a pulse signal with a pulse stacking event;
FIG. 2 is a schematic diagram of a counting channel in a pulse counting device according to an embodiment of the present application;
fig. 3 is a waveform diagram of a pulse signal to be processed;
FIG. 4 is a logic signal output by a plurality of comparators for the pulse signal of FIG. 2;
fig. 5 is a diagram of encoded values output by an encoder over a plurality of clock cycles.
Detailed Description
The technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application, and it is apparent that the described embodiments are only for illustrating some embodiments of the present application, but not all embodiments, and are not intended to limit the scope of the present application or the claims. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, shall fall within the scope of the present application.
It will be understood that when an element is referred to as being "disposed on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected/coupled" to another element, it can be directly connected/coupled to the other element or intervening elements may also be present. The term "connected/coupled" as used herein may include electrically and/or mechanically physical connections/couplings. The term "comprising" as used herein refers to the presence of a feature, step or element, but does not exclude the presence or addition of one or more other features, steps or elements. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
In addition, in the description of the present application, the terms "first," "second," and the like are used merely for descriptive purposes and to distinguish between similar objects, and there is no order of precedence between the two, nor should it be construed as indicating or implying relative importance. Furthermore, in the description of the present application, unless otherwise indicated, the meaning of "a plurality" is two or more.
The pulse signal referred to in the following description may be an electrical signal generated by the detector in response to the detected neutron ray, X-ray, gamma ray, beta ray, alpha ray, or other radioactive rays, or may be an electrical signal processed by the amplifying circuit. The pulse signal may be an optical signal, an audio signal, or the like. The amplitude of the pulse signal may be an electrical value such as voltage or current, or may be a magnetic value such as magnetic field strength. Accordingly, the preset amplitude threshold may be an electrical threshold, for example, a voltage threshold or a current threshold, or may be another threshold, for example, a magnetic threshold such as a magnetic field strength. The preset amplitude threshold may be set according to characteristics (e.g., control level, pulse amplitude) of the pulse signal, or may be set according to an empirical value of the amplitude of the pulse signal counted in advance.
In addition, a pulse signal is generally considered to be composed of a rising edge and a falling edge, both of which contain time information of the pulse signal, and a change in amplitude of the entire pulse signal contains energy information of the pulse. Since the rising edge and the falling edge of each pulse signal in most pulse stacking events still exist perfectly, only counting of the rising edge or the falling edge of the pulse signal is needed to be completed, whether the pulse signal has the pulse stacking event can be judged, and corresponding time information and amplitude information can be obtained. On the other hand, since the waveform of the pulse signal conforms to a certain change rule, the information of the pulse signal of the remaining non-sampled portion can be deduced from the count information of the pulse signal already obtained. Therefore, the pulse counting device in the application is mainly used for counting the rising edge or the falling edge of the pulse signal, so that the identification and recovery of the pulse stacking event are realized, and the counting accuracy of the pulse signal can be improved aiming at the pulse signal with the pulse stacking event.
The pulse counting device provided in the embodiments of the present application is described in detail below with reference to the accompanying drawings.
As shown in fig. 2, an embodiment of the present application provides a pulse counting apparatus, which may include at least one counting channel, each of which may include a plurality of comparators 210, an encoder 220, a processing unit 230, and a plurality of counters 240 in one-to-one correspondence with the plurality of comparators 210, which are sequentially connected. Wherein each comparator 210 may be configured to compare the amplitude of the acquired pulse signal with a corresponding preset amplitude threshold value and output a level signal indicating the comparison result; the encoder 220 may be configured to encode the level signals transmitted from the plurality of comparators 210 in a preset encoding manner to obtain a plurality of encoded values in a plurality of clock cycles; the processing unit 230 may be configured to sequentially determine a target code value among the plurality of code values in a time sequence in which the plurality of code values are obtained, and to control the corresponding counter 240 to count according to the target code value, wherein the target code value may be greater than or equal to the code value spaced therefrom by a preset time. Specifically:
in the embodiment of the present application, each of the comparators 210 may be correspondingly provided with a preset amplitude threshold, and the preset amplitude thresholds corresponding to the comparators 210 are different from each other. The type of the plurality of comparators 210 may be a voltage comparator, a current comparator, or the like, or may be other types of comparators, corresponding to the amplitude of the pulse signal. The specific number of comparators 210 may be selected according to the actual situation, and is not limited herein.
After acquiring the pulse signal, the plurality of comparators 210 may respectively compare the amplitude of the pulse signal with a corresponding plurality of preset amplitude thresholds and respectively output corresponding level signals. Specifically, when the amplitude of the pulse signal is compared to be greater than the preset amplitude threshold, the comparator 210 may generate an edge transition and may output an active level signal, for example, 1; when the amplitude of the pulse signal is compared to be smaller than the preset amplitude threshold, the comparator 210 maintains the current state and may output an invalid level signal, for example, 0. The active level signal may be high or low, and the inactive level signal may be low or high, respectively. For example, for the pulse signal shown in fig. 3, 4 comparators (e.g., first to fourth comparators) 210 may output level signals as shown in fig. 4.
In embodiments of the present application, encoder 220 may be a priority encoder, or may be another type of encoder. In addition, the encoder 220 may be specifically configured to: the level signals transmitted from the plurality of comparators 210 are preferentially encoded in an order corresponding to the magnitudes of the plurality of preset amplitude thresholds (i.e., the comparator 210 having the highest priority level set with the largest preset amplitude threshold) in each clock cycle, and the resulting encoded values are transmitted to the processing unit 230. For example, for the case where the preset amplitude thresholds corresponding to N (N is a positive integer greater than 1) comparators (i.e., first to nth comparators) 210 sequentially increase, when the encoder 220 receives the active level signal output by the nth comparator 210, the encoder may output the maximum encoded value, i.e., N; when the encoder 220 receives the invalid level signal output from the nth comparator 210 and the valid level signal output from the N-1 th comparator 210, the encoder 220 may output the encoded value N-1; when the encoder 220 receives the invalid level signals output from the nth comparator 210 to the third comparator 210 and the valid level signal output from the second comparator 210, the encoder 220 may output the encoded value 2; when the encoder 220 receives the invalid level signals outputted from the nth comparator 210 to the second comparator 210 and the valid level signal outputted from the first comparator 210, the encoder 220 may output the encoded value 1; when the encoder 220 receives the invalid level signals output from the nth comparator 210 to the first comparator 210, the encoder 220 may output a code value of 0. For example, for the level signal shown in fig. 4, the encoder 220 may output a plurality of encoded values as shown in fig. 5. In addition, the encoder 220 may send the encoded values to the processing unit 230 immediately after obtaining one at a time.
Encoder 220 may be specifically configured to: the level signals transmitted by the plurality of comparators 210 are encoded in each clock cycle, respectively, all the resulting encoded values for all the level signals are added, and the added encoded values are transmitted to the processing unit 230. For example, when the encoder 220 receives the active level signal output from the comparator 210, the encoder 220 may encode the active level signal of the comparator 210 as 1; when the encoder 220 receives the invalid level signal output from the comparator 210, the encoder 220 may encode the invalid level signal of the comparator 210 as 0; all encoded values for the level signals of all comparators 210 may then be added to obtain a final encoded value and sent to the processing unit 230.
In the embodiment of the present application, the processing unit 230 may be configured to actively acquire a plurality of encoded values from the encoder 220, or may receive a plurality of encoded values actively transmitted by the encoder 220, and then sequentially determine a target encoded value among the plurality of encoded values according to a time sequence of acquiring the plurality of encoded values, and control a corresponding counter to count according to the target encoded value. The target code value may refer to a maximum value, i.e., a local maximum code value, among every two code values spaced apart from each other by a preset time among the plurality of code values, which may be greater than or equal to the code value spaced apart from each other by the preset time. Among the plurality of encoded values obtained, there may be one or more target encoded values. Here, the interval between two encoded values by a preset time may mean that the two encoded values are obtained by a preset time interval (e.g., one or more clock cycles). That is, the two encoded values are obtained in different clock cycles, respectively. When two code values are separated by only one clock cycle, the two code values may be considered to be adjacent among the plurality of code values. When two code values are separated by a number of clock cycles, the two code values may be considered to be alternate among the plurality of code values.
The processing unit 230 may be specifically configured to:
(1) And determining whether the current coded value in the plurality of coded values is a target coded value according to a preset determination mode.
Each time after obtaining the encoded value output from the encoder 220, the processing unit 230 may regard the encoded value as a current encoded value, and may determine whether the current encoded value is a target encoded value in the following preset determination manner.
When the number of encoded values is equal to 2, the processing unit 230 may compare the current encoded value with the last encoded value and determine the maximum value of the two encoded values as the target encoded value.
When the number of encoded values is greater than 2, the processing unit 230 may calculate the first derivative of the current encoded value according to the following formula (1):
Y i =X i+1 -X i (1)
when Y is i When equal to 0, a first derivative of a next code value spaced from a current code value by a preset time and a second derivative of the current code value among M code values may be calculated according to the following formulas (2) - (3), respectively:
Y i+1 =X i+2 -X i+1 (2)
Z i =Y i+1 -Y i (3)
wherein X is i 、X i+1 And X i+2 Representing the last encoded value (i.e., the i-th encoded value), the current encoded value (i.e., the i+1-th encoded value), and the next encoded value (i.e., the i+2-th encoded value) every two preset intervals, respectively, preferably itWhich are adjacent code values, Y i And Y i+1 Respectively represent and X i And X i+1 Corresponding first derivative, Z i Representation and X i The corresponding second derivative, i is a positive integer,
when Z is i When the number is less than 0, X may be selected from i+1 Determining a target coding value; when Z is i And if the value is greater than or equal to 0, continuing to calculate the first derivative of the next code value until the target code value is determined.
When Y is i Greater than 0 and Y i+1 When the number is less than 0, X may be selected from i+1 Determining a target coding value;
when Y is i When it is smaller than 0, the next code value spaced from the current code value by a preset time may be used as the current code value and the first derivative thereof may be calculated according to the above formula (1) until the obtained first derivative is greater than or equal to 0.
(2) When the current code value is determined to be the target code value, the corresponding counter 240 is controlled to count according to the target code value.
After determining the target code value, the processing unit 230 may control the corresponding counter to count according to the determined target code value. Specifically:
in one embodiment of the present application, when X is i+1 If X when the target code value is determined i+1 For j, the processing unit 230 may control j counters (e.g., the first counter to the j counter) in the plurality of counters 240 to count according to a preset counting manner, and the remaining counters in the plurality of counters 240 keep a current counting state (e.g., an initial counting state (e.g., 0 or an upper counting limit thereof)), where j preset amplitude thresholds corresponding to the j counters are smaller than the preset amplitude thresholds corresponding to the remaining counters, and j is a positive integer. The preset counting mode may be a mode of adding or subtracting a preset value (e.g., 1) based on the current counting state of the counter, or may be other calculating modes, which are not limited in any way.
For example, if j is 4, the first counter to the fourth counter may be increased by one or decreased by one based on the current counting state, and the remaining counters keep the current counting state; if j is 3, the first counter to the fourth counter can be increased by one or decreased by one on the basis of the current counting state, and the rest counters keep the current counting state; if j is 2, the first counter and the second counter can be increased by one or decreased by one on the basis of the current counting state, and the remaining counters keep the current counting state; if j is 1, the first counter may be incremented or decremented by one based on the current count state, and the remaining counters remain in the current count state.
In this counting mode, each counter records the number of pulse signals with the amplitude smaller than the corresponding preset amplitude threshold value.
In another embodiment of the present application, after determining the target encoding value (e.g., X i+1 ) When this is the case, the processing unit 230 may control one counter corresponding to the target encoding value among the plurality of counters to count according to a preset counting mode, and the remaining counters maintain the current counting state. For example, for the first counter to the fourth counter whose preset amplitude threshold value is sequentially increased, if it is determined that the target coding value is 3, the third counter may be increased by one or decreased by one based on the current counting state, and the first counter, the second counter and the fourth counter all maintain the current counting state.
In this counting scheme, each counter records the number of pulse signals whose amplitudes are within the corresponding amplitude threshold interval. For example, the fourth counter records the number of pulse signals having an amplitude between the preset amplitude threshold corresponding to the fourth counter and the preset amplitude threshold corresponding to the third counter. The amplitude threshold interval may refer to an interval between two adjacent preset amplitude thresholds.
It should be noted that, when the current counting state is the highest counting upper limit of the counter, the counter 240 can only perform a countdown manner such as a countdown manner, and finally the count of the counter can be determined according to the countdown value.
(3) The above-described operations of determining the target code value and controlling the counter 240 to count are repeated with the next code value, which is spaced apart from the current code value by a preset time, among the plurality of code values, as the current code value until the counter 240 completes counting all the acquired pulse signals.
After the counter 240 corresponding to the current code value control counts, the above operations (1) - (2) may be repeated with a next code value, which is spaced from the current code value by a preset time, among the plurality of code values as the current code value until the counter 240 completes counting all the acquired pulse signals.
In another embodiment of the present application, the processing unit 230 may be further configured to reset all the counters 240 to restore them to the initial counting state. The processing unit 230 may reset all the counters before receiving the code value or after determining the target code and before starting to control the counter 240 to count, so that all the counters 240 are restored to the initial count state.
In another embodiment of the present application, the processing unit 230 may be further configured to reconstruct the pulse signal according to the count data output by the counter 240. At this time, the pulse counting device may be used as a device for reconstructing the pulse signal.
In the embodiment of the present application, the counter 240 may be disposed within the processing unit 230, or may be disposed outside the processing unit 230 and connected to the processing unit 230. The counter 240 is arranged in one-to-one correspondence with the comparator 210, and the number of the counter and the comparator is the same. In addition, the counter 240 may be configured to count pulse signals according to control of the processing unit 230, and may store recorded count data, and may also output the recorded count data to the outside.
From the count data output by each counter 240, the number of rising or falling edges corresponding to each preset amplitude threshold or each amplitude threshold interval may be determined, so that the number of acquired pulse signals may be determined. If the initial count of the plurality of counters 240 is 0, the count data output by each counter 240 is the number of pulse signals corresponding to the corresponding preset amplitude threshold or the corresponding amplitude threshold interval. If the initial count of the plurality of counters 240 is other values, the number of pulse signals corresponding to the corresponding preset amplitude threshold or the corresponding amplitude threshold interval may be obtained by subtracting the corresponding initial count (for the up-counting mode) from the count data output by each counter 240 or subtracting the count data output by each counter 240 (for the down-counting mode). In addition, the counting data corresponding to different preset amplitude thresholds or corresponding amplitude threshold intervals can be selected according to different application requirements.
The comparator 210, the encoder 220, the processing unit 230, and the counter 240 may be each formed of separate electronic components, or may be implemented by logic resources in a Field Programmable Gate Array (FPGA) chip. For the latter, a Low Voltage Differential Signaling (LVDS) interface in the FPGA may be used to implement the functions of the comparator 210, and internal logic resources implement the functions of the encoder 220, the processing unit 230, the counter 240, and the like.
In another embodiment of the present application, each counting channel may further comprise a detector 200, which may be connected to a plurality of comparators 210, and may be configured to generate a corresponding pulse signal in response to the detected radioactive rays. The detector 200 may be any detector capable of converting a radioactive ray into a pulse signal, such as a photodetector or radiation detector, wherein the radiation detector may include a semiconductor radiation detector (e.g., CZD, cdTe), a gas detector, or a scintillation detector (e.g., including scintillation crystals and photoelectric converters).
In another embodiment of the present application, each counting channel may further include an amplifying circuit (not shown in the drawings) which may be disposed between the detector 200 and the plurality of comparators 210, and which is used to adjust the amplitude, polarity, and/or width, etc. of the pulse signal output from the detector 200, and to transmit the adjusted pulse signal to the plurality of comparators 210.
In another embodiment of the present application, each counting channel may further include a clock source 250, which may be configured to provide synchronous clock signals to the encoder 220 and the processing unit 230 to cause the encoder 220 and the processing unit 230 to operate at a preset clock frequency.
As can be seen from the above description, the pulse counting device provided in the embodiments of the present application compares the amplitude of the acquired pulse signal with the corresponding multiple preset amplitude thresholds by using multiple comparators, the encoder encodes the level signals output by the multiple comparators to obtain multiple encoded values, the processing unit sequentially determines the target encoded value among the multiple encoded values according to the time sequence of obtaining the multiple encoded values, and controls the corresponding counter to count according to the target encoded value, so that the purpose of accurately counting the pulse signal can be achieved, the subsequent imaging quality can be improved, and the sorting and counting function according to the amplitude of the pulse signal can also be achieved. Also, whether a pulse stacking event occurs in the pulse signal can be accurately recognized according to the count data output from each counter. In addition, the pulse counting device does not require an analog-to-digital converter (ADC), which can reduce cost and power consumption.
Embodiments of the present application also provide a radiation detection system that may be used to detect various radioactive rays and may image based on the detection results, which may include the pulse counting device of the above-described embodiments.
The systems, apparatus, units, devices, etc. described in the above embodiments may be implemented by a semiconductor chip, a computer chip, and/or an entity, or by a product having a certain function. For convenience of description, the above apparatus is described as being functionally divided into various units and devices, respectively. Of course, the functions of each unit and device may be implemented in the same chip or chips when implementing the present application.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments.
The embodiments described above are intended to facilitate the understanding and use of the present application by those of ordinary skill in the art. It will be apparent to those skilled in the art that various modifications can be made to these embodiments and that the general principles described herein may be applied to other embodiments without the need for inventive faculty. Accordingly, the present application is not limited to the above-described embodiments, and those skilled in the art, based on the disclosure of the present application, should make improvements and modifications without departing from the scope of the present application.

Claims (16)

1. A pulse counting device comprising at least one counting channel, each said counting channel comprising:
a plurality of comparators each configured to compare an amplitude of the acquired pulse signal with a corresponding preset amplitude threshold value and output a level signal indicating a result of the comparison;
an encoder configured to encode the level signals output by the comparators in a preset encoding manner in a plurality of clock cycles to obtain a plurality of encoded values;
and a processing unit configured to sequentially determine a target code value among the plurality of code values in a time sequence in which the plurality of code values are obtained, and to control a corresponding counter to count according to the target code value, wherein the target code value is greater than or equal to the code value spaced therefrom by a preset time.
2. The pulse counting apparatus of claim 1, wherein the encoder is specifically configured to:
preferentially encoding the level signals output by the comparators in an order corresponding to the magnitude of the preset amplitude thresholds in each clock cycle, and transmitting the obtained encoded values to the processing unit; or alternatively
The level signals output by the comparators are encoded in each of the clock cycles, all the obtained encoded values for all the level signals are added, and the added encoded values are sent to the processing unit.
3. The pulse counting device of claim 1, wherein the processing unit is specifically configured to:
determining whether a current coded value among a plurality of coded values is the target coded value according to a preset determination mode; when the current coding value is determined to be a target coding value, controlling the corresponding counter to count according to the target coding value; and taking the next code value which is spaced from the current code value by a preset time from the plurality of code values as the current code value, and repeating the operations of determining the target code value and controlling the counter to count until the counter finishes counting all the acquired pulse signals.
4. A pulse counting device according to claim 3, characterized in that the processing unit is further specifically configured to:
comparing a current code value with a last code value when the number of code values is 2, and determining the maximum value of the current code value and the last code value as the target code value;
when the number of the code values is greater than 2, determining the target code value in the following manner;
calculating a first derivative of the current encoded value among a plurality of the encoded values according to the following formula (1):
Y i =X i+1 -X i (1);
when Y is i When equal to 0, calculating a first derivative of a next code value spaced from the current code value by a preset time and a second derivative of the current code value among a plurality of code values according to the following formulas (2) - (3), respectively:
Y i+1 =X i+2 -X i+1 (2)
Z i =Y i+1 -Y i (3)
wherein X is i 、X i+1 And X i+2 Respectively representing the last code value, the current code value and the next code value of preset time every two intervals, Y i And Y i+1 Respectively represent and X i And X i+1 Corresponding first derivative, Z i Representation and X i The corresponding second derivative, i is a positive integer, and
when Z is i When the number is less than 0, X is calculated i+1 Determining the target coding value;
when Y is i Greater than 0 and Y i+1 When the number is less than 0, X is calculated i+1 And determining the target coding value.
5. The pulse counting apparatus of claim 4, wherein the processing unit is further specifically configured to:
when X is to be i+1 If X, when the target code value is determined i+1 And j, controlling j counters in the plurality of counters to count according to a preset counting mode, and keeping the current counting state of the rest counters in the plurality of counters, wherein j preset amplitude thresholds corresponding to the j counters are smaller than the preset amplitude thresholds corresponding to the rest counters, and j is a positive integer.
6. The pulse counting apparatus of claim 4, wherein the processing unit is further specifically configured to:
and controlling one counter corresponding to the current coding value in the plurality of counters to count according to a preset counting mode, and keeping the current counting state of the remaining counters.
7. The pulse counting device according to claim 1, wherein the processing unit is further configured to reconstruct the pulse signal from count data output by a plurality of the counters.
8. The pulse counting apparatus of claim 1, wherein each of the counting channels further comprises:
a detector coupled to the plurality of comparators and configured to generate the corresponding pulse signals in response to the detected radioactive rays.
9. The pulse counting apparatus of claim 8, wherein the detector comprises a photodetector or a radiation detector.
10. The pulse counting apparatus of claim 9, wherein the radiation detector comprises a semiconductor radiation detector, a gas detector, or a scintillation detector.
11. The pulse counting apparatus of claim 8, wherein each of the counting channels further comprises:
an amplifying circuit provided between the detector and the plurality of comparators and configured to adjust an amplitude or a polarity or a width of the pulse signal output from the detector and transmit the adjusted pulse signal to the plurality of comparators.
12. The pulse counting apparatus of claim 1, wherein each of the counting channels further comprises:
a clock source configured to provide synchronized clock signals to the encoder and the processing unit to cause the encoder and the processing unit to operate at a preset clock frequency.
13. The pulse counting apparatus of claim 1, wherein the comparator comprises a voltage comparator or a current comparator, and the encoder comprises a priority encoder.
14. The pulse counting device according to claim 1, wherein the counter is provided in or connected to the processing unit and corresponds to a plurality of the comparators.
15. The pulse counting device according to any one of claims 1-14, wherein the comparator, the encoder, the processing unit and the counter are each comprised of separate electronic components or are implemented by logic resources in an FPGA chip.
16. A radiation detection system, characterized in that it comprises a pulse counting device according to any one of claims 1-15.
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