CN109935645A - A kind of efficient volume production preparation method of the black silicon wafer of dry method - Google Patents
A kind of efficient volume production preparation method of the black silicon wafer of dry method Download PDFInfo
- Publication number
- CN109935645A CN109935645A CN201910145814.7A CN201910145814A CN109935645A CN 109935645 A CN109935645 A CN 109935645A CN 201910145814 A CN201910145814 A CN 201910145814A CN 109935645 A CN109935645 A CN 109935645A
- Authority
- CN
- China
- Prior art keywords
- silicon wafer
- black silicon
- diffusion
- volume production
- corrosion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Photovoltaic Devices (AREA)
- Weting (AREA)
- Silicon Compounds (AREA)
Abstract
The invention discloses a kind of efficient volume production preparation methods of the black silicon wafer of dry method, comprising the following steps: step 1 removes damaging layer: using the method for acid corrosion or caustic corrosion, the damaging layer of silicon chip surface being removed；Cleaning: step 2 the silicon wafer for removing damaging layer is cleaned, its porous surface silicon and liquor residue are removed；Phosphorous diffusion impurity removal: step 3 forms heavily doped region using dense phosphorus diffusion silicon chip surface obtained in step 2, absorbs impurity in wafer bulk；Step 4, removal diffusion Symmicton: using the method for caustic corrosion, removal diffusion Symmicton；Step 5 prepares black silicon wafer: preparing black silicon wafer using the black silicon technology of RIE；Step 6 modifies flannelette: there is the black silicon wafer of nano aperture to modify the surface that step 5 obtains, obtains black silicon wafer.The present invention is at low cost, is easy to volume production, can be obviously improved silicon wafer quality, to improve polycrystalline battery efficiency, increases the polycrystalline competitiveness of product in market.
Description
Technical field
The present invention relates to the preparation fields of photovoltaic polysilicon chip, more particularly to a kind of preparation method of black silicon wafer.
Background technique
The diamond wire silicon wafer cutting technique to grow up in recent years have environmental-friendly, loss less, slice efficiency height etc. it is all
Mostly a little, silicon wafer cost can be made to decline to a great extent, this technology realizes all-round popularization on monocrystalline, but pushing away on polycrystalline
Very big problem is but encountered when wide use, this is because silicon wafer cut by diamond wire surface is affected there is one layer of amorphous silicon
Conventional multi-crystalline silicon HF/HNO3The validity of making herbs into wool system.Although Buddha's warrior attendant wire cutting polysilicon chip can make polycrystalline cost decline
It is more, but since the surface after Buddha's warrior attendant wire cutting is hardly formed uniform flannelette, cause flannelette reflectivity to increase, battery efficiency
It reduces instead, so that polycrystalline battery is at a disadvantage in the competition with single crystal battery.
The reason of in polysilicon due to raw material, crucible and processing procedure, can dissolve more metal impurities in polysilicon chip,
Especially magnesium-yttrium-transition metal such as iron, copper, nickel etc., while there are polysilicon the structures such as crystal boundary, dislocation, the microdefect of higher density to lack
It falls into, the presence of these metals and its interaction of material structure defect significantly reduce the minority carrier life time of device, to drop
The low transfer efficiency of solar battery, also results in the situation that the current polysilicon product market share keeps falling.
For polycrystalline diamond line silicon wafer difficulty making herbs into wool problem, current metal catalytic chemical corrosion method, due at low cost, with
The advantages that existing producing line has been compatible with has obtained extensive popularization.
Removal for the metal impurities in polysilicon chip is mainly to pass through outer gettering to complete, and outer impurity-absorbing technique mainly has phosphorus
Gettering, aluminium gettering, phosphorus aluminium gettering etc..There are many these impurity-absorbing techniques universities and colleges and business research before 2013.Tang Jun etc. is being cast
Make the minority carrier lifetime of discovery different location after 870 DEG C of phosphorus gettering 40min in the phosphorus gettering research of polysilicon silicon wafer
All increase significantly.Chen Jinxue, seat is precious strong etc. to have studied influence of the alternating temperature phosphorus gettering to polysilicon performance.Although many researchs
With experiments have shown that phosphorus gettering has very big advantage, but it is only limitted in experimental study, because needing to remove polysilicon before gettering
The loss layer of piece, and this loss layer is exactly the indispensability of polycrystalline making herbs into wool, leads to the technical research and battery production of phosphorus gettering
It breaks off relations completely, it can not volume production.And in some battery enterprises, many so-called getterings are not pure gettering at all, only
One phosphorus diffusion, forms the process of PN junction, and in order to guarantee that surface concentration is lower, the shallower PN junction structure of junction depth, phosphorus diffusion is all adopted
It is low concentration P diffusion, this gettering effect is extremely limited.This is also the conclusion that some enterprise's phosphorus gettering inefficiencies are promoted.
Patent in terms of same phosphorus impurity-absorbing technique is also very much, Inner Mongol life solar energy science and technology limited Company application
" silicon wafer and solar battery made of metallurgy polycrystalline silicon piece phosphorus impurity absorption method and the method " patent No. CN201310040741.8,
Method is as follows: erosion removal metallurgy polycrystalline silicon piece surface damage layer；Rinsing silicon wafer simultaneously dries；Silicon wafer is placed in diffusion furnace and is carried out
The heat treatment of phosphorus gettering, phosphorous source diffusion flow are 650~700mL/min, and dry oxygen flow is 500~700mL/min, and diffusion temperature is
920~970 DEG C, diffusion time is 30~45min, then cools down silicon wafer；Erosion removal silicon chip surface is formed due to phosphorus diffusion
Symmicton and PN junction；Rinsing silicon wafer simultaneously dries, the metallurgy polycrystalline silicon piece after obtaining phosphorus gettering.The technology of this Patent design is in battery
With when due to erosion removal surface damage layer, when secondary removal Symmicton, current polycrystalline battery mainly used nitration mixture making herbs into wool,
Preferential etch can occur, cause silicon chip surface staple serious, ultimately form leakage point of electricity, such as use caustic corrosion, it is anti-to will cause surface
Increase is penetrated, causes battery-end incidence light loss serious, efficiency is caused to reduce.
A kind of " the phosphorus gettering diffusion technique for reducing oxygen usage amount " of logical prestige solar energy (Hefei) Co., Ltd application, specially
Benefit CN201810376318.8, technical process include: technique start, into boat, heating, it is preceding oxidation, for the first time deposition, for the first time
It promotes, second of deposition, promote for second, third time deposition, third time promote, rear oxidation, go out boat.This patented technology is related to
Technological essence on be battery diffusion technique, due to the low surface concentration shallow junction of battery request, actual deposition promote temperature only have
790~850 degrees Celsius, and the time is short, gettering effect is limited.
" the solar battery of the low surface layer composite construction of deep diffusion junctions of Baotou Shancheng New Energy Co., Ltd.'s application
Piece ", a kind of " raising crystalline silicon of patent No. CN201620542548.3 and brilliant Australia (Yangzhou) solar energy Science and Technology Ltd. application
The impurity absorption method of matrix useful life ", patent No. CN201210307893.5, the two patents are substantially the diffusion of battery
Technique, it is very limited for gettering effect.
The ionic reaction method (Reactive Ion Etching, RIE) of dry method making herbs into wool be prepare black silicon mainstream technology it
One, mechanism are as follows: free radical and neutral atom group are chemically reacted with etachable material；For silicon materials, " silicon-halogen " key is used
Instead of " silicon-silicon " key, achieve the purpose that etching.
Summary of the invention
For phosphorus impurity-absorbing technique can not practical volume production and the ineffective predicament of battery diffusion phosphorus gettering, the purpose of the present invention
It is to provide a kind of efficient volume production preparation method of black silicon wafer of dry method, phosphorus impurity-absorbing technique is combined with the black silicon of dry method, to reach
It is easy to volume production, promotes the purpose of silicon wafer quality.
To achieve the above object, the technical solution adopted by the present invention are as follows:
A kind of efficient volume production preparation method of the black silicon wafer of dry method, comprising the following steps:
Step 1 removes damaging layer: using the method for acid corrosion or caustic corrosion, the damaging layer of silicon chip surface being removed；
Cleaning: step 2 the silicon wafer for removing damaging layer is cleaned, its porous surface silicon and liquor residue are removed；
Phosphorous diffusion impurity removal: step 3 forms heavily doped region using dense phosphorus diffusion silicon chip surface obtained in step 2, absorbs silicon wafer
Internal impurity；
Step 4, removal diffusion Symmicton: using the method for caustic corrosion, removal diffusion Symmicton；
The black silicon preparation of dry method: step 5 prepares black silicon wafer using the black silicon technology of RIE；
Step 6 modifies flannelette: there is the black silicon wafer of nano aperture to modify the surface that step 5 obtains, obtains black silicon
Piece.
In the step 1, the method for acid corrosion are as follows: using the mixed liquor corrosion of silicon of hydrofluoric acid and nitric acid, hydrofluoric acid and
The volume ratio of nitric acid be 1:1~1:10,5~15 degrees Celsius of temperature, 0.15~0.5 gram of etching extent.
In the step 1, the method for caustic corrosion are as follows: use mass percentage concentration rotten for 2~10% potassium hydroxide solution
Erosion silicon wafer, 60~90 degrees Celsius of temperature, 0.15~0.5 gram of etching extent.
If step 1 uses acid corrosion, cleaned in step 2 using alkaline solution, wherein alkaline solution is quality
The potassium hydroxide solution that percentage concentration is 2~10%；If step 1 uses caustic corrosion, carried out in step 2 using acid solution
Cleaning, wherein acid solution is the mixed liquor that hydrofluoric acid and hydrochloric acid are mixed with volume ratio for 2:1~1:5.
The step 3 specifically: phosphorous diffusion impurity removal uses alternating temperature gettering process, using Horizontal normal pressure diffusion furnace, including with
Lower step: the first stepping boat；Second step heating reaches 750~1000 degrees Celsius, and being passed through phosphorus oxychloride flow is 200~5000 millis
Liter/min, oxygen flow is 200~3000 ml/mins, and nitrogen flow is 0~30 liter/min, 5~60 points of diffusion time
Clock；Third step is warming up to 750~1000 degrees Celsius, and being passed through phosphorus oxychloride flow is 200~5000 ml/mins, oxygen flow
For 200~3000 ml/mins, nitrogen flow is 0~30 liter/min, diffusion time 10~60 minutes；4th step is cooled to
550~800 degrees Celsius and heat preservation 5~60 minutes, the 5th walks out of boat.
In the step 4, mass percentage concentration is used to spread gettering for 2~10% potassium hydroxide solution erosion removal
Layer, 60~90 degrees Celsius of temperature, 0.15~0.5 gram of etching extent.
In the step 5, the process conditions of black silicon wafer are prepared using the black silicon technology of RIE are as follows: the flow of sulfur hexafluoride is
1000~2000 ml/mins, oxygen flow are 1000~3500 ml/mins, and chlorine flowrate is 500~2000 ml/mins
Clock, 1000~2000 watts of radio-frequency power, 10~40 pa of vacuum pressure, the process time 30~90 seconds.
In the step 6, using buffered oxide etch liquid (BOE, Buffered Oxide Etch), H2O2Mixing
Liquid modifies black silicon flannelette, process conditions are as follows: and 30~50 degrees Celsius of temperature, wherein buffered oxide etch liquid and H2O2Volume ratio
For 3:1~1:3, buffered oxide etch liquid is mixed by hydrofluoric acid and ammonium fluoride according to volume ratio 1:4~1:6.
In the step 6, flannelette, process conditions are as follows: temperature 5~15 are modified using the mixed liquor reaming of hydrofluoric acid, nitric acid
Degree Celsius, wherein HF and HNO3Volume ratio be 1:1~1:10.
The utility model has the advantages that the present invention ties phosphorus impurity-absorbing technique and the black silicon of dry method (Reactive Ion Etching, abbreviation RIE)
Altogether.This technology path is at low cost, is easy to volume production, can be obviously improved silicon wafer quality, to improve polycrystalline battery efficiency, increases
Add the brilliant competitiveness of product in market.
Compared with prior art, the present invention can be in conjunction with practical photovoltaic industry, it is easy to accomplish volume production removes polysilicon chip
In impurity, improve the minority carrier life time of polysilicon, improve the transfer efficiency of battery.Simultaneously because impurity subtracts in polysilicon chip
Few, the especially reduction of ferro element can equally reduce the optical attenuation of battery, improve the stability of polycrystalline component output power.
Specific embodiment
The invention discloses a kind of efficient volume production preparation methods of the black silicon wafer of dry method, comprising the following steps:
Step 1 removes damaging layer: using the method for acid corrosion or caustic corrosion, the damaging layer of silicon chip surface being removed；Wherein,
The method of acid corrosion are as follows: using the mixed liquor corrosion of silicon of hydrofluoric acid and nitric acid, the volume ratio of hydrofluoric acid and nitric acid is 1:1~1:
10,5~15 degrees Celsius of temperature, 0.15~0.5 gram of etching extent；The method of caustic corrosion are as follows: use mass percentage concentration for 2~10%
Potassium hydroxide solution corrosion of silicon, 60~90 degrees Celsius of temperature, 0.15~0.5 gram of etching extent；
Cleaning: step 2 the silicon wafer for removing damaging layer is cleaned, its porous surface silicon and liquor residue are removed；Wherein,
If step 1 uses acid corrosion, cleaned in step 2 using alkaline solution, wherein alkaline solution is mass percentage concentration
For 2~10% potassium hydroxide solution；If step 1 uses caustic corrosion, cleaned in step 2 using acid solution,
In, acid solution is the mixed liquor that hydrofluoric acid and hydrochloric acid are mixed with volume ratio for 2:1~1:5；
Phosphorous diffusion impurity removal: step 3 forms heavily doped region using dense phosphorus diffusion silicon chip surface obtained in step 2, absorbs silicon wafer
Internal impurity achievees the purpose that promote silicon wafer quality；Specific steps are as follows: phosphorous diffusion impurity removal uses alternating temperature gettering process, using sleeping
Formula normal pressure diffusion furnace, comprising the following steps: the first stepping boat；Second step heating reaches 750~1000 degrees Celsius, is passed through trichlorine oxygen
Phosphorus flow is 200~5000 ml/mins, and oxygen flow is 200~3000 ml/mins, and nitrogen flow is 0~30 liter/min
Clock, diffusion time 5~60 minutes；Third step is warming up to 750~1000 degrees Celsius, and being passed through phosphorus oxychloride flow is 200~5000
Ml/min, oxygen flow are 200~3000 ml/mins, and nitrogen flow is 0~30 liter/min, diffusion time 10~60
Minute；4th step is cooled to 550~800 degrees Celsius and keeps the temperature 5~60 minutes, and the 5th walks out of boat；
Removal diffusion Symmicton: step 4 uses mass percentage concentration to spread for 2~10% potassium hydroxide solution erosion removal
Symmicton, 60~90 degrees Celsius of temperature, 0.15~0.5 gram of etching extent, removal diffusion Symmicton；
The black silicon preparation of dry method: step 5 prepares black silicon wafer using the black silicon technology of RIE；Wherein, process conditions are as follows: sulfur hexafluoride
Flow is 1000~2000 ml/mins, and oxygen flow is 1000~3500 ml/mins, and chlorine flowrate is 500~2000 millis
Liter/min, 1000~2000 watts of radio-frequency power, 10~40 pa of vacuum pressure, the process time 30~90 seconds
Step 6 modifies flannelette: there is the black silicon wafer of nano aperture to modify the surface that step 5 obtains, obtains black silicon
Piece；It is modified specifically, following two method can be used, the first are as follows: use buffered oxide etch liquid, H2O2Mixing
Liquid modifies black silicon flannelette, process conditions are as follows: and 30~50 degrees Celsius of temperature, wherein buffered oxide etch liquid and H2O2Volume ratio
For 3:1~1:3, buffered oxide etch liquid is mixed by hydrofluoric acid and ammonium fluoride according to volume ratio 1:4~1:6；Second
Are as follows: using hydrofluoric acid, nitric acid mixed liquor reaming modify flannelette, process conditions are as follows: 5~15 degrees Celsius of temperature, wherein HF with
HNO3Volume ratio be 1:1~1:10.
Further explanation is done to the present invention below with reference to embodiment.
Embodiment 1:
Step 1, using hydrofluoric acid (HF) and nitric acid (HNO3) nitration mixture corrosion of silicon, HF and HNO3Volume ratio be 1:5, it is rotten
The erosion time 150 seconds, removes surface damage layer, had both guaranteed the removal of surface losses layer, while silicon wafer table in this way by 0.2 gram of etching extent
Velvet silk is less.
Step 2, using mass percentage concentration is 5% potassium hydroxide solution in the silicon chip surface progress after acid corrosion
With, scavenging period 50 seconds, remove porous silicon and surface acid solution residual, then use hydrofluoric acid and hydrochloric acid with volume ratio for 1:5 mix
The mixed liquor of conjunction cleans silicon chip surface, neutralizes surface alkali residual and complexing silicon sheet surface metal ion.
Step 3, diffusion gettering use alternating temperature gettering process, use Horizontal normal pressure diffusion furnace, the first stepping boat；Second step
Heating reaches 850 degrees Celsius, and being passed through phosphorus oxychloride flow is 2000 ml/mins, and oxygen flow is 1000 ml/mins, nitrogen
Throughput is 15 liters/min, diffusion time 10min；Third step is warming up to 880 degrees Celsius, and being passed through phosphorus oxychloride flow is 2000
Ml/min, oxygen flow are 1000 ml/mins, and nitrogen flow is 15 liters/min, diffusion time 20 minutes；4th step drop
Temperature is to 750 degrees Celsius and keeps the temperature 30 minutes, and the 5th walks out of boat.
Step 4 uses mass percentage concentration to spread Symmicton, etching time for 5% potassium hydroxide solution erosion removal
100sec, 0.2 gram of etching extent；
Step 5 prepares black silicon wafer, process conditions using the black silicon technology of RIE are as follows: the flow of sulfur hexafluoride is 1600 ml/mins
Clock, oxygen flow be 2400 ml/mins, chlorine flowrate be 1200 ml/min groups, 1500 watts of radio-frequency power, vacuum pressure 25
Pa, the process time 60 seconds；
Step 6, using buffered oxide etch liquid (BOE, Buffered Oxide Etch), hydrogen peroxide (H2O2) mixed liquor
Modify the black silicon flannelette of RIE, process conditions are as follows: 37 degrees Celsius of temperature, the time 150 seconds；Wherein BOE and H2O2Volume ratio be 1:1,
Buffered oxide etch liquid is mixed by hydrofluoric acid and ammonium fluoride according to volume ratio 1:6.Black silicon flannelette after being modified.
Embodiment 2:
Step 1, use mass percentage concentration for 5% potassium hydroxide solution corrosion of silicon, etching time 120 seconds, etching extent 0.2
Gram, remove surface damage layer.
Step 2 uses hydrofluoric acid and the mixed liquor of hydrochloric acid (volume ratio 1:1) to clean silicon chip surface, neutralizes table
Face alkali residual and complexing silicon sheet surface metal ion.
Step 3, diffusion gettering use alternating temperature gettering process, use Horizontal normal pressure diffusion furnace, the first stepping boat；Second step
Heating reaches 850 degrees Celsius, and being passed through phosphorus oxychloride flow is 2000 ml/mins, and oxygen flow is 1000 ml/mins, nitrogen
Throughput is 15 liters/min, diffusion time 10min；Third step is warming up to 880 degrees Celsius, and being passed through phosphorus oxychloride flow is 2000
Ml/min, oxygen flow are 1000 ml/mins, and nitrogen flow is 15 liters/min, diffusion time 20 minutes；4th step drop
Temperature is to 750 degrees Celsius and keeps the temperature 30 minutes, and the 5th walks out of boat.
Step 4 uses mass percentage concentration to spread Symmicton, etching time for 5% potassium hydroxide erosion removal
100sec, 0.2 gram of etching extent；
Step 5 prepares black silicon wafer, process conditions using the black silicon technology of RIE are as follows: the flow of sulfur hexafluoride is 1600 ml/mins
Clock, oxygen flow be 2400 ml/mins, chlorine flowrate be 1200 ml/min groups, 1500 watts of radio-frequency power, vacuum pressure 25
Pa, the process time 60 seconds；
Step 6 modifies flannelette, process conditions using the mixed liquor reaming of hydrofluoric acid, nitric acid are as follows: and 9 degrees Celsius of temperature, the time 120
Second, wherein HF and HNO3Volume ratio be 1:6, the black silicon flannelette after being modified.
The above is only a preferred embodiment of the present invention, it is noted that those skilled in the art are come
It says, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications also should be regarded as
Protection scope of the present invention.
Claims (9)
1. a kind of efficient volume production preparation method of the black silicon wafer of dry method, it is characterised in that: the following steps are included:
Step 1 removes damaging layer: using the method for acid corrosion or caustic corrosion, the damaging layer of silicon chip surface being removed；
Cleaning: step 2 the silicon wafer for removing damaging layer is cleaned, its porous surface silicon and liquor residue are removed；
Phosphorous diffusion impurity removal: step 3 forms heavily doped region using dense phosphorus diffusion silicon chip surface obtained in step 2, absorbs silicon wafer
Internal impurity；
Step 4, removal diffusion Symmicton: using the method for caustic corrosion, removal diffusion Symmicton；
The black silicon preparation of dry method: step 5 prepares black silicon wafer using the black silicon technology of RIE；
Step 6 modifies flannelette: there is the black silicon wafer of nano aperture to modify the surface that step 5 obtains, obtains black silicon
Piece.
2. the efficient volume production preparation method of the black silicon wafer of dry method according to claim 1, it is characterised in that: the step 1
In, the method for acid corrosion are as follows: using the mixed liquor corrosion of silicon of hydrofluoric acid and nitric acid, the volume ratio of hydrofluoric acid and nitric acid is 1:1
~1:10,5~15 degrees Celsius of temperature, 0.15~0.5 gram of etching extent.
3. the efficient volume production preparation method of the black silicon wafer of dry method according to claim 1, it is characterised in that: the step 1
In, the method for caustic corrosion are as follows: use mass percentage concentration for 2~10% potassium hydroxide solution corrosion of silicon, temperature 60~90 takes the photograph
Family name's degree, 0.15~0.5 gram of etching extent.
4. the efficient volume production preparation method of the black silicon wafer of dry method according to claim 1, it is characterised in that: if step 1 uses
Acid corrosion is then cleaned in step 2 using alkaline solution, wherein alkaline solution is the hydrogen that mass percentage concentration is 2~10%
Potassium oxide solution；If step 1 uses caustic corrosion, cleaned using acid solution in step 2, wherein acid solution is
The mixed liquor that hydrofluoric acid and hydrochloric acid are mixed with volume ratio for 2:1~1:5.
5. the efficient volume production preparation method of the black silicon wafer of dry method according to claim 1, it is characterised in that: the step 3 tool
Body are as follows: phosphorous diffusion impurity removal uses alternating temperature gettering process, uses Horizontal normal pressure diffusion furnace, comprising the following steps: the first stepping boat；The
The heating of two steps reaches 750~1000 degrees Celsius, and being passed through phosphorus oxychloride flow is 200~5000 ml/mins, and oxygen flow is
200~3000 ml/mins, nitrogen flow are 0~30 liter/min, diffusion time 5~60 minutes；Third step is warming up to 750~
1000 degrees Celsius, being passed through phosphorus oxychloride flow is 200~5000 ml/mins, and oxygen flow is 200~3000 ml/mins,
Nitrogen flow is 0~30 liter/min, diffusion time 10~60 minutes；4th step be cooled to 550~800 degrees Celsius and keep the temperature 5~
60 minutes, the 5th walked out of boat.
6. the efficient volume production preparation method of the black silicon wafer of dry method according to claim 1, it is characterised in that: the step 4
In, use mass percentage concentration for 2~10% potassium hydroxide solution erosion removal spread Symmicton, 60~90 degrees Celsius of temperature,
0.15~0.5 gram of etching extent.
7. the efficient volume production preparation method of the black silicon wafer of dry method according to claim 1, it is characterised in that: the step 5
In, the process conditions of black silicon wafer are prepared using the black silicon technology of RIE are as follows: the flow of sulfur hexafluoride is 1000~2000 ml/mins,
Oxygen flow is 1000~3500 ml/mins, and chlorine flowrate is 500~2000 ml/mins, radio-frequency power 1000~2000
Watt, 10~40 pa of vacuum pressure, the process time 30~90 seconds.
8. the efficient volume production preparation method of the black silicon wafer of dry method according to claim 1, it is characterised in that: the step 6
In, using buffered oxide etch liquid, H2O2Mixed liquor modify black silicon flannelette, process conditions are as follows: 30~50 degrees Celsius of temperature,
Wherein buffered oxide etch liquid and H2O2Volume ratio be 3:1~1:3, buffered oxide etch liquid is by hydrofluoric acid and ammonium fluoride
It is mixed according to volume ratio 1:4~1:6.
9. the efficient volume production preparation method of the black silicon wafer of dry method according to claim 1, it is characterised in that: the step 6
In, using hydrofluoric acid, nitric acid mixed liquor reaming modify flannelette, process conditions are as follows: 5~15 degrees Celsius of temperature, wherein HF with
HNO3Volume ratio be 1:1~1:10.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910145814.7A CN109935645A (en) | 2019-02-27 | 2019-02-27 | A kind of efficient volume production preparation method of the black silicon wafer of dry method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910145814.7A CN109935645A (en) | 2019-02-27 | 2019-02-27 | A kind of efficient volume production preparation method of the black silicon wafer of dry method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109935645A true CN109935645A (en) | 2019-06-25 |
Family
ID=66985987
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910145814.7A Pending CN109935645A (en) | 2019-02-27 | 2019-02-27 | A kind of efficient volume production preparation method of the black silicon wafer of dry method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109935645A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110993746A (en) * | 2019-11-13 | 2020-04-10 | 江苏科来材料科技有限公司 | Preparation method of polycrystalline silicon solar cell |
| CN111081797A (en) * | 2019-12-31 | 2020-04-28 | 北京北方华创真空技术有限公司 | Processing method of monocrystalline silicon wafer, monocrystalline silicon wafer and solar cell |
| CN112466990A (en) * | 2020-11-12 | 2021-03-09 | 晋能光伏技术有限责任公司 | Preparation process of high-efficiency heterojunction solar cell |
| CN112466989A (en) * | 2020-11-12 | 2021-03-09 | 晋能光伏技术有限责任公司 | Preparation process of heterojunction solar cell |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101331614A (en) * | 2005-12-16 | 2008-12-24 | Bp北美公司 | Back-contact photovoltaic cells |
| US20100041175A1 (en) * | 2008-07-09 | 2010-02-18 | Commissariat A L'energie Atomique. | Method of purifying a crystalline silicon substrate and process for producing a photovoltaic cell |
| TW201220518A (en) * | 2010-11-15 | 2012-05-16 | Ind Tech Res Inst | Method for fabricating solar cell |
| CN102820378A (en) * | 2012-08-27 | 2012-12-12 | 晶澳（扬州）太阳能科技有限公司 | Gettering method for prolonging effective service life of crystalline silicon substrate |
| CN103943719A (en) * | 2014-03-25 | 2014-07-23 | 晶澳（扬州）太阳能科技有限公司 | Method for carrying out control over phosphorous doping concentration through combination of pre-oxidation mode and low temperature-high temperature-low temperature variable-temperature diffusion mode |
| CN104659151A (en) * | 2015-02-09 | 2015-05-27 | 浙江晶科能源有限公司 | Method for diffusion gettering of solar battery |
| CN108123009A (en) * | 2016-11-29 | 2018-06-05 | 镇江大全太阳能有限公司 | A kind of preparation method of the black silion cell of RIE making herbs into wool |
-
2019
- 2019-02-27 CN CN201910145814.7A patent/CN109935645A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101331614A (en) * | 2005-12-16 | 2008-12-24 | Bp北美公司 | Back-contact photovoltaic cells |
| US20100041175A1 (en) * | 2008-07-09 | 2010-02-18 | Commissariat A L'energie Atomique. | Method of purifying a crystalline silicon substrate and process for producing a photovoltaic cell |
| TW201220518A (en) * | 2010-11-15 | 2012-05-16 | Ind Tech Res Inst | Method for fabricating solar cell |
| CN102820378A (en) * | 2012-08-27 | 2012-12-12 | 晶澳（扬州）太阳能科技有限公司 | Gettering method for prolonging effective service life of crystalline silicon substrate |
| CN103943719A (en) * | 2014-03-25 | 2014-07-23 | 晶澳（扬州）太阳能科技有限公司 | Method for carrying out control over phosphorous doping concentration through combination of pre-oxidation mode and low temperature-high temperature-low temperature variable-temperature diffusion mode |
| CN104659151A (en) * | 2015-02-09 | 2015-05-27 | 浙江晶科能源有限公司 | Method for diffusion gettering of solar battery |
| CN108123009A (en) * | 2016-11-29 | 2018-06-05 | 镇江大全太阳能有限公司 | A kind of preparation method of the black silion cell of RIE making herbs into wool |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110993746A (en) * | 2019-11-13 | 2020-04-10 | 江苏科来材料科技有限公司 | Preparation method of polycrystalline silicon solar cell |
| CN111081797A (en) * | 2019-12-31 | 2020-04-28 | 北京北方华创真空技术有限公司 | Processing method of monocrystalline silicon wafer, monocrystalline silicon wafer and solar cell |
| CN111081797B (en) * | 2019-12-31 | 2021-04-27 | 北京北方华创真空技术有限公司 | Processing method of monocrystalline silicon wafer, monocrystalline silicon wafer and solar cell |
| CN112466990A (en) * | 2020-11-12 | 2021-03-09 | 晋能光伏技术有限责任公司 | Preparation process of high-efficiency heterojunction solar cell |
| CN112466989A (en) * | 2020-11-12 | 2021-03-09 | 晋能光伏技术有限责任公司 | Preparation process of heterojunction solar cell |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109935645A (en) | A kind of efficient volume production preparation method of the black silicon wafer of dry method | |
| AU780184B2 (en) | Method for raw etching silicon solar cells | |
| CN104576830B (en) | Texturing pretreatment liquid and texturing pretreatment method for diamond wire cutting polycrystalline silicon sheet, texturing pretreatment silicon sheet and application of texturing pretreatment silicon sheet | |
| CN102703989A (en) | Monocrystal-like solar battery texturing process | |
| KR20140010155A (en) | Method for manufacturing wafer for solar cell, method for manufacturing solar cell, and method for manufacturing solar cell module | |
| CN104505437B (en) | A kind of diamond wire cutting making herbs into wool pretreatment fluid of polysilicon chip, making herbs into wool preprocess method and making herbs into wool pretreatment silicon chip and application thereof | |
| CN103403875A (en) | Method for the wet-chemical etching back of a solar cell emitter | |
| SG173203A1 (en) | Methods for damage etch and texturing of silicon single crystal substrates | |
| CN109980043A (en) | A kind of efficient volume production preparation method of the black silicon wafer of wet process | |
| CN102270702A (en) | Rework process for texturing white spot monocrystalline silicon wafer | |
| CN103087850A (en) | Monocrystalline silicon wafer precleaning liquid and cleaning method thereof | |
| CN102403251A (en) | Prewashing solution of crystal silicon wafer and prewashing technology thereof | |
| CN105951184A (en) | Texturing method of diamond wire-cut polycrystalline silicon wafer | |
| CN102810596A (en) | Suede preparation method of metallurgical-grade single crystal and mono-like silicon | |
| CN111105995B (en) | Cleaning and texturing method of monocrystalline silicon wafer | |
| CN112442739B (en) | Pyramid rapid texturing liquid, texturing method thereof and silicon wafer product | |
| CN109326660A (en) | Solar cell monocrystalline silicon substrate flannelette generates technique | |
| CN103904157A (en) | Method for making texture surface of silicon wafer | |
| CN103924305A (en) | Making method of quasi-monocrystalline silicon wafer suede | |
| CN102336409A (en) | Method for reducing metal impurities in polysilicon | |
| CN102653887A (en) | Treatment method and etching method of crystalline silicon wafer with oil stains | |
| CN105826410A (en) | Diamond wire cutting trace eliminated polysilicon texturizing method | |
| CN102683483A (en) | Method for removing dead layer of crystalline silicon solar battery | |
| CN111883617A (en) | Production process of quasi-single crystal battery piece | |
| CN105568364A (en) | Method for improving yield and/or conversion efficiency of cast monocrystalline silicon ingot |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190625 |