CN109906477A - Power supply line voltage-drop compensation for Active Matrix Display - Google Patents

Power supply line voltage-drop compensation for Active Matrix Display Download PDF

Info

Publication number
CN109906477A
CN109906477A CN201780067935.3A CN201780067935A CN109906477A CN 109906477 A CN109906477 A CN 109906477A CN 201780067935 A CN201780067935 A CN 201780067935A CN 109906477 A CN109906477 A CN 109906477A
Authority
CN
China
Prior art keywords
pixel
power supply
voltage
active matrix
calibration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201780067935.3A
Other languages
Chinese (zh)
Other versions
CN109906477B (en
Inventor
J·吉诺
F·德卢斯
W·德阿纳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Katholieke Universiteit Leuven
Interuniversitair Microelektronica Centrum vzw IMEC
Original Assignee
Katholieke Universiteit Leuven
Interuniversitair Microelektronica Centrum vzw IMEC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Katholieke Universiteit Leuven, Interuniversitair Microelektronica Centrum vzw IMEC filed Critical Katholieke Universiteit Leuven
Publication of CN109906477A publication Critical patent/CN109906477A/en
Application granted granted Critical
Publication of CN109906477B publication Critical patent/CN109906477B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G09G2300/0866—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes by means of changes in the pixel supply voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0285—Improving the quality of display appearance using tables for spatial correction of display data
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/029—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel
    • G09G2320/0295—Improving the quality of display appearance by monitoring one or more pixels in the display panel, e.g. by monitoring a fixed reference pixel by monitoring each display pixel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0693—Calibration of display systems
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/028—Generation of voltages supplied to electrode drivers in a matrix display other than LCD
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof

Abstract

Driving system circuit system for Active Matrix Display, comprising: data driver module, for receiving the digital data bit stream for indicating the image to be shown by each pixel of Active Matrix Display；One or more power supply lines, for powering to multiple pixels, each pixel includes at least one light-emitting component；Voltage source is connected to the one or more power supply line；And calibrating installation, for compensating the reduction of the power on the one or more power supply line.The calibrating installation includes: the device for making current flow through each individual pixel, for determining the pressure drop across the pixel and the device for the pressure drop to be compared with the preset reference voltage of the pixel, for the device from the relatively middle calibration value for determining the pixel, the calibration value takes into account the resistance for the cable for being connected to voltage source and being grounded, for calibration value to be applied to the digital data bit stream received to thus generate the device of data driver voltage, the data driver voltage expression to be applied for being used for corrected image to data driver module.

Description

Power supply line voltage-drop compensation for Active Matrix Display
Invention field
The present invention relates to the fields of active matrix LED panel.More particularly, the present invention relate to drive and compensate number The method of the inhomogeneities of the AMLED or displayer of driving.
Background of invention
Active matrix light-emitting diode (AMLED) display pannel and the version including Organic Light Emitting Diode (AMOLED) Originally three major parts: the foreboard comprising LED or OLED are generally included, the back with active matrix pixel array (including TFT) Plate, and it is generally in the electronic driver at display edge.
During display running there is significant degradation in both foreboard and backboard, and advise for the production of flat-panel monitor Journey is not homogeneity.It is seemed unavoidably in the manufacturing condition at present, lacking uniform or homogeneity, because of this in display A little heterogeneities come from various uncontrollable sources: the heterogeneity in production process is (for example, the change of the dielectric thickness across panel Change and the interface quality of semiconductor, form the deposition variation of the material of (O) LED and change etc.), it is non-homogeneous in matrix material Property (for example, grain boundaries in LTPS) and other sources.The degradation of display can be showed with diversified forms: for example, The offset of offset (due to using the degradation of engine, due to the degrading caused by time passage), TFT characteristic of OLED characteristic, generally It is most of that (voltage or illumination) etc. is dominated by bias pressure.It may to another influence factor to degrade and heterogeneity is made contributions From the supply for the electric current being distributed in all pixels and the variation of ground lead resistance.
In order to compensate for the offset and variation generated that degrade, the electric current in each pixel needs to be matched picture to be displayed The digit expected value of element.Several strategies have been developed pixel current is accurately arranged.Traditional and most common technology passes through Driving driving transistor comes as the current source of saturation using the fine tuning to the electric current in each pixel, that is, passes through application Source drain voltage (VDS) much larger than VGS-VT.This high source drain voltage leads to higher power consumption, because of most of function Rate is depleted in the backboard across the driving transistor for being used as current source.In addition, pixel group (for example, column in display) with Contact negative line between power source usually introduces ghost effect.These ghost effects (such as pressure drop) can be by each column The increase of digital analog converter (DAC) compensates.However, which increase the complexity of circuit, and introduce further Ghost effect and pressure drop.Since the electric current in all pixels is in all situations of the Active Matrix Display of digital (PWM) driving Under all should be equal, therefore this may cause the deterioration of picture quality.
Other technologies are developed, the certain luminance water in each pixel is arranged using PWM scheme for these technologies It is flat.However, it is either 0 or be fixed value (based on pixel size that this, which requires pixel current that can be set very accurately into, With required display luminosity).WO2014/080014, which is described, how to reach uniform electricity using the current source of every a line Stream.However, this requires the contact pad of twice of number to drive display (to introduce additional compared with analogue, drive scheme Ghost effect) because both data line and power supply are required by silicon driver on the basis of every a line in the solution To provide.In addition, it requires main memory current source in the drive, this will occupy sizable area of chip.This is suboptimum, Because every cellar area can manufacture less pixel, so as to cause the display resolution of suboptimum.Therefore, it is aobvious to be not intended to driving for this Show the very cost-effective method of device.
Summary of the invention
The goal is to provide a kind of driving AMOLED (Activematric OLED) displays by one of various embodiments of the present invention Or the good method and equipment of AMLED (active matrix LED) display.The advantages of various embodiments of the present invention is, display It drives in a uniform manner to obtaining good picture quality.
In a first aspect, the present invention provides the driving system circuit systems for Active Matrix Display.The driving system System circuit system include:
Data driver module, will be by the image that each pixel of the Active Matrix Display is shown for receiving expression Digital data bit stream,
One or more power supply lines, for powering to multiple pixels, each pixel includes at least one light-emitting component,
Voltage source is connected to the one or more power supply line, and
Calibrating installation, for compensating the reduction of the power on the one or more power supply line.
The calibrating installation includes:
For making current flow through the device of each individual pixel,
For the determining pressure drop across the pixel and for the pressure drop to be compared with the preset reference voltage of the pixel Device,
For the device from the relatively middle calibration value for determining the pixel, which will be connected to voltage source and ground connection The resistance of cable is taken into account, and
For calibration value to be applied to the digital data bit stream received to thus generate the dress of data driver voltage It sets, the data driver voltage expression to be applied that corrected image is used for data driver module.
The advantages of various embodiments of the present invention, is: can dynamically execute correction, correct in output due to transistor spy Difference caused by sex differernce, light-emitting component property difference, temperature change, time degrade, and by the power supply line of several rows and connect Voltage at ground wire is taken into account together.
In the various embodiments of the invention, drive system can further comprise connecting in each pixel with LED or OLED Variable impedance, such as example tunable resistor is adapted to provide when pixel activates and flows through each pixel Same current.
In the drive system of each embodiment according to the present invention, calibrating installation may include for storing identified calibration The memory of value.
In such as drive system of each embodiment according to the present invention, which may include reference current source, the reference Current source is connected to feedback control loop and is connected further at least one power supply line via " calibration mode " switching device.
The advantages of such embodiment of the invention, is: can make current source pin-point accuracy, and can be in integrated circuit Middle realization current source can readily disperse throughout on several data driver chips in active matrix panel.One additional Advantage is: the voltage that inside generates is used as referring to, so that impedance matching is independently of silicon chip.
In the drive system of each embodiment according to the present invention, which includes that interpolation unit and ground connection pressure drop multiply Method unit, both the interpolation unit and ground connection pressure drop multiplication unit are adapted to the number to active matrix panel via summation unit Voltage is provided according to Drive Module to adjust.Voltage adjust and compensation thus can be by being already present in Active Matrix Display Data driver provide, without additional current source, DAC etc., which save chip area and allow to obtain there is height The display of resolution ratio.One attendant advantages is: since impedance variation caused by being grounded can be included into consideration.
In the drive system of each embodiment according to the present invention, voltage source and calibrating installation are connectable at least one First side of power supply line.At least one power supply line can further comprise that can be connected to via second " drive mode " switching device Second side of voltage source.
In the drive system of each embodiment according to the present invention, voltage source may include DC/DC converter.By this method, Efficient voltage source can be obtained, without ADC or DAC and its additional pressure drop.
In second aspect, the present invention provides a kind of Active Matrix Displays, comprising: is logically organized into row and column Pixel array, each pixel include at least one light-emitting component；And any embodiment according to the first aspect of the invention Driving system circuit system.
In the Active Matrix Display of each embodiment according to the present invention, pixel may include 2T1C structure.Such realization With being simply laid out and being easy to control, there is a small amount of component, to reduce loss.
In the Active Matrix Display of each embodiment according to the present invention, which can be divided into two groups of pixels, Each group of pixel includes the driving system circuit system according to any embodiment of first aspect.Various embodiments of the present invention it is excellent Point is: by replicating reference current IrefOn the number in source, mode selection switch and comparator can concurrently be completed not go together Multiple pixels calibration.
In the third aspect, the present invention provides a kind of method for calibrating Active Matrix Display, the Active Matrix Displays Pixel array including being logically organized into row and column.This method comprises: making current flow through of a line of the pixel array Volumetric pixel determines the pressure drop across the pixel and is compared the pressure drop with the preset reference voltage of the pixel, from the ratio Determine that the calibration value of the pixel, the calibration value take into account the resistance for the cable for being connected to voltage source and being grounded in relatively, and Store the calibration value.
In fourth aspect, the present invention provides a kind of methods for driving Active Matrix Display.This method comprises: receiving table Previously determined calibration value is applied to connect by the digital data bit stream for showing the image to show on the Active Matrix Display For the data bit flow received to thus generate data driver voltage, the data driver voltage is to be applied to arrive the active square The data driver module of battle array display is used to decline at least for the power of power supply line the expression of corrected image.
In such method, driving transistor is used as variable impedance, more specifically, being used as can be changed (tunable) resistance Device.
In such method, calibration value can be determined according to the method for the third aspect.
Specific and preferred aspect of the invention illustrates in appended independence and dependent claims.From dependent claims Feature can be combined as suitable in the feature of the feature of independent claims and other dependent claims, rather than just As being expressly recited in the claims.
It will become obvious simultaneously from (multiple) embodiment described below in terms of these and other of the invention And it will be illustrated with reference to these embodiments.
The brief description of accompanying drawing
Fig. 1 instantiate for be respectively provided with single panel and be divided into two pixel subsets panel two kinds of AM (O) two exemplary embodiments of the power distribution of light-emitting diode display and calibration circuit.
Fig. 2 shows the falloff curves that three kinds of power supply line connections are realized: be connected to the two sides of panel, be connected to it is unilateral, And it is connected to the two sides for being divided into the panel of two pixel subsets.
Fig. 3 schematically shows the exemplary embodiment including variable voltage source and current sensor.
Fig. 4 shows the exemplary profile of the display of the digital drive of each embodiment according to the present invention.
Fig. 5 shows the exemplary configuration option of data driver wiring.
Fig. 6 shows two realizations of the pixel configuration for being suitable for the invention each embodiment.
Fig. 7 shows two resistance-type models of the display of each embodiment according to the present invention.
Fig. 8 shows the exemplary ginseng of the pressure drop that can be calculated and use during calibration of each embodiment according to the present invention Examine level.
Fig. 9 shows the calibration of power supply line pressure drop with the schematic block diagram for addressing data driver.
Figure 10 shows the calibration method for single pixel of each embodiment according to the present invention.
Figure 11 instantiates the practical embodiments of the OLED display of digital drive.
Figure 12 to Figure 15 instantiates analog result.
These attached drawings are only as illustrative and not restrictive.It in the accompanying drawings, for illustrative purpose, can be by one in element The size of a little elements is amplified and is not drawn to scale.
Any appended drawing reference in claim is not necessarily to be construed as limitation range.
In different drawings, identical appended drawing reference indicates the same or similar element.
Specific embodiment
The present invention will be described for specific embodiment and with reference to certain figures, but the invention is not restricted to this and only by weighing Sharp claim limits.Described attached drawing is illustrative and not restrictive.In the accompanying drawings, for illustrative purpose, Can the size of some elements in element be amplified and is not drawn to scale.Size and relative size do not correspond to practice of the present invention Practical reduction.
Term first, second in specification and claims etc. is used to distinguish between similar components, and not necessarily for Describe the time it is upper, spatially, in grade or other means on sequence.It should be appreciated that the term so used is in feelings appropriate Being the embodiment of the present invention interchangeable and described herein under condition compared with described herein or diagram can be with Other sequences operate.
In addition, at the top of term in description and claims, lower section and similar terms for descriptive purposes and Not necessarily for description relative position.It should be understood that these terms so used can be interchanged in appropriate situations, and this The embodiment of the present invention of text description can be operated with other orientations other than being described herein or explaining.
It should be noted that term " includes " used in claim should not be construed as being limited to means listed thereafter；It Other element or step is not precluded.Therefore, which should be interpreted specified stated feature, integer, step or component Presence, but be not excluded for the presence or addition of other one or more features, integer, step or component or its group.Therefore, A kind of range of statement " equipment including device A and B " should not be defined to the equipment being only made of component A and B.This meaning For the present invention, only associated component of the equipment is A and B.
The reference of " one embodiment " or " embodiment " is meant through this specification to combine the specific of embodiment description Feature, structure or characteristic is included at least one embodiment of the invention.Therefore, the phrase " in one embodiment " or " in embodiment " might not can refer to all referring to the same embodiment through appearance of this specification in each place The same embodiment.In addition, in one or more embodiments, such as from the disclosure to those of ordinary skill in the art will be it is aobvious and It is clear to, specific feature, structure or characteristic can be combined in any suitable manner.
Similarly, it will be appreciated that in the description of exemplary embodiment of the present invention, for simplify the disclosure and auxiliary pair The purpose of understanding one or more of in terms of each invention, each feature of the invention are grouped in individually together sometimes In embodiment, attached drawing or its description.However, this disclosed method, which is not necessarily to be construed as reflection the claimed invention, to be needed Intention than the more features being expressly recited in each claim.On the contrary, as appended claims reflect, it is each to invent Aspect may exist feature more less than whole features of single aforementioned disclosed embodiment.Therefore, after specific embodiment Thus the attached claims are clearly included in present embodiment, wherein each single item claim itself represents the present invention Separate embodiments.
In addition, although some of the embodiments described herein includes included some features but not wrapping in other embodiments Other features included in other embodiments are included, but the combination of the feature of different embodiments is intended to fall in the scope of the present invention It is interior, and being formed such as will be by different embodiment understood by one of ordinary skill in the art.For example, in the appended claims, Any embodiment in embodiment claimed can be come with any combination using.
In description provided herein, numerous details are elaborated.It should be understood, however, that in these no details In the case where the embodiment that also the present invention may be practiced.In other instances, well known methods, structures and technologies are not shown in detail In order to avoid obscuring understanding of the description.
OLED display be include light emitting diode array display, wherein transmitting electroluminescence layer be organic compound The film that object is constituted, emits light in response to electric current.Passive matrix (PMOLED) addressing scheme both can be used in OLED display, Active matrix (AMOLED) addressing scheme can be used.In the example of OLED display, the present invention relates to displayers.Phase The addressing scheme answered opens or closes each OLED pixel using thin film transistor backplane.Displayer allows to compare The higher resolution ratio of PMOLED display and bigger display sizes.
However, the present invention is not limited to displayer, but it is related to Active Matrix Display more upperly.Although examining Consider the current switching speed of their pixel element, displayer is particularly advantageous, but any kind of active Matrix display can use the concept of various embodiments of the present invention.If the pixel element of Active Matrix Display can be more If rapidly switching, this will be advantageous, because this allows to obtain higher frame rate, thus obtain the figure of less flashing Picture.
The Active Matrix Display (such as AMLED or displayer) of each embodiment according to the present invention includes multiple Pixel, each pixel include light-emitting component, such as light emitting diode (LED) or organic LED (OLED) element.Light-emitting component is by cloth It is set to array, and is logically organized into row and column.Through specification of the invention, term "horizontal" and " vertical " are (respectively It is related with term " row " and " column ") for providing a coordinate system, and only for the purposes of explanation.They do not need but can also be with Refer to an actual physical direction of equipment.In addition, term " column " and " row " are used to the array element that description is linked together Collection.The link can be the row and column form of cartesian array；However, the invention is not limited thereto.Such as those skilled in the art It will be understood that, it is interchangeable that columns and rows, which can be exchanged easily and also be intended to these terms in the disclosure,.In addition, can also structure It makes non-cartesian arrays and is included within the scope of the present invention.Correspondingly, term " row " and " column " should make extensive interpretation.In order to Convenient for this extensive interpretation, specification and claims, which should be mentioned that, is logically organized into row and column.By this means that picture Primitive element part collection is linked together with linear topological interleaved mode；However, physics or landform arrangement are not necessary.For example, row can be with Be it is round and arrange be these circles radius, thus round and radius is described as " being logically organized " row and column in the present invention.Together The specific name (for example, selection line and data line) of sample, each line is intended for the adopted name for promoting explanation and understanding, And refer to specific function.These are not intended in any way the specific choice of word to limit the present invention.
In the various embodiments of the invention, the present invention relates to one kind to be used for active matrix LED (AMLED) or OLED (AMOLED) driving circuit of display pannel, allow uniform pixel to power and thus reduce display degrade and it is non- Even property.The invention further relates to AMLED and displayer panel, the driving circuit system including each embodiment according to the present invention System.The invention further relates to a kind of methods for being used for digital drive AM (O) light-emitting diode display, including power supply line voltage-drop compensation.
In the various embodiments of the invention, voltage mode digital drive be used to drive display pannel.It provides and is based on The compensation scheme of the heterogeneity and degradation for significantly reducing or eliminating both foreboard and backboard of the impedance matching of block rank.
When using voltage mode digital drive, calibration pixel array can be carried out in various manners.Substantially, exist anti- Feedback, the feedback verify or plan to a certain extent the electric current flowed in each individual pixel.Present invention encompasses be all based on Several mechanism of this concept.As central principle, the electric current in pixel is determined by changing pixel impedance, such as equally in WO Described in 2014/080014, which is included in this specification by quoting.Technology described in this document also can be used In idea of the invention.Impedance matching is completed to eliminate the variation in TFT and OLED and compensate the pressure drop on each line.
In order to obtain calibration value, first scheme includes monitoring that single pixel disappears by current sensor during calibration cycle The electric current of consumption carrys out standby current.This will require each channel of each calibration cycle (row or column determines by the direction of power supply line, It defines pressure drop) one pixel of activation, and tune drive transistor, until pixel current arrives at predetermined reference value.This can lead Each current sensor during calibration cycle is caused to tune single pixel.This is not preferred embodiment, because many electricity can be obtained The measurement data of stream, and in digital driving method, it is thus only necessary to single current.
Second preferred scheme includes electric current being sent during calibration cycle, and be adapted to tunable resistor, Zhi Daoda The effective supply voltage VDD being designed to system, so that the number of pixels of every a line and its resistance-type model be taken into account.It should The advantages of embodiment, is: current source for example can be extremely accurate manufactured with silicon, and current source can readily disperse throughout On several chips.The voltage that inside generates is used as referring to, so that impedance matching is independently of (silicon) chip.
The two options have and will be connected to the unlimited of power source and be connected to the unlimited of the common ground connection of several rows Resistance is taken into account, to reduce the number of the calibration circuit in the number and (silicon) chip of semiconductor (such as silicone tip) Mesh.However, it reduce the renewal speed of calibration, because the hardware of calibration available to execute is less.Calibration refresh time depends on Time between the number of pixels and pixel alignment of each calibrated channel (that is, a line or multiple rows are together).Different pixels Time between calibration depends on calibration and only carries out or carry out on startup when showing operation.In the display of digital drive Operation when the situation calibrated in (and in situation of the power supply line perpendicular to data line), in digital drive scheme it is any not The time slot used can be used to calibrate.This, which is provided, has the advantages that perfect hiding calibration.For example, such as WO2014 The first time slot that the duty ratio that 068017 the 10th row of page 15 is recorded into the 15th row of page 16 shows the first subframe is 0, Remaining time slots will either be 1 (in the case where most significant bit is 1) or or be 0 (in the case where most significant bit is 0). Even for 8 digital bits, digital signal is 11111111, and in the duty ratio of this type, the first time slot will be 0, is such as existed Seen in the 23-28 row of page 16 of same document.Each embodiment according to the present invention, such not used time slot can be used for Calibration.
On the one hand, a kind of method for being used for digital drive and calibrating AM (O) light-emitting diode display is provided.Of the invention Each embodiment of method can be provided to (O) the LED characteristic degradation of time correlation (, due to degradation caused by using) and TFT The compensation of the offset of characteristic, such offset is in general most of leading by bias (voltage or illumination deviation), to obtain AM (O) the good picture quality that LED is shown.In general for (O) LED, the electric current in each pixel need with it is to be displayed The number of pixel matches.
Description in the method for the invention is used to accurately be arranged pixel current and compensates the pressure drop along power supply line Strategy.In some embodiments, the calibration value of each pixel is obtained, for example, by using reference current IrefAnd it measures and adjusts The pressure drop across the pixel is saved, or by directly being measured the electric current across the pixel by means of current sensor.Obtain calibration picture Each calibration value required by element is stored in calibration memory.When actually using AM (O) light-emitting diode display, indicated The data flow of image to be displayed, and data flow introducing data driver is driven into active square in a manner of band compensation Battle array.Then AM (O) LED is driven, the calibration value that previously each pixel determines is taken into account.Can by same hardware cell come It carries out obtaining calibration data and executes calibration and voltage correction.
Fig. 4 shows the exemplary system wheel of the Active Matrix Display of the digital drive of each embodiment according to the present invention It is wide.It includes image interface hardware 107, the first data driver hardware 401 and optional second data driver hardware 402 (for example, can completely or partially realize the data driver on chip), first group of dedicated line drive 403 and can The dedicated line drive 404 (for example, embedded line drive) of optional second group comprising for selecting the pixel in array First " the voltage's distribiuting and pressure drop calibration " block or " power point of " selection " line, each embodiment according to the second aspect of the invention Cloth " block 109 and optional second voltage distribution unit or block 108 and pixel backboard 405.Voltage's distribiuting unit (example Such as, including the voltage source 101 for power distribution and switch 103,104) individual unit 108 (Fig. 1) can be formed.Voltage's distribiuting list Member can also form compact unit 109, example with voltage compensation unit (for example, current source 106 and image interface hardware 108) together Such as integrated unit.In an alternative embodiment, there is only units 109.Not having illustration in Fig. 4 includes the picture of LED or OLED The practical foreboard of element.
During the normal use of Active Matrix Display, i.e., during image is shown, indicating image to be displayed Numerical data form under, image input by input 406 (such as cable or buses) arrive at image interface hardware 107.Control System and data-signal are sent to data driver hardware 401 and optional 402 from image interface hardware 107, and control Signal processed is sent to first and optional second group of dedicated line drive 403,404.Equally, signal can be calibrated from pressure drop Frame 109 is used as feedback towards image interface hardware 107 back.
Fig. 5 shows two unlimited possible embodiments of data driver.In the embodiment 500 of left-hand side, the first number The two sides of display are respectively present according to driver 401 and the second data driver 402, each one pixel subset of control. For example, each data driver can control set of data lines 501,502, set of data lines can run up to the middle part of display. In the embodiment 510 of right-hand side, only there are data drivers 401 on the side of display, and its corresponding data line 411 run up to the other side of display in whole display.In the two embodiments, if driver is sufficiently fast, also The multiplexing of data driver can be used.In this case, a part of can use of data driver block (for example, multiplexer) shows Show device backplane technology to realize.
The option similar to data cable (data line) can be presented in selective interconnection.They for example can be perpendicular to Fig. 5's Data cable runs (example is not intended to limit the present invention).For example, selection cable (selection line) can be from display two sides Dedicated line drive 403,404 runs up to the centre of display, or can transport from the line drive 403 on display side Row in this case, would only need to one group of dedicated line drive 403 until the other side of display.
Active Matrix Display further comprises drive circuit system, on the one hand which includes one group 102 Supply voltage line depends on design, they can be parallel to selection line, or with any in some embodiments of the invention Other suitable modes are realized, and on the other hand the drive circuit system includes voltage's distribiuting and pressure drop calibration unit 109 And optional second voltage distribution unit 108.In the various embodiments of the invention, power supply line includes for each of array The VDD of pixel is connected with GND.
Fig. 1 shows two examples of drive circuit system.The circuit 100 of the upper half, which presents, to be connected to for display The voltage source 101 of one group of 102 two sides of power supply line of the LED power supply of device.However, in some embodiments, power source is connected only to The side of panel.In any case, this connection can be provided by switch, for example, for selecting and (enabling or disabling) panel " drive mode " switch 103,104 of driving, such as transistor.Thus, display pannel can be driven with voltage source, and This to introduce DAC in each row to be unnecessary, thus reduce the amount of component and saved the space in display, To improve design scaling.In addition, display is not by DAC bit resolution, (it usually requires to be greater than the picture being just diverted Prime number mesh) limitation.Driver can be made very simple, to reduce cost.Using voltage source and avoid using DAC brings attendant advantages: reduce or eliminating the parasitic pressure drop from connection.When using DAC, it is desirable that the pressure of a certain amount Drop is so as to DAC operation, and this can loss power.On the other hand, voltage source 101 can extremely efficiently manufacture (for example, by DC/DC converter).Therefore, the driving circuit including voltage source advantageously saves energy.
During the drive mode of display, " drive mode " switch 103,104 is opened and power source VDD is connected To the two sides of power supply line 102, and " drive mode " switch 103,104 is turned off when inactive.During calibration, " driving Mode " is closed, and 105 activity of " calibration mode " switch, drives unitary current I by power supply line (such as current source 106)ref。
The lower half portion drawing 110 of Fig. 1 shows double drive circuit configuration, wherein there are two groups " drive mode " switches 103,113 and " calibration mode " switch 105,115 and two reference current sources 106,116.They can form the face of being connected to Two integrated units 109,119 of every side of plate.The configuration can divide each row, and each group can be with driving panel The a subset of pixel in 112, for example, the pixel of each group of driving half.In the configuration, calibration and power supply can be by simultaneously Rowization.
On the one hand, the present invention relates to a kind of driving circuit for Active Matrix Display, Active Matrix Display is all Such as AMLED or displayer panel.The driving circuit include for powering to pixel group one group of 102 power supply line (for example, Cable, bus or other electronics accesses), pixel group may be arranged in rows that, each pixel group is connected in 102 power supply line of group Independent power supply line.In certain embodiments of the invention, the institute in the case where each pixel is aligned to row and column, in a line There is pixel to be connected to same power supply line, the pixel without colleague is connected to different power supply lines.In the various embodiments of the invention, Such as illustrated in Figure 1, one group of 102 power supply line is provided, so that there are an electricity for every one-row pixels in array Source line.In the various embodiments of the invention, power supply line includes both the lines for being connected to the line of source VDD and being connected to ground connection GND. In the various embodiments of the invention, voltage source VDD be used to power to panel.Voltage source VDD can via switch 103,104, 113 are connected or disconnected from the two sides of 102 power supply line of group.
During " normal driving " mode of display, work labeled as the signal of " drive mode selection ", closing is opened 103,104 are closed, and power source VDD is connected to the two sides of 102 power supply line of group.When " drive mode selection " does not work, Power source VDD and the two sides of 102 power supply line of group disconnect.Due to display can with voltage source to power the fact, to the greatest extent Pipe needs current source, without including current-mode digital analog converter (DAC) for all rows.This also improves the contractings of design It puts, because the pixel needs of greater number are powered by these DAC, and the accuracy of DAC needs greatly for biggish display In the number of pixels being just diverted.In addition, being to eliminate the pressure drop in current DAC using another advantage of voltage source.Voltage Source can efficiently manufacture (for example, passing through DC-DC converter).In current DAC, will require the pressure drop of a certain predetermined amount so as to DAC operation, and this can loss power.Therefore, from power supply angle, each embodiment according to the present invention is more preferable using voltage source Solution.
When " calibration mode selection " works, another switch 105 is closed, and drives unitary current by power supply line Iref.So far, reference current source is provided in the side of 102 power supply line of group.This be used to calibrate, as follows to explain in more detail 's.In the case where Injection Current, the voltage of power supply line the same side is measured, and this measures voltage and is sent to comparator list Member will measure voltage and one group of reference voltage V hereref(i)It makes comparisons, wherein i is from 1 to p, and p is that be directed to calibration pre- The reference voltage number of definition.The comparison result is provided to the Digital Logic in image interface hardware 107.
Due to the degradation of the reduction of Active Matrix Display (for example, LED or oled panel of the invention) illumination, each pixel It may include relatively simple configuration, such as 2T1C (circuit of band 2 transistors and 1 capacitor), as shown in Figure 6.
However, the present invention is not limited to 2T1C configuration, and other configurations (for example, 4T2C, 5T2C, 6T2C) can also be applied So that TFT voltage thresholds offsets be kept as it is very low, to reduce the variation of pixel illumination.
The present invention can be applied to p-type and n-type transistor, and be applied to include any kind of backboard drive Dynamic circuit system, it may for example comprise for example amorphous silicon hydride (a-Si:H), polysilicon, organic semiconductor, (amorphous) indium gallium zinc Oxide (a-IGZO, IGZO) TFT or other.
Match on two bases that Fig. 6 shows the dot structure of AM (O) light-emitting diode display of each embodiment according to the present invention It sets.Illustrated by embodiment be 2T1C (2 transistors, 1 capacitor) configuration, but applicable can match using any other It sets.Dot structure include and driving the concatenated LED or OLED 601 of transistor M1.(O) LED 601 can be coupled in be coupled to and connect Between the ground line 603 and transistor M1 of ground GND, as shown in the lefthand portion of Fig. 6, or (O) LED 601 can be coupled in It is coupled to power supply VDDPower supply line 604 and transistor M1 between, as shown in the right hand part of Fig. 6.(O) LED and transistor M1 On the sum of voltage obtain the voltage in pixel.Transistor M1 is used as the switch powered from power supply line 604 to (O) LED 601.Choosing It selects transistor M2 and connect data line 606 with the grid of driving transistor M1.The grid of selection transistor M2 is connected to selection line 607, selection line 607 is illustrated as trend parallel with power supply line 604 and ground line 603.Selection line 607 is walked perpendicular to data line 606 To.Capacitor C1 is connected between the grid and source electrode of driving transistor M1.
In AM (O) light-emitting diode display, multiple such pixels as represented in figure 6 can be by logic arrangement at row and column. The pixel being arranged in same row may be connected to same data line 606, and arranging pixel in the same row can be by It is connected to same selection line 607.
Depending on each pixel be expert in position, for the voltage of calibration, electric current, impedance and related ginseng in each pixel Number is by with different values, because the resistance between power source and each pixel is due to the contact etc. between contact lead-wire, pixel Reason depend on the pixel be expert in position.
Various embodiments of the present invention provide every picture during the normal use of display (i.e. during image is shown) The impedance matching of element.So far, the picture is measured while reference current is introduced each pixel according to predetermined calibration scheme first Voltage on element, as set forth hereinbelow, control the electric current in each pixel via impedance matching then to eliminate active square Changing and compensating the pressure drop on each row in battle array and (O) LED.By tuning and the LED or OLED of pixel series connection Variable impedance realizes the impedance matching of each pixel.In the various embodiments of the invention, the driving transistor quilt of each pixel As variable resistance.Fig. 7 shows the experience pressure drop of each pixel in a line, which depends on the pixel in N number of pixel Position (n) in row because pixel between the connection to power source concatenated resistance with to increasing at a distance from power source and Increase.
Two possible configurations and each pixel of the pixel column of power supply line 604 are shown connected in Fig. 7 with resistance-type model Between resistance.The top half of Fig. 7 realizes the resistance-type mode of the one-row pixels driven from two sides that instantiates, and lower half portion It realizes and instantiates the resistance-type model of the one-row pixels from unilateral side driving.Between two adjacent pixels, each pixel includes (O) LED 601,611 (LED and driving transistor M1 that illustrate only each pixel), in a line with N number of pixel, exists (between adjacent pixel) power supply line resistance R1 and (between adjacent pixel) ground lead resistance R2.These resistance R1, R2 come from Metal line, and they can be known (for example, be modeled, be measured).They can be calculated according to layout.
The sum of resistance between two pixels in power supply line and ground line is reference resistance, R1+R2=Rref.In general, To there is resistance R bigger than cable resistance R1 and R2 between pixel respectively to external power source VDD and the wiring for being grounded GNDS1、 RS2.Ratio M is defined as relative to the resistance ratio of interior pixels resistance.RS1And RS2Generally defined as:
RS1+RS2=M Rref=M (R1+R2)
Top half in Fig. 7 realizes that 700 include the power supply line that two sides all contact, so that the pixel for the end being expert at connects It is connected to power source VDD.For the situation (in the power supply line power supply line that two ends are all contacted with power source VDD), resistance pressure Drop illustrates in fig. 8.Fig. 8 instantiates situation in 3: figure 201 --- there is no (O) LED unlatching, figure 202 --- along capable allusion quotation (O) LED of type distribution is opened and figure 203 --- it is opened along capable all (O) LED.It can see from these figures, Pressure drop on power supply line is with opening between the tie point and the pixel being located at the n of position that is considered of power supply line to power source The increase of number of pixels and increase.
For the situation from two side contacts power supply lines, resistance drop can be calculated as follows.
During calibration, current source, for example, the current source 106 of Fig. 1 is turned off the switch by turning on the switch 103,104 105, and block 109,108 is distributed by means of power to guide electric current to pass through power supply line to introduce electric current.Thus, in alignment epoch Between, only one primary pixel of each current source is turned on (pixel is just calibrated), and the rest of pixels in row is closed.If Using two or more reference current sources (106,116), then two or more pixels will likely be calibrated simultaneously.In N pixel Resistance drop (pixel number n is the number between the sum of all pixels N on 1 to the row) in pixel in row at the n of position is from injection Reference current IrefTo obtain.
The electric current flowed at the pixel in the n of position in the row is calculated first, because becoming the electric current I at contact0And It defines the pixel and when opens and (and therefore draw electric current Iref) binary code bi(the attached prefix that i is b).The algorithm is therefore Use the N-bit stream from image data lines.N-bit passage bN…bi+1bi…b1。
The resistance R of wiring between two pixelsrefDefine the pressure drop between two pixels
When summation until all these pressure drops of pixel n and increases with resistance Rs=Rs1+Rs2Contact lead-wire at When pressure drop, the equation until the pressure drop of pixel n is obtained:
In the expression formula, factor M is incorporated by RsAnd RrefThe ratio between: RS=M Rref.However, it is necessary to from rearmost position N The fact that the resistance drop that the voltage at place corresponds in another power wiring, determines I0:
ΔVN=-RSIN=-MRrefIN
This conversion are as follows:
With Δ VnReplace the I in equation0, it obtains:
R is thus used in pressure droprefIrefUnit is expressed.The unique constant needed in calculating is number M, as defined aboveNumber M depends on the geometry of the layout of outside display wiring.It is more than when existing in a line When 1000 pixels, the precision of pressure drop is calculated less than 1 millivolt.Due to such high-precision, some least significant bits are most terminating It may be ignored at fruit.
The calculating of pressure drop can for example be completed in two steps.In the first step, calculating number AN:
During operation, the number A of the previous row of practical driving is calculatedN.Therefore, be expert at x driving period calculate row x + 1 number AN.Pass through AN, the binary number B for indicating the pressure drop in power supply line at each pixel can be obtainedn.For row x+1 Each pixel, while by data recordation to first and/or the second data driver hardware 401,402, can pass through by The value A being previously calculatedNIt takes into account to calculate the number in real time.
The expression formula of pressure drop can be divided into two ANAnd Bn, each single item can be calculated iteratively.
ValueIt can be calculated in hardware block.The hardware block can reside in image interface In hardware 107.It may include a counter and two adders.The algorithm realized by this method can show as follows:
Iteration:
s0=0
p0=0
Loop(i,1,N)
si=si-1+bi
pi=pi-1+si
if(bi=1): pi=pi+M
End loop
AN=C*piWherein C=1/ (2M+N)
The result of iteration can be multiplied with constant C=1/ (2M+N) in the end, but constant C can be calculated in advance, this It can be realized compact multiplication.Generally speaking, this is a very compact hardware block.The result only provides at line endings.
Once acquisition value AN, then it represents that the item set of the power supply line pressure drop at each pixel in rowIt can also be in hardware block (it also be present in image interface hardware 107) in real time It calculates.It may include a counter and two adders and a multiplier.Generally speaking, this is one very compact Hardware block.The algorithm realized by this method can show as follows:
Iteration:
s0=0
p0=M*AN
Loop(i,1,N)
si=si-1+bi
pi=pi-1-si
pi=pi+AN
Bi=pi
End loop
The different B of the circular in definitionnValue.
How what Fig. 8 instantiated each embodiment according to the present invention defines power supply line pressure drop reference level Vref(1..N).Know (they are the reference current I from resistance value and application for maximum (figure 203) and the pressure drop of minimum (figure 201) power supply linerefIt is quasi- Really calculate gained), and define the pressure drop reference level 801 for one group of equal intervals being possibly present therein during operation (number of level accuracy required by system or maximum at limit originally).For convenience, it defines corresponding to institute The B of calculatingnThe level of several most significant bits (MSB).For each level of voltage drop defined in 801 and for each pixel, Calibration will be completed during the calibration phase of display.During calibration, obtains binary value and (driven being supplied to data In the case where dynamic device), which generates the voltage on the grid of driving transistor, so that obtaining previous true in pixel Fixed reference voltage.For BnEvery MSB, reference voltage is provided.LSB is obtained by interpolation.
As a specific example, consider that Bn is the binary number for indicating the pressure drop of the Bit String in pixel n, and for example select Three MSB.The selection has determined the number of pressure drop reference level, for three MSB, corresponds to 8 pressure drops with reference to electricity Flat 801.During calibration, only one pixel (each current source 106,116) is opened in a line, and only measurement 8 is possible Pressure drop.It is worth " 000 " and corresponds to without hindrance drop (situation 201 of minimum pressure drop), and be worth " 111 " and correspond to maximum resistance drop, only in maximum The intermediate of pressure drop Figure 20 3 obtains.In the memory of interface hardware 107, the calibration voltage value and respective 8 of each pixel is stored A level.Practical Bn number includes the string of three MSB long than them.Thus, related pixel n is under when actual value for calibration One phase is permitted the linear interpolation between n+1.The rest part (least significant bit) of the string can be used to improve interpolation.
It is worth noting that, obtaining all calibration levels so as not to influence hardware speed, even if resonable for each pixel It will not arrive at possible reference level close to the pixel of power source (for example, the side edge of display in fig. 8) on.
Figure 10 shows the calibration method for a pixel, arrives similar to the 23rd row of page 13 of WO2014/080014 Method disclosed in the 10th row of page 14.During calibration, display is thus driven line by line (to be swashed by line drive 403,402 Selection transistor M2 living, and make reference current IrefFlow through power supply line).By individually enlivening pixel only for reference current Iref Applied to a pixel column, so that the rest of pixels of the row be made to keep inactive.Because of IrefPass through (O) LED and transistor M1 two Person is injected, so total voltage is the sum of the voltage on voltage V* and transistor on (O) LED, V* be in the IrefPicture Voltage V on elementLBetween.The voltage at the grid of the driving transistor M1 of pixel is enlivened to be arranged to by driving transistor M1 shape At the minimum correlation to be opened, and the therefore voltage V in pixelLHigher than supply voltage VDD.Increase transistor gate Voltage at pole obtains lower VL.Grid voltage is increased, until the voltage in pixel is identical as supply voltage.Therefore, it drives Voltage at the grid of dynamic transistor M1 is incrementally increased, until obtaining supply voltage VL* (=supply voltage VDD) it is used as pixel On voltage.The value corresponds to the minimum pressure drop such as V in power supply lineDD, usually (power is directly connected in power supply line beginning Source) at pixel in occur.The value is stored in the calibration memory of pixel as the pressure drop of minimal power line.The process can be with It is described as the grid voltage sweeping during calibration, as shown in the arrow 1001 in Figure 10.The mistake is carried out for each pixel Journey, until all power supply line pressure drop reference levels are obtained and are stored in calibration memory.Therefore, for each picture Element, the difference of n pressure drop calibration level are stored in the calibration memory of pixel.With the area of the method for WO2014/080014 One of to be pixel now be not to be driven by voltage source, and calibration value can be used for the direct voltage tune on data line Section.
It can be by replicating the reference current I illustrated as shown in figure 1refThe number in source, mode selection switch and comparator is come It concurrently completes not go together the calibrations of upper multiple pixels.
Fig. 9 shows how addressing real data driver.The hardware block can reside in image interface hardware 107 It is internal.There are two input traffics for its tool: 901 (B of power supply line pressure dropN....Bi+1Bi....B1) and expression image to be displayed 902 (b of digital data bit streamN....bi+1bi....b1).As output, data driver voltage value stream is obtained 903DN....Di+1Di....D1And it is introduced into the data driver module 904 of active matrix panel display.For every One pixel, the most significant bit (MSB) of power supply line voltage drop value are sent to calibration memory 905.The calibration value of the pressure drop of pixel n And the calibration value of the pressure drop of next pixel n+1 is provided to interpolation unit 906.The least significant bit of the same pressure drop of pixel n (LSB) it is also supplied to interpolation unit 906, and can be realized and carry out accurate interpolation between calibration twice.
In both cases, it can advantageously consider the influence for being grounded pressure drop with such as drive control LED in pressure drop calculating Power supply transistor M1 grid (referring to Fig. 6).Typically, ground line the ratio between pressure drop and general supply line pressure drop is known (usually half), therefore by obtaining ground line pressure drop multiplied by the known ratio in multiplication unit 907.The voltage needs It is added in summation unit 908 with the voltage of driving M1 grid.Finally, being based on digital data bit stream (bN....bi+ 1bi....b1), the selection output of output multiplexer 909, when bit be ' 1 ', the output is the resulting grid voltage of calculating, when than It is 0 specially for output when ' 0 '.
Same module can be used during calibrating regulation.May include counter 910 with for adjust calibration process and/ Or it stores the value in calibration memory.Counter 910 is arranged to correspond to minimum possible grid at calibration regulation beginning The value of voltage, and when pixel voltage obtained is higher than the first reference voltage, corresponding Counter Value is stored in first In calibration value address.When calibration value is similarly applied to the MSB input of calibration look-up table 905, it equally is obtained at output Value.During calibration, LSB bit is arranged to 0 (thus disabling interpolation), and digit data stream 902 is arranged to ' 1 ', from And each pixel is opened, requested data driver voltage is provided at output.The voltage increases requested until obtaining Reference voltage.Then the process is carried out for all reference voltages.
Every pixel alignment shown in Figure 10 can be completed for each pixel in a recursive manner, including will be worth storage In the memory 905 (for example, look-up table) of the computing unit of Fig. 9.
Power supply line pressure drop and required grid voltage (passing through the voltage that the data line for controlling M1 grid introduces) it Between relationship have 1/ (a-x) behavior, wherein " a " be greater than Fig. 8 in illustrate maximum power supply line resistance drop.This may require that multiple schools Quasi- reference level accurately executes calibration.However, data driver can be realized advantageously with 1/ (a-x) behavior, thus It reduces required calibration level number and increases accuracy.It can be by adjusting in some existing display data drivers Gamma (Gamma) response curve of middle realization realizes the correction every now and then (for example, periodically).The adjusting of gamma curve exists It is known in this field, for example, it is implemented as the interpolation of the value loaded by software, and it can be easy Ground is integrated in various embodiments of the present invention.
Exemplary sequence for the pixel opened and closed by driving, along N pixel column power supply line pressure drop in fig. 8 It is shown in figure 202, and the pixel column for being driven from two sides, the power supply line pressure drop along N pixel column is drawn in the upper left corner of Fig. 2 It is shown in Figure 200.Pixel number n is the number between the sum of all pixels N on 1 and the row.The algorithm can be used from picture number It is such as defined in the prior art according to capable N-bit stream, such as in document WO2014068017A1.The N-bit stream is bN… bi+1bi…b1.These bits can indicate the pixel intensity data of representative image.
Connection between each pixel, between pixel and power source and between pixel and ground connection GND is to be conductively connected, and is led to It is often metal connection and lead, they show resistive and generate along capable pressure drop, which depends on the position of pixel. Pixel close to display center (for example, separate connect with power source) would indicate that the picture being higher than close to source for averagely going up The pressure drop of element.Fig. 2 shows the minimum pressure drops 201 (all (O) LED are closed) for three kinds of situations, Typical pressure drops 202 (several (O) LED is opened, other closings) and maximum pressure drop 203 (all (O) LED open) falloff curve:
In the drawing 200 in the upper left corner, the embodiment (example of voltage source 101 is connected to from two sides for wherein power supply line Such as, for having the embodiment 100 in Fig. 1 of the connection of two sides to power source), the two sides of curve terminate at voltage level VDD.
In the drawing 210 in the upper right corner, power supply line is not from two sides but is only attached from side.When power can not When the two sides of display are all connected, unilateral alternative is advantageous in practical implementations.However, pressure drop is usually very It is high.
In the drawing 220 of lower half, double drive circuit is used.In the alternative, POWER VD D and ground connection GND line It is not to be attached in the two sides of panel, opposite panel is divided, and each subregion only includes a company to voltage source and GND It connects.Power supply line is divided into two parts by the embodiment.Lower half portion drawing 110 of the falloff curve corresponding to Fig. 1.It needs two The calibration unit of amount again, and high pressure drop is presented, but it requires less calculating.In some cases, power voltage and ground connection Voltage may it is unequal in the centre of power supply line (or even be not maximum pressure drop；It does not include especially same number in each subset Pixel and thus in the case where not including same number resistor, maximum pressure drop may be very different, such as refers to Fig. 7 and explains ).The embodiment has the advantage that it requires the calculating of slightly lower amount, but (in some cases) can be with higher Pressure drop.It also makes the amount of calibration unit double.
In the situation (figure in upper right corner drawing 210 corresponding to Fig. 2) that power supply line is only connected from side, in Fig. 7 Bottom at lower half realize 710 in illustrate corresponding Resistance model for prediction.Resistance drop can be counted with such as preceding similar process It calculates.The electric current flowed at the position of pixel n in the row is calculated as before first, because becoming the electric current I at contact0With And define when the pixel opens and therefore draw electric current IrefBinary code bi。
Pressure drop between two pixelsPass through the resistance R of the wiring between two pixelsrefTo define.
When summing to all these pressure drops until pixel n and when being added with the pressure drop at contact lead-wire, acquisition until The equation of the pressure drop of pixel n:
In the equation, the factor M obtained as previously described is as RSWith RrefBetween ratio be introduced into (RS=M Rref).Still So it needs to be determined that electric current I0, but the electric current that power supply line end goes out is taken into account: IN=0 this be converted to
And thus
As described above, two units can be used for the A of each pixel on the row to displayNAnd BiSequence meter It calculates.A is calculated for such embodimentNUnit can only include counter (or two counters for parallel computation, if face Plate is by two voltage sources and two calibration unit drivings, the lower half portion of Fig. 1 is drawn as illustrated in 110).
Iteration:
s0=0
Loop(i,1,N)
si=si-1+bi
End loop
AN=si
B is calculated for such embodimentnUnit only include counter and two adders (in double configurations for parallelization Middle counter and adder can be replicated, as Fig. 1 lower half portion draw 110 in illustrated by).These are very as a result, Compact hardware realization.
The iteration is equivalent to BnIteration exemplified earlier.
Thus generally speaking, the data bit flow including every pixel bit b in N pixel column is used for calculating parameter AN。 Then, bit stream and parameter ANThe two be used to calculate the pressure drop (thus, N number of pressure drop) of every pixel of the bit of data.
In an alternate embodiment of the invention, during calibration, using the configuration (as shown in Figure 3) of current source and ADC, Voltage can be by sweeping, and electric current can directly be measured by means of current sensor.Current sensor is calibrating monitoring By the electric current of single pixel during period, and the driving transistor for being used as tunable resistor can be used to tune electricity Stream, until pixel current is identical as reference pixel electric current.Fig. 3 is shown including variable voltage source 301 (thus can during calibration With sweeping voltage) and the current sensor 302,303 for measuring electric current an embodiment.The realization with have arrive voltage source The driving circuit or double drive circuit (the lower half drawing 110 of Fig. 1) of dual link (upper half drawing 100 of Fig. 1) are mutually compatible with.Figure Double sweepings during 3 realization requirement complexity and accurately analog-digital converter (ADC) 304,305 and calibration, because of the grid of M1 Both pole tension and VDD require to change to obtain the accurate current by pixel.In another alternative embodiment, power only connects It is connected to display side, and driving circuit includes single current sensor 302 and single ADC 304.
Simulation result
In order to assess various embodiments of the present invention the display for digital drive calibration method operation and timing And validity, it is advanced using Analogical Electronics emulator program SPICE (" simulation program for emphasizing integrated circuit ") to one Row analog calibration.Figure 11 shows the practical embodiments of the OLED display of digital drive.Power is connected with ground connection from side, this is right In the scene that calibration method is worst situation.When power is connected with ground connection from two sides, it is contemplated that calibration will be much better.In addition, making Emulation is executed with blue OLED to have the worst situation for emulation.For require reduced-current other OLED (it is red, It is green), it is contemplated that calibration is far better.
The resistivity of power supply line is an important factor in calibrating quality.Power supply line is with 4 Ω/pixel (4 ohm/pixel) It is emulated (for the power supply line position 15.4k Ω of complete 3840 pixels).In the case where lower power supply linear resistivity, in advance Phase preferably calibrates.For VTAnd VOLEDSelected value is by wide spread.Thus, for VTFor+0.4 transistor and Equally there is VTTransistor for -0.4V will be effective.OLED is extended equally applicable.If these extensions are lower, Variation will also decrease, so that expected calibration will be preferable in practical applications again.
The display of Figure 11 and the pixel of Fig. 6 have been used for emulating.The calibration of the display line 1101 of label is simulated, Because it, which is represented, has the institute of following characteristic wired in the case where display all light:
Display 4K resolution ratio: 3840x2160；Pixel size: three kinds of colors, 60 μm=423ppi；Pixel: there is common cathode The standard IGZO (N-shaped) of pole OLED.
Export brightness: 500nit
Electric current for blue OLED subpixel: 0.15 μ A (being dominance for calculating)
The resistivity of every pixel on power supply line: 4 Ω/pixel
The mobility of TFT:IGZO is considered not suffering from the variation in current simulations.Only VTIt changes: average VT=1V,
OLED:IOLED=0.15 μ A (microampere), average VOLED=3.5V,
To the result of location of pixels, in not calibrated display (Figure 12) is compared pixel current, in calibration method Do not have complete including power supply line resistivity correction in the calibration (level 1) (Figure 13) of power supply line resistivity correction and calibration method Whole school positive (level 2) (Figure 14).Each figure is shown because becoming the pixel in edge according to the location of pixels of the row of the display of Figure 11 Electric current, first pixel 1102 (closest to power connector) and row of the row 1101 at position 0 (connect in position 1920 from power Connect device maximum distance) at the last one pixel 1103 (in the centre of display).In Figure 12 to Figure 14, shown with full solid line Absolute pixel electric current, and it is shown in broken lines the relative error relative to reference current (being predefined as 0.15 μ A).
Figure 12 is shown for not calibrated situation, Relative Difference in the standard overall situation deviation and adjacent pixel in a line Not are as follows:
It is global:Adjacent pixel:
Thus, in the case where no calibration, the maximum difference between the light output of two adjacent pixels can have 50% that It is big.The difference is too high, so that instruction is highly desirable to calibration.It is further noted that the effect along the pressure drop of power supply line is visible, But electric current is dominated by local diffusion.
Figure 13 is shown for calibrated situation (level 1), relative mistake difference in standard overall situation deviation and adjacent pixel Are as follows:
It is global:Adjacent pixel:
These results do not include the steps that the drop of the resistance to power supply line compensates.As a result, it can be observed that following characteristics:
A) since resistance is dropped, when all pixels in row open (highest display output situation, 500nits), in display Between electric current be lower than edge electric current.
B) in addition, calibration also becomes worse: pixel tool when compared with the pixel of display edge, among display There is worse calibration.
In the case where the high resistivity of High Light Output and/or power supply line, calibrating the effect for hindering drop in regulation can be had It introduces sharply.
Figure 14 is shown for calibrated situation (level 2), relative mistake difference in standard overall situation deviation and adjacent pixel Are as follows:
It is global:Adjacent pixel:
SPICE emulation shows the high uniformity of the display after taking into account the resistance drop of power supply line.Transistor and Diffusion on OLED is equivalent to the diffusion in previous emulation.Pixel output obtained is very uniform, and is not dependent on Position in the display.The intensity of the pixel (being closely located to 1920) of display center is no better than the picture of display edge The intensity of element.Equally, when encoding 8 bit using every color, the global diffusion of pixel current is less than least significant bit (LSB). Maximum difference between two pixels corresponds to 1.5 times of LSB.
The calibration is completed in the scene of worst situation, therefore in other situations, calibration will it is more preferable (for example, compared with Low power supply linear resistivity further reduced the diffusion finally obtained after calibration).
Figure 15 shows the comparison (filament for not calibrated result of three kinds of methods of same a line for display 1501, for the thick line 1502 of the calibration of level 1, the dotted line 1503 calibrated for level 2).Draw above shape shows absolute pixel Electric current, and be the relative error relative to reference current (0.15 μ A) in following figure.It is irised out closest to what power connected Region 1510 initial shifts are shown.Will not hinder drop take into account (calibration of level 1) when, be present in not calibrated electric current In initial shifts largely disappear, and obtain uniform electric current.However, electric current is towards (the knot of the row at display center At tail) linear decline.However, variation disappears from emulation, and electric current is being shown when that will hinder drop and take into account (level 2) Keep equal between the margin and center of device.The region 1511 irised out shows the variation at the line endings.It is examined will not hinder drop Including worry when (calibration of level 1), the initial shifts of not calibrated electric current are still all present in electric current after the calibration.It Be only to become smaller.In addition, average current low with the electric current at display center (at the ending of the row) about 20%.It will hinder When drop takes into account (level 2), variation disappears from emulation, and electric current is kept substantially between the margin and center of display It is equal.
Generally speaking, each embodiment of method of the invention is for reducing from display edge to row end or display side Edge is changed to intermediate pixel and intensity gradient.For example, existing on there are 4 Ω of display/pixel power line more than 640 In the situation of pixel, this is favourable, because this method can take into account resistance drop.
In the case where increasing the compensation to resistance drop, may be surpassed on 3840x2160 (ultra high density) display Cross the uniformity of 1LSB (8 bit).

Claims (12)

1. a kind of driving system circuit system for Active Matrix Display, the driving system circuit system include:
Data driver module, for receiving the number for indicating the image to be shown by each pixel of the Active Matrix Display Digital data bit stream,
One or more power supply lines, for powering to multiple pixels, each pixel includes at least one light-emitting component,
Voltage source is connected to one or more of power supply lines,
Calibrating installation, for compensating the reduction of the power on one or more of power supply lines, the calibrating installation includes:
For making current flow through the device of each individual pixel,
For the determining pressure drop across the pixel and for the pressure drop to be compared with the preset reference voltage of the pixel Device,
For determining that the device of the calibration value of the pixel, the calibration value will be connected to the voltage source and connect from the comparison The resistance of the cable on ground is taken into account, and
For the calibration value to be applied to the digital data bit stream received to thus generate the dress of data driver voltage It sets, the data driver voltage expression to be applied that corrected image is used for the data driver module,
It is characterized in that, at least described calibrating installation is included in integrated unit.
2. drive system as described in claim 1, which is characterized in that further comprise and the LED or OLED in each pixel The variable impedance of series connection, the variable impedance, which is adapted to provide when each pixel activates, flows through the identical of the pixel Electric current.
3. drive system as described in any one of the preceding claims, which is characterized in that the calibrating installation includes for depositing The memory of calibration value determined by storing up.
4. drive system as described in any one of the preceding claims, which is characterized in that the calibrating installation includes with reference to electricity Stream source, the reference current source are connected to feedback control loop and are connected further at least one via " calibration mode " switching device Power supply line.
5. drive system as described in any one of the preceding claims, which is characterized in that the calibrating installation includes interpolation list Member and ground connection pressure drop multiplication unit, the interpolation unit and ground connection both pressure drop multiplication unit via summation unit be adapted to The data driver module of the active matrix panel provides voltage and adjusts.
6. drive system as described in any one of the preceding claims, which is characterized in that the voltage source and the calibration cartridge Set the first side for being connectable at least one power supply line, at least one described power supply line further comprises can be via the Two " drive mode " switching devices are connected to second side of voltage source.
7. a kind of Active Matrix Display, the pixel array including being logically organized into row and column, each pixel include at least One light-emitting component,
The Active Matrix Display further comprises driving system circuit system according to any one of the preceding claims.
8. Active Matrix Display as claimed in claim 7, which is characterized in that the pixel includes 2T1C structure.
9. the Active Matrix Display as described in any one of claim 7 or 8, which is characterized in that the array is divided into two Group pixel, each group of pixel includes driving system circuit system according to claim 1 to 6.
10. it is a kind of calibrate Active Matrix Display method, the Active Matrix Display include be logically organized into row and The pixel array of column, which comprises
So that electric current is flowed through the individual pixel of a line of the pixel array from integrated unit, by identical integrated unit determine across The pressure drop of the pixel and the pressure drop is compared with the preset reference voltage of the pixel,
Determine that the calibration value of the pixel, the calibration value examine the resistance for the cable for being connected to voltage source and being grounded from the comparison Including worry, and
Store the calibration value.
11. a kind of method for driving Active Matrix Display, which comprises
The digital data bit stream for indicating the image to be displayed on the Active Matrix Display is received,
The data bit flow that previously determined calibration value is applied to receive is to thus generate data driver voltage, the number It is used for according to the actuator voltage data driver module to be applied to the Active Matrix Display at least for power supply line Power declines the expression of corrected image.
12. method as claimed in claim 11, which is characterized in that the calibration value method according to claim 10 is come true It is fixed.
CN201780067935.3A 2016-11-03 2017-11-01 Power line drop compensation for active matrix displays Active CN109906477B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP16197152.8A EP3319075B1 (en) 2016-11-03 2016-11-03 Power supply line voltage drop compensation for active matrix displays
EP16197152.8 2016-11-03
PCT/EP2017/077988 WO2018083135A1 (en) 2016-11-03 2017-11-01 Power supply line voltage drop compensation for active matrix displays

Publications (2)

Publication Number Publication Date
CN109906477A true CN109906477A (en) 2019-06-18
CN109906477B CN109906477B (en) 2022-06-14

Family

ID=57226859

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201780067935.3A Active CN109906477B (en) 2016-11-03 2017-11-01 Power line drop compensation for active matrix displays

Country Status (5)

Country Link
EP (1) EP3319075B1 (en)
KR (1) KR102521163B1 (en)
CN (1) CN109906477B (en)
TW (1) TWI734842B (en)
WO (1) WO2018083135A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110796993A (en) * 2019-11-15 2020-02-14 福州京东方光电科技有限公司 Voltage compensation circuit and display device
WO2022126737A1 (en) * 2020-12-16 2022-06-23 Tcl华星光电技术有限公司 Backlight module and display apparatus

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3588479B1 (en) * 2018-06-27 2021-08-04 IMEC vzw Digital driving implementation at multiple reference light intensities
KR102648992B1 (en) * 2019-12-10 2024-03-19 엘지디스플레이 주식회사 Display apparatus
KR102379027B1 (en) * 2019-12-26 2022-03-25 아주대학교산학협력단 Electronic device and method for analyzing power consumption of display panel thereof
KR20210086441A (en) * 2019-12-30 2021-07-08 엘지디스플레이 주식회사 Display panel and repair method thereof
WO2021137663A1 (en) 2020-01-03 2021-07-08 Samsung Electronics Co., Ltd. Display module
CN113223444B (en) * 2020-01-17 2022-03-11 厦门凌阳华芯科技有限公司 Single-pixel LED driving chip and LED display screen
US11199866B2 (en) * 2020-01-29 2021-12-14 Taiwan Semiconductor Manufacturing Company Limited Voltage regulator with power rail tracking

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020167471A1 (en) * 2001-05-09 2002-11-14 Everitt James W. System for providing pulse amplitude modulation for oled display drivers
CN1452151A (en) * 2002-04-12 2003-10-29 三星Sdi株式会社 Organic electroluminescent display device and driving method thereof
US20070164937A1 (en) * 2005-07-08 2007-07-19 Jung Kwang-Chui Display device and control method thereof
CN101976546A (en) * 2010-10-19 2011-02-16 友达光电股份有限公司 Pixel circuits with power voltage drop compensation functions and luminous panel
TW201216246A (en) * 2008-11-17 2012-04-16 Global Oled Technology Llc Compensated drive signal for electroluminescent display
CN102725786A (en) * 2009-11-30 2012-10-10 伊格尼斯创新公司 System and methods for aging compensation in AMOLED displays
CN104183212A (en) * 2013-05-24 2014-12-03 三星显示有限公司 Compensation unit and organic light emitting display including the same
CN104335270A (en) * 2012-05-23 2015-02-04 伊格尼斯创新公司 Display systems with compensation for line propagation delay
CN105637575A (en) * 2013-10-21 2016-06-01 伊格尼斯创新公司 System and methods for power conservation for AMOLED pixel drivers
US20160180755A1 (en) * 2009-11-30 2016-06-23 Ignis Innovation Inc. Resetting cycle for aging compensation in amoled displays

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0315929D0 (en) * 2003-07-08 2003-08-13 Koninkl Philips Electronics Nv Display device
EP2383720B1 (en) * 2004-12-15 2018-02-14 Ignis Innovation Inc. Method and system for programming, calibrating and driving a light emitting device display
JP5443188B2 (en) * 2010-02-04 2014-03-19 グローバル・オーエルイーディー・テクノロジー・リミテッド・ライアビリティ・カンパニー Display device
KR102034336B1 (en) 2012-11-01 2019-10-18 아이엠이씨 브이제트더블유 Digital driving of active matrix displays
WO2014080014A1 (en) 2012-11-26 2014-05-30 Imec Low power digital driving of active matrix displays
US9786223B2 (en) * 2012-12-11 2017-10-10 Ignis Innovation Inc. Pixel circuits for AMOLED displays

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020167471A1 (en) * 2001-05-09 2002-11-14 Everitt James W. System for providing pulse amplitude modulation for oled display drivers
US20020167474A1 (en) * 2001-05-09 2002-11-14 Everitt James W. Method of providing pulse amplitude modulation for OLED display drivers
CN1452151A (en) * 2002-04-12 2003-10-29 三星Sdi株式会社 Organic electroluminescent display device and driving method thereof
US20070164937A1 (en) * 2005-07-08 2007-07-19 Jung Kwang-Chui Display device and control method thereof
TW201216246A (en) * 2008-11-17 2012-04-16 Global Oled Technology Llc Compensated drive signal for electroluminescent display
CN102725786A (en) * 2009-11-30 2012-10-10 伊格尼斯创新公司 System and methods for aging compensation in AMOLED displays
US20160180755A1 (en) * 2009-11-30 2016-06-23 Ignis Innovation Inc. Resetting cycle for aging compensation in amoled displays
CN101976546A (en) * 2010-10-19 2011-02-16 友达光电股份有限公司 Pixel circuits with power voltage drop compensation functions and luminous panel
CN104335270A (en) * 2012-05-23 2015-02-04 伊格尼斯创新公司 Display systems with compensation for line propagation delay
CN104183212A (en) * 2013-05-24 2014-12-03 三星显示有限公司 Compensation unit and organic light emitting display including the same
CN105637575A (en) * 2013-10-21 2016-06-01 伊格尼斯创新公司 System and methods for power conservation for AMOLED pixel drivers

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110796993A (en) * 2019-11-15 2020-02-14 福州京东方光电科技有限公司 Voltage compensation circuit and display device
CN110796993B (en) * 2019-11-15 2022-03-08 福州京东方光电科技有限公司 Voltage compensation circuit and display device
WO2022126737A1 (en) * 2020-12-16 2022-06-23 Tcl华星光电技术有限公司 Backlight module and display apparatus

Also Published As

Publication number Publication date
WO2018083135A1 (en) 2018-05-11
EP3319075B1 (en) 2023-03-22
EP3319075A1 (en) 2018-05-09
TWI734842B (en) 2021-08-01
CN109906477B (en) 2022-06-14
TW201818392A (en) 2018-05-16
KR102521163B1 (en) 2023-04-13
KR20190076984A (en) 2019-07-02

Similar Documents

Publication Publication Date Title
CN109906477A (en) Power supply line voltage-drop compensation for Active Matrix Display
CN107924660B (en) The system and method for carrying out pixel alignment based on improved reference value
CN102741910B (en) For extracting the system and method for the correlation curve of organic luminescent device
US8130182B2 (en) Digital-drive electroluminescent display with aging compensation
US11244612B2 (en) Display driving circuit and a display device including the same
TWI380265B (en) Electroluminescent display with efficiency compensation
US9786223B2 (en) Pixel circuits for AMOLED displays
CN104299566B (en) System and driving method for light emitting device display
CN104813391B (en) The low power number word drive of Active Matrix Display
US20070290958A1 (en) Method and apparatus for averaged luminance and uniformity correction in an amoled display
EP2351012A1 (en) Compensated drive signal for electroluminescent display
US20080042943A1 (en) Method and apparatus for averaged luminance and uniformity correction in an am-el display
US20170018224A1 (en) Apparatus and method for compensating for luminance difference of organic light-emitting display device
US11264445B2 (en) Method of compensating for degradation of display device
US20070290947A1 (en) Method and apparatus for compensating aging of an electroluminescent display
JP5139613B2 (en) Active matrix electroluminescence display device
WO2020065947A1 (en) Display device and driving method therefor
WO2020253376A1 (en) Display panel, signal reading method therefor and display apparatus
US7884781B2 (en) Video data signal correction
KR20060136381A (en) Video data signal correction
KR20200001487A (en) Digital driving implementation at multiple reference light intensities
TWI233314B (en) Pixel device of the electroluminescence device, electroluminescence device and operating method thereof
KR20200078833A (en) Light emitting display apparatus

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant