CN109891400A - Method, apparatus and storage medium based on SPI asynchronous process event - Google Patents
Method, apparatus and storage medium based on SPI asynchronous process event Download PDFInfo
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- CN109891400A CN109891400A CN201980000133.XA CN201980000133A CN109891400A CN 109891400 A CN109891400 A CN 109891400A CN 201980000133 A CN201980000133 A CN 201980000133A CN 109891400 A CN109891400 A CN 109891400A
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Abstract
The present invention provides a kind of method, apparatus and storage medium based on SPI asynchronous process event, this method comprises: obtaining the level jump state of chip selection signal from main equipment by serial peripheral equipment interface SPI；According to the level jump state of chip selection signal, judge whether there is SPI data transmission event, the SPI data transmission event if it exists, and determine that the SPI data are transmitted, initiate hardware interrupts then to notify processor from the device to handle the SPI data transmission event, the monitoring to SPI data transmission event is not only realized, but also has saved the operation resource of processor.
Description
Technical field
The present invention relates to field of communication technology more particularly to a kind of method, apparatus based on SPI asynchronous process event and deposit
Storage media.
Background technique
Serial Peripheral Interface (SPI) (Serial Peripheral Interface, SPI) agreement be a kind of high speed, full duplex,
Synchronous communication bus protocol.Since SPI protocol is for full duplex and without defining rate limitation, transmission speed usually can reach
To even more than 10 megabits per second (Million bits per second, Mbps), it is highly suitable for high speed data transfer.
Main equipment (master) sends SPI data transmission event extremely from equipment (slave), to realize to the control from equipment.Main equipment
It is exported by main equipment output from equipment input data line (master input slave output, MISO) and from equipment
Main equipment input data line (master output slave input, MOSI) is connected with from equipment (slave), and passes through
MISO and MOSI carries out the transmitting of SPI data.After the SPI data transmission event that equipment receives that main equipment is sent, need
The processor that connect with from equipment or processor from the device handle the SPI data transmission event that main equipment is sent.
In the prior art, aiming at the problem that how to judge whether main equipment sends SPI data transmission event to from equipment, lead to
It is often using processor, such as central processing unit (Central Processing Unit, CPU), micro-control unit
(Microcontroller Unit, MCU) etc. is detected by way of cyclic query and is sent from whether equipment receives main equipment
SPI data transmission event.
However in the prior art, it is detected in a manner of cyclic query processor from the device from whether equipment receives
The SPI data transmission event that main equipment is sent, then again handles SPI data transmission event, will cause from the device
The waste of processor operation resource.
Summary of the invention
The application provides a kind of method, apparatus and storage medium based on SPI asynchronous process event, not only realizes to master
The detecting for the SPI data transmission event that equipment is sent, and saved processor operation resource.
In a first aspect, the application provides a kind of method based on SPI asynchronous process event, comprising:
The level jump state of chip selection signal is obtained from main equipment by serial peripheral equipment interface SPI；According to chip selection signal
Level jump state judges whether there is SPI data transmission event；SPI data transmission event if it exists, and determine SPI data
It is transmitted, then initiates hardware interrupts to notify processor from the device to handle SPI data transmission event.
In the present solution, by the level jump state for obtaining chip selection signal, and according to the level jump state of chip selection signal
To determine whether there are SPI data transmission event, and after determining that SPI data are transmitted, hardware interrupts are initiated to notify from setting
Processor in standby handles SPI data transmission event, not only realizes the monitoring to SPI data transmission event, but also save
The operation resource of processor from the device.
Optionally, according to the level jump state of chip selection signal, SPI data transmission event is judged whether there is, comprising:
If there are failing edge jumps for chip selection signal, and then judge exist there are rising edge jump after failing edge jump
SPI data transmission event.
In the present solution, the failing edge jump by chip selection signal is jumped with rising edge, realize to SPI data transmission event
Judgement.
Optionally, according to the level jump state of chip selection signal, SPI data transmission event is judged whether there is, comprising:
If there are rising edge jumps for chip selection signal, and then judge exist there are failing edge jump after rising edge jump
SPI data transmission event.
In the present solution, the rising edge jump by chip selection signal is jumped with failing edge, realize to SPI data transmission event
Judgement.
Optionally, the method for SPI asynchronous process event provided by the present application, further includes:
If there are failing edge jumps for chip selection signal, memory space is distributed to the SPI data in a slave device.
In the present solution, by the way that in chip selection signal, there are when failing edge jump, distribute memory space to prepare to receive SPI number
According to the case where to avoid SPI data can not be normally received.Optionally, the method for SPI asynchronous process event provided by the present application,
Further include:
If there are rising edge jumps for chip selection signal, memory space is distributed to the SPI data in a slave device.
In the present solution, by the way that in chip selection signal, there are when rising edge jump, distribute memory space to prepare to receive SPI number
According to the case where to avoid SPI data can not be normally received.
Device, chip, equipment, storage medium and computer program based on SPI asynchronous process event is explained below to produce
Product, effect can refer to the effect of method part, repeat no more below to this.
Second aspect, the application provide a kind of device based on SPI asynchronous process event, comprising:
Module is obtained, for obtaining the level jump state of chip selection signal from main equipment by serial peripheral equipment interface SPI.Sentence
Disconnected module judges whether there is SPI data transmission event for the level jump state according to chip selection signal.
Processing module for SPI data transmission event if it exists, and determines that SPI data are transmitted, then initiates in hardware
It is disconnected that SPI data transmission event is handled with the processor of notice from the device.
Optionally, judgment module includes:
First judging submodule, if there are failing edge jumps for chip selection signal, and there are upper after failing edge jump
It rises along jump, then there are SPI data transmission events for judgement.
Optionally, judgment module includes:
Second judgment submodule, if there are rising edge jumps for chip selection signal, and in the presence of after rising edge jump
Drop is along jump, then there are SPI data transmission events for judgement.
Optionally, the device provided by the present application based on SPI asynchronous process event, further includes:
First distribution module is deposited to the distribution of SPI data in a slave device if there are failing edge jumps for chip selection signal
Store up space.
Optionally, the device provided by the present application based on SPI asynchronous process event, further includes:
Second distribution module is deposited to the distribution of SPI data in a slave device if there are rising edge jumps for chip selection signal
Store up space.
The third aspect, the application provide a kind of chip, for executing the base such as first aspect and first aspect optional way
In the method for SPI asynchronous process event.
Fourth aspect, the application provide a kind of equipment, comprising: processor and chip,
Chip is used for:
The level jump state of chip selection signal is obtained from main equipment by serial peripheral equipment interface SPI；According to chip selection signal
Level jump state judges whether there is SPI data transmission event；SPI data transmission event if it exists, and determine SPI data
It is transmitted, then initiates hardware interrupts to notify processor from the device to handle SPI data transmission event.
Processor is used for:
Hardware interrupts are responded, and handle SPI data transmission event.
Optionally, according to the level jump state of chip selection signal, SPI data transmission event is judged whether there is, comprising:
If there are failing edge jumps for chip selection signal, and then judge exist there are rising edge jump after failing edge jump
SPI data transmission event.
Optionally, according to the level jump state of chip selection signal, SPI data transmission event is judged whether there is, comprising:
If there are rising edge jumps for chip selection signal, and then judge exist there are failing edge jump after rising edge jump
SPI data transmission event.
Optionally, equipment provided by the present application, chip are also used to
If there are failing edge jumps for chip selection signal, memory space is distributed to SPI data in a slave device.
Optionally, equipment provided by the present application, chip are also used to:
If there are rising edge jumps for chip selection signal, memory space is distributed to SPI data in a slave device.5th aspect,
The application provides a kind of computer storage medium, and storage medium includes computer instruction, when executed by the processor, so that
Computer realizes the method based on SPI asynchronous process event such as first aspect or first aspect optional way.
6th aspect, the application provide a kind of computer program product, including computer instruction, when instruction is held by computer
When row, so that computer realizes the method based on SPI asynchronous process event of first aspect or first aspect optional way.
The application provides a kind of method, apparatus and storage medium based on SPI asynchronous process event, this method comprises: logical
Cross the level jump state that SPI interface obtains chip selection signal from main equipment；According to the level jump state of chip selection signal, judgement is
It is no there are SPI data transmission event, SPI data transmission event if it exists, and determine that SPI data are transmitted then initiates hardware
It interrupts to notify processor from the device to handle SPI data transmission event.Due to the level jump by obtaining chip selection signal
State, and according to the level jump state of chip selection signal to determine whether there are SPI data transmission event, and determine SPI data
Hardware interrupts are initiated after being transmitted to notify processor from the device to handle SPI data transmission event, are not only realized
Monitoring to SPI data transmission event, and saved processor operation resource from the device.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is this Shen
Some embodiments please for those of ordinary skill in the art without any creative labor, can be with
It obtains other drawings based on these drawings.
Fig. 1 is a kind of illustrative application scene figure of technical scheme；
Fig. 2 is the flow chart for the method based on SPI asynchronous process event that one embodiment of the application provides；
Fig. 3 is the schematic diagram of processing SPI data processing event provided by the embodiments of the present application；
Fig. 4 is the structural schematic diagram for the device based on SPI asynchronous process event that one embodiment of the application provides；
Fig. 5 is the structural schematic diagram for the device based on SPI asynchronous process event that another embodiment of the application provides；
Fig. 6 is the structural schematic diagram for the device based on SPI asynchronous process event that the another embodiment of the application provides；
Fig. 7 is the schematic diagram for the terminal device that one embodiment of the application provides.
Specific embodiment
To keep the purposes, technical schemes and advantages of the embodiment of the present application clearer, below in conjunction with the embodiment of the present application
In attached drawing, the technical scheme in the embodiment of the application is clearly and completely described, it is clear that described embodiment is
Some embodiments of the present application, instead of all the embodiments.Based on the embodiment in the application, those of ordinary skill in the art
Every other embodiment obtained without creative efforts, shall fall in the protection scope of this application.
The description and claims of this application and term " first ", " second ", " third ", " in above-mentioned attached drawing
The (if present)s such as four " are to be used to distinguish similar objects, without being used to describe a particular order or precedence order.It should manage
The data that solution uses in this way are interchangeable under appropriate circumstances, so as to embodiments herein described herein, such as can be with
Sequence other than those of illustrating or describing herein is implemented.In addition, term " includes " and " having " and their times
What is deformed, it is intended that cover it is non-exclusive include, for example, contain the process, method of a series of steps or units, system,
Product or equipment those of are not necessarily limited to be clearly listed step or unit, but may include be not clearly listed or for
The intrinsic other step or units of these process, methods, product or equipment.
SPI protocol be a kind of high speed, full duplex, synchronization communication bus protocol.Since SPI protocol is full duplex and is not had
It is defined rate limitation, transmission speed can be normally reached even more than 10Mbps, be highly suitable for high speed data transfer.It is main
Equipment sends SPI data transmission event extremely from equipment, to realize to the control from equipment.Main equipment by MISO and MOSI with
It is connected from equipment, and the transmitting of SPI data is carried out by MISO and MOSI.In the SPI for the transmission for receiving main equipment from equipment
After data transmission event, processor from the device is needed to handle the SPI data transmission event that main equipment is sent.So
And in the prior art, it is detected in a manner of cyclic query processor from the device and is sent from whether equipment receives main equipment
SPI data transmission event, will cause processor operation the wasting of resources.To solve the above-mentioned problems, the application provides a kind of base
In the method, apparatus and storage medium of SPI asynchronous process event.
Hereinafter, the exemplary application scene to the embodiment of the present application is introduced.
Fig. 1 is a kind of exemplary application scene figure of technical scheme, as shown in Figure 1, SPI protocol is with master-slave mode work
Make, this operating mode is related to one or more main equipments 11 and one or more from equipment 12, Fig. 1 with a main equipment 11
It is introduced for equipment 12 with one, wherein main equipment can be chip, CPU, MCU, field programmable gate array
(Field-Programmable Gate Array, FPGA) or terminal device etc., from equipment can be chip, MCU, CPU,
FPGA or terminal device etc., terminal device can be PC (PersonalComputer, PC) or mobile terminal etc., should
Mobile terminal be referred to as user equipment (User Equipment, referred to as: UE), access terminal, subscriber unit, subscriber station,
Movement station, mobile station, user terminal, terminal, wireless telecom equipment, user agent or user apparatus.Mobile terminal can be intelligence
It can mobile phone, cellular phone, wireless phone, tablet computer, personal digital assistant (PersonalDigital Assistant, letter
Claim: PDA) equipment, the handheld device with wireless communication function or it is connected to other processing equipments of radio modem, vehicle
Carry equipment, wearable device etc..In embodiments of the present invention, the interface which there is SPI to be communicated.
Main equipment 11 and carry out data transmission between equipment 12, it usually needs 4 data lines, when they are respectively serial
Clock (Serial Clock, SCLK) signal wire is used for synchronous data transmission, and SCLK signal line is only controlled by main equipment, from equipment
SCLK signal line is not can control, main equipment realizes the control to communication and then the control to SCLK signal line；Piece selects (Chip
Select, CS) line, for main equipment output chip selection signal to from equipment, only chip selection signal is prespecified enable signal
When, main equipment is just effective from the operation of equipment to this；MOSI data line and MISO data line, due to MOSI data line and MISO
Data line is mutually indepedent, therefore SPI data output and input independence, so allow to be completed at the same time outputting and inputting for data.
In main equipment 11 to when transmitting data from equipment 12, main equipment 11 can send CS signal to from equipment 12, and main equipment 11 to
When sending SPI data from equipment 12, CS signal can have level jump.
Based on above-mentioned application scenarios, describe in detail below to technical scheme:
Fig. 2 is the flow chart for the method based on SPI asynchronous process event that one embodiment of the application provides, wherein this method
It can be executed by the device of SPI asynchronous process event, which can be realized by way of software and/or hardware, such as: it should
Device can be it is above-mentioned from some or all of equipment, below using above-mentioned chip from the device be executing subject to be based on SPI
The method of asynchronous process event is illustrated, as shown in Fig. 2, this method comprises the following steps:
Step S101: chip obtains the level jump state of chip selection signal by SPI from main equipment.
In main equipment to when transmitting SPI data from equipment, main equipment can send chip selection signal to from equipment by chip select line,
Wherein, chip selection signal be high level signal or low level signal, by setting, can choose chip selection signal be high level effectively or
Low level is effective, wherein when high level effectively refers to that chip selection signal is high level signal, main equipment can be transmitted by MOSI
SPI data are to from equipment, and when low level effectively refers to that chip selection signal is low level signal, main equipment can be transmitted by MOSI
SPI data are extremely from equipment.
In a kind of possible embodiment, if setting chip selection signal is that low level is effective, only when chip selection signal is
When low level signal, main equipment just can be successfully transmitted SPI data to from equipment, if sending SPI number to from equipment in main equipment
According to when, chip selection signal is high level signal, then main equipment is successfully transmitted SPI data from equipment without normal direction.Therefore, in main equipment standard
It is standby that when sending SPI data from equipment, the chip selection signal that main equipment is sent by chip select line is low level by high level jump,
To when sending the completion of SPI data from equipment, the chip selection signal that main equipment is sent by chip select line is jumped by low level is main equipment
High level.
In alternatively possible embodiment, if setting chip selection signal is that high level is effective, only work as chip selection signal
When for high level, main equipment just can be successfully transmitted SPI data to from equipment, if sending SPI data to from equipment in main equipment
When, chip selection signal is low level signal, then main equipment is successfully transmitted SPI data from equipment without normal direction.Therefore, prepare in main equipment
To when sending SPI data from equipment, the chip selection signal that main equipment is sent by chip select line is high level by low level jump, in master
For equipment to when sending the completion of SPI data from equipment, the chip selection signal that main equipment is sent by chip select line is low by high level jump
Level.
The embodiment of the present invention to obtain chip selection signal level jump state mode with no restrictions, as long as can be accurate
Obtain the level jump state of chip selection signal.
Step S102: chip judges whether there is SPI data transmission event according to the level jump state of chip selection signal.
For ease of description, by low level of chip selection signal, effective or chip selection signal is that high level is effectively separately below
Example judges whether there is SPI data transmission event and is introduced to how according to the level jump state of chip selection signal.
Firstly, by taking chip selection signal is effective for low level as an example, when chip selection signal is low level signal, main equipment Xiang Congshe
Preparation send SPI data, then there may be SPI data transmission events, and when chip selection signal is high level signal, main equipment is without normal direction
SPI data are sent from equipment, therefore SPI data transmission event is not present.
Prepare in main equipment to when sending SPI data from equipment, the chip selection signal that main equipment is sent by chip select line is by height
Level jump is low level, and in main equipment to when sending the completion of SPI data from equipment, main equipment is selected by the piece that chip select line is sent
Signal is high level by low level jump.In order to judge whether there is SPI data biography according to the level jump state of chip selection signal
Defeated event, according to the level jump state of chip selection signal, judges whether there is SPI data in a kind of possible embodiment
Transmission event, comprising:
If there are failing edge jumps for chip selection signal, and then judge exist there are rising edge jump after failing edge jump
SPI data transmission event.
Failing edge jump, which is chip selection signal, becomes low level from high level, and rising edge jump is that chip selection signal is become by low level
For high level.In main equipment and the progress SPI data transmission since between equipment, main equipment is believed chip selection signal by high level
Number become low level signal, at this point, there are failing edge jumps for chip selection signal, when main equipment is with from equipment sign off, master is set
It is standby that chip selection signal is become into high level signal from low level signal, at this point, there are rising edge jumps for chip selection signal, therefore, if piece
Selecting signal, there are failing edge jumps, and there are rising edge jumps after failing edge jump, then there are SPI data to transmit thing for judgement
Part.
In the present solution, by the level jump state for obtaining chip selection signal, and according to the level jump state of chip selection signal
To determine whether there are SPI data transmission events, the monitoring to SPI data transmission event is not only realized, but also saved place
Manage the operation resource of device.
In order to, to when sending SPI data transmission event from equipment, guarantee smoothly receive SPI number from equipment in main equipment
According to transmission event, optionally, by chip selection signal, there are failing edge jumps, and after failing edge jumps, there are rising edge jumps
Become, judgement can also include: there are during SPI data transmission event
If there are failing edge jumps for chip selection signal, memory space is distributed to SPI data in a slave device.
When chip selection signal is there are when failing edge jump, indicate that main equipment is ready for sending SPI data to from equipment, one kind can
Can embodiment in, when chip selection signal is there are in the after the jump preset time of failing edge, main equipment sends SPI data to from setting
It is standby, the embodiment of the present invention to preset time with no restrictions.It, can be by dividing from equipment in order to guarantee the smooth reception of SPI data
With memory space to prepare to receive SPI data.
In the present solution, by the way that in chip selection signal, there are when failing edge jump, distribute memory space to prepare to receive SPI number
According to the case where to avoid SPI data can not be normally received.
In addition, by taking chip selection signal is effective for high level as an example, when chip selection signal is high level signal, main equipment Xiang Congshe
Preparation send SPI data, then there may be SPI data transmission events, and when chip selection signal is low level signal, main equipment is without normal direction
SPI data are sent from equipment, therefore SPI data transmission event is not present.
Prepare in main equipment to when sending SPI data from equipment, the chip selection signal that main equipment is sent by chip select line is by low
Level jump is high level, and in main equipment to when sending the completion of SPI data from equipment, main equipment is selected by the piece that chip select line is sent
Signal is low level by high level jump.In order to judge whether there is SPI data biography according to the level jump state of chip selection signal
Defeated event, according to the level jump state of chip selection signal, judges whether there is SPI data in a kind of possible embodiment
Transmission event, comprising:
If there are rising edge jumps for chip selection signal, and then judge exist there are failing edge jump after rising edge jump
SPI data transmission event.
In main equipment and the progress SPI data transmission since between equipment, main equipment is believed chip selection signal by low level
Number become high level signal, at this point, there are rising edge jumps for chip selection signal, when main equipment is with from equipment sign off, master is set
It is standby that chip selection signal is become into low level signal from high level signal, at this point, there are failing edge jumps for chip selection signal, therefore, if piece
Selecting signal, there are rising edge jumps, and there are failing edge jumps after rising edge jump, then there are SPI data to transmit thing for judgement
Part.
In the present solution, by the level jump state for obtaining chip selection signal, and according to the level jump state of chip selection signal
To determine whether there are SPI data transmission events, the monitoring to SPI data transmission event is not only realized, but also saved place
Manage the operation resource of device.
In order to, to when sending SPI data transmission event from equipment, guarantee smoothly receive SPI number from equipment in main equipment
According to transmission event, optionally, by chip selection signal, there are rising edge jumps, and after rising edge jumps, there are failing edge jumps
Become, judgement can also include: there are during SPI data transmission event
If there are rising edge jumps for chip selection signal, memory space is distributed to SPI data in a slave device.
When chip selection signal is there are when rising edge jump, indicate that main equipment is ready for sending SPI data to from equipment, one kind can
Can embodiment in, when chip selection signal is there are in the after the jump preset time of rising edge, main equipment sends SPI data to from setting
It is standby, the embodiment of the present invention to preset time with no restrictions.It, can be by dividing from equipment in order to guarantee the smooth reception of SPI data
With memory space to prepare to receive SPI data.
Step S103: SPI data transmission event if it exists, and determine SPI data be transmitted, then initiate hardware interrupts with
The processor of notice from the device handles SPI data transmission event.
In the above-mentioned effective embodiment of chip selection signal low level, by judging chip selection signal, there are failing edge jumps, and
There are rising edge jumps after failing edge jump, and then judge that there are SPI data transmission events, and SPI data are transmitted；
In the above-mentioned effective embodiment of chip selection signal high level, by judging chip selection signal, there are rising edge jumps, and in rising edge
There are failing edge jumps after jump, and then judge that there are SPI data transmission events, and SPI data are transmitted.If by sentencing
It is disconnected, event is passed there are SPI data and determines that SPI data are transmitted, and terminal device can be by initiating hardware interrupts to notify
Processor handles SPI data transmission event, and wherein hardware interrupts are that an asynchronous signal is being handled for interrupt coprocessor
Subtask, and notifier processes device handles SPI data transmission event；Hardware interrupts, that is, asynchronous interrupt are set by the outside of processor
The interruption that the standby electric signal generated generates, the time point that hardware interrupts occur is not expectable, passes event simultaneously simply by the presence of SPI data
It determines that SPI data are transmitted, hardware interrupts can be initiated.By initiating hardware interrupts when determining that SPI data are transmitted
SPI data transmission event is handled with notifier processes device, can effectively save the time of processor.
Fig. 3 is the schematic diagram of processing SPI data processing event provided by the embodiments of the present application, to set from equipment as terminal
It is standby, and in terminal device including chip and processor, the process of processing SPI data processing event is introduced, such as Fig. 3
Shown, processor is successively handling subtask 1 from the device, subtask 2, wherein subtask indicate terminal device in addition to
Other tasks of SPI data transmission event judge exist when terminal device is by the level jump state according to chip selection signal
SPI data transmission event, and determine SPI data when being transmitted, then hardware interrupts, which are initiated, with notifier processes device handles SPI data
Transmission event, the processor response hardware terminal simultaneously handle SPI data transmission event, handle after completing, then processing terminal
Subtask 3, subtask 4 in equipment etc., during processor handles subtask, as long as when terminal device passes through basis
The level jump state of chip selection signal, judgement is there are SPI data transmission event, can and when determining that SPI data are transmitted
It initiates hardware interrupts and SPI data transmission event is handled with notifier processes device, the processor response hardware terminal simultaneously handles SPI data
Transmission event then handles other subtasks after processing is completed.
In the present solution, initiating hardware interrupts by after determining that SPI data are transmitted and being handled with notifier processes device
SPI data transmission event realizes the timely processing to SPI data transmission event, and has saved the operation resource of processor.
Device, chip, equipment, storage medium and computer program based on SPI asynchronous process event is explained below to produce
Product, effect can refer to the effect of method part, repeat no more below to this.
Fig. 4 is the structural schematic diagram for the device based on SPI asynchronous process event that one embodiment of the application provides, the device
It can be realized by way of software and/or hardware, such as: the device can be from some or all of equipment, below with this
Device is is illustrated for chip from the device, as shown in figure 4, provided by the embodiments of the present application be based on SPI asynchronous process
The device of event may include:
Module 51 is obtained, for obtaining the level jump state of chip selection signal from main equipment by SPI.
Judgment module 52 judges whether there is SPI data transmission thing for the level jump state according to chip selection signal
Part.
Processing module 53 for SPI data transmission event if it exists, and determines that SPI data are transmitted, then initiates hardware
It interrupts to notify processor from the device to handle SPI data transmission event.
Optionally, Fig. 5 is the structural representation for the device based on SPI asynchronous process event that another embodiment of the application provides
Figure, which can be realized by way of software and/or hardware, such as: the device can be the above-mentioned part from equipment or
All, it is illustrated so that the device is chip from the device as an example below, as shown in figure 5, base provided by the embodiments of the present application
May include: in the device judgment module 52 of SPI asynchronous process event
First judging submodule 521 if there are failing edge jumps for chip selection signal, and exists after failing edge jump
, then there is SPI data transmission event in rising edge jump.
Optionally, as shown in figure 5, the device provided by the embodiments of the present application based on SPI asynchronous process event can also wrap
It includes:
First distribution module 54 is distributed to SPI data in a slave device if there are failing edge jumps for chip selection signal
Memory space.
Optionally, Fig. 6 is the structural representation for the device based on SPI asynchronous process event that the another embodiment of the application provides
Figure, which can be realized by way of software and/or hardware, such as: the device can be the above-mentioned part from equipment or
All, it is illustrated so that the device is chip from the device as an example below, as shown in fig. 6, base provided by the embodiments of the present application
May include: in the device judgment module 52 of SPI asynchronous process event
Second judgment submodule 522 if there are rising edge jumps for chip selection signal, and exists after rising edge jump
Failing edge jump, then there are SPI data transmission events for judgement.
Optionally, as shown in fig. 6, the device provided by the present application based on SPI asynchronous process event, can also include:
Second distribution module 55 is distributed to SPI data in a slave device if there are rising edge jumps for chip selection signal
Memory space.
The application provides a kind of chip, for executing the above-mentioned method based on SPI asynchronous process event, content and effect
Please refer to embodiment of the method.
The application provides a kind of terminal device, and Fig. 7 is the schematic diagram for the terminal device that one embodiment of the application provides, and such as schemes
Shown in 7, terminal device provided by the present application includes: processor 71 and chip 72.
Chip 72 is used for: obtaining the level jump state of chip selection signal from main equipment by SPI；According to the electricity of chip selection signal
Flat transitional states judge whether there is SPI data transmission event；SPI data transmission event if it exists, and determine that SPI data pass
It is finished into, then initiates hardware interrupts to notify processor 71 from the device to handle SPI data transmission event.
Processor 71 is used for: response hardware interrupts, and handles SPI data transmission event.
Optionally, according to the level jump state of chip selection signal, SPI data transmission event is judged whether there is, comprising:
If there are failing edge jumps for chip selection signal, and then judge exist there are rising edge jump after failing edge jump
SPI data transmission event.
Optionally, according to the level jump state of chip selection signal, SPI data transmission event is judged whether there is, comprising:
If there are rising edge jumps for chip selection signal, and then judge exist there are failing edge jump after rising edge jump
SPI data transmission event.
Optionally, equipment provided by the present application, chip 72 are also used to
If there are failing edge jumps for chip selection signal, memory space is distributed to SPI data in a slave device.
Optionally, equipment provided by the present application, chip 72 are also used to:
If there are rising edge jumps for chip selection signal, memory space is distributed to SPI data in a slave device.The application provides
A kind of computer storage medium, storage medium include computer instruction, when executed by the processor, so that computer is realized
The above-mentioned method based on SPI asynchronous process event, content and effect please refer to embodiment of the method.
The application provides a kind of computer program product, including computer instruction, when executed by the processor, so that
Computer realizes that the above-mentioned method based on SPI asynchronous process event, content and effect please refer to embodiment of the method.
Those of ordinary skill in the art will appreciate that: realize that all or part of the steps of above-mentioned each method embodiment can lead to
The relevant hardware of program instruction is crossed to complete.Program above-mentioned can be stored in a computer readable storage medium.The journey
When being executed, execution includes the steps that above-mentioned each method embodiment to sequence；And storage medium above-mentioned include: ROM, RAM, magnetic disk or
The various media that can store program code such as person's CD.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention., rather than its limitations；To the greatest extent
Pipe present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: its according to
So be possible to modify the technical solutions described in the foregoing embodiments, or to some or all of the technical features into
Row equivalent replacement；And these are modified or replaceed, various embodiments of the present invention technology that it does not separate the essence of the corresponding technical solution
The range of scheme.
Claims (17)
1. a kind of method based on SPI asynchronous process event characterized by comprising
The level jump state of chip selection signal is obtained from main equipment by serial peripheral equipment interface SPI；
According to the level jump state of the chip selection signal, SPI data transmission event is judged whether there is；
The SPI data transmission event if it exists, and determine that the SPI data are transmitted, then hardware interrupts are initiated to notify
Processor from the device handles the SPI data transmission event.
2. the method according to claim 1, wherein the level jump state according to the chip selection signal,
Judge whether there is SPI data transmission event, comprising:
If there are failing edge jumps for the chip selection signal, and then judge after failing edge jump there are rising edge jump
There are the SPI data transmission events.
3. the method according to claim 1, wherein the level jump state according to the chip selection signal,
Judge whether there is SPI data transmission event, comprising:
If there are rising edge jumps for the chip selection signal, and then judge after rising edge jump there are failing edge jump
There are the SPI data transmission events.
4. according to the method described in claim 2, it is characterised by comprising:
If there are the failing edges to jump for the chip selection signal, storage sky is distributed to the SPI data from the device described
Between.
5. according to the method described in claim 3, it is characterised by comprising:
If there are the rising edges to jump for the chip selection signal, storage sky is distributed to the SPI data from the device described
Between.
6. a kind of device based on SPI asynchronous process event characterized by comprising
Module is obtained, for obtaining the level jump state of chip selection signal from main equipment by serial peripheral equipment interface SPI；
Judgment module judges whether there is SPI data transmission event for the level jump state according to the chip selection signal；
Processing module for the SPI data transmission event if it exists, and determines that the SPI data are transmitted, then initiates hard
Part is interrupted to notify processor from the device to handle the SPI data transmission event.
7. device according to claim 6, which is characterized in that the judgment module includes:
First judging submodule if there are failing edge jumps for the chip selection signal, and is deposited after failing edge jump
It is jumped in rising edge, then there are the SPI data transmission events for judgement.
8. device according to claim 6, which is characterized in that the judgment module includes:
Second judgment submodule if there are rising edge jumps for the chip selection signal, and is deposited after rising edge jump
It is jumped in failing edge, then there are the SPI data transmission events for judgement.
9. device according to claim 7, which is characterized in that further include:
First distribution module, if there are the failing edges to jump for the chip selection signal, described from the device to described
SPI data distribute memory space.
10. device according to claim 8, which is characterized in that further include:
Second distribution module, if there are the rising edges to jump for the chip selection signal, described from the device to described
SPI data distribute memory space.
11. a kind of chip, which is characterized in that for executing the method according to claim 1 to 5.
12. a kind of from equipment characterized by comprising processor and chip,
The chip is used for:
The level jump state of chip selection signal is obtained from main equipment by serial peripheral equipment interface SPI；
According to the level jump state of the chip selection signal, SPI data transmission event is judged whether there is；
The SPI data transmission event if it exists, and determine that the SPI data are transmitted, then hardware interrupts are initiated to notify
The processor from the device handles the SPI data transmission event；
The processor is used for:
The hardware interrupts are responded, and handle the SPI data transmission event.
13. equipment according to claim 12, which is characterized in that the level jump shape according to the chip selection signal
State judges whether there is SPI data transmission event, comprising:
If there are failing edge jumps for the chip selection signal, and then judge after failing edge jump there are rising edge jump
There are the SPI data transmission events.
14. equipment according to claim 12, which is characterized in that the level jump shape according to the chip selection signal
State judges whether there is SPI data transmission event, comprising:
If there are rising edge jumps for the chip selection signal, and then judge after rising edge jump there are failing edge jump
There are the SPI data transmission events.
15. equipment according to claim 13, which is characterized in that the chip is also used to:
If there are the failing edges to jump for the chip selection signal, storage sky is distributed to the SPI data from the device described
Between.
16. equipment according to claim 14, which is characterized in that the chip is also used to:
If there are the rising edges to jump for the chip selection signal, storage sky is distributed to the SPI data from the device described
Between.
17. a kind of computer storage medium, which is characterized in that the storage medium includes computer instruction, when described instruction quilt
When computer executes, so that computer realization is asynchronous based on SPI as described in any one of claim 1-5 claim
The method of processing event.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2019/072927 WO2020150954A1 (en) | 2019-01-24 | 2019-01-24 | Method and apparatus for spi-based asynchronous handling of events, and storage medium |
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| CN201980000133.XA Pending CN109891400A (en) | 2019-01-24 | 2019-01-24 | Method, apparatus and storage medium based on SPI asynchronous process event |
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| CN110865954A (en) * | 2019-11-25 | 2020-03-06 | 南京科远智慧科技集团股份有限公司 | Method for automatically defining variable-length frame end based on DMA (direct memory access) SPI (serial peripheral interface) inter-device communication |
| CN112486887A (en) * | 2020-12-07 | 2021-03-12 | 天津津航计算技术研究所 | Method and device for transmitting asynchronous signals by using SPI bus |
| CN113656222A (en) * | 2021-07-01 | 2021-11-16 | 中国长城科技集团股份有限公司 | Serial port connection method, serial port connection device and electronic equipment |
| CN117112480A (en) * | 2023-10-24 | 2023-11-24 | 上海泰矽微电子有限公司 | Two-wire communication method, device and chip |
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| CN117112480A (en) * | 2023-10-24 | 2023-11-24 | 上海泰矽微电子有限公司 | Two-wire communication method, device and chip |
| CN117112480B (en) * | 2023-10-24 | 2024-02-06 | 上海泰矽微电子有限公司 | Two-wire communication method, device and chip |
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| WO2020150954A1 (en) | 2020-07-30 |
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