CN109873684A - Signal receiving device and its signal processing method - Google Patents

Signal receiving device and its signal processing method Download PDF

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Publication number
CN109873684A
CN109873684A CN201711248941.7A CN201711248941A CN109873684A CN 109873684 A CN109873684 A CN 109873684A CN 201711248941 A CN201711248941 A CN 201711248941A CN 109873684 A CN109873684 A CN 109873684A
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scaling
signal
circuit
signal processing
value
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CN201711248941.7A
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CN109873684B (en
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陈家伟
郑凯文
廖懿颖
童泰来
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MediaTek Inc
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MStar Semiconductor Inc Taiwan
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Abstract

The present invention provides a kind of signal receiving device and its signal processing method.Signal receiving device includes a scaling circuit, a recursive decoder and a control circuit.The scaling circuit is to scale an input signal according to a scaling, to generate signal after a corresponding scaling.The recursive decoder is to impose a recursive decoding program to signal after the scaling.The control circuit generates scaling after a modification to impose on after the scaling in signal the one of N number of data segments number of pulling over according to the recursive decoder, uses for the scaling circuit.Symbol N represents a positive integer and is a preset value.

Description

Signal receiving device and its signal processing method
Technical field
The present invention is related to signal receiving device, and especially and in letter of the recursive decoder front end equipped with scaling circuit Number reception device correlation.
Background technique
With the progress of the communication technology, the development of digitized video broadcast is gradually mature.At present in Africa and Asia, number Word television broadcasting (digital video broadcasting, DVB) is the digitized video broadcast standard of most mainstream.Fig. 1 is presented Second generation DTV satellite broadcasting (digital video broadcasting-satellite-second Generation, DVB-S2) receiving end outline functional block diagram, wherein include tuner 101, analogue-to-digital converters 102, timing/weakened phase restoring circuit 103, eqalizing cricuit 104, demodulator circuit 105, LLR ratio (log-likelihood Ratio, LLR) scaling circuit 106, low density parity check (low density parity check, LDPC) decoder 107, Bo Si-Qiao Heli (BCH) decoder 108, output processor 109 and control circuit 110.
107 received signal of low density parity check decoder (being indicated in figure with symbol Y) is with fixed bit The digital signal of length.LLR ratio, which scales circuit 106, to be responsible for adjusting its input signal (indicating in figure with symbol X) Size, so that signal Y has the quantization resolution to match with the fixation bit length as far as possible.In practice, LLR ratio Scaling circuit 106 is according to a specific scaling come scale signal Y, and the scaling will have a direct impact on signal Y's Quality.More specifically, a part of script non-corresponding will cause in signal Y in the information of saturation value using excessive scaling It is enlarged into saturation value.Relatively, if this scaling is too small, will lead to signal Y quantization resolution be not enough to it is aforementioned solid The probability determined bit length to match, thus be correctly decoded subsequent conditioning circuit reduces.
As shown in Figure 1, a kind of typical circuit configuration is the tune by control circuit 110 according to the input signal of this receiving end Type processed and code rate (code rate) table look-up to obtain the scaling, are supplied to LLR ratio scaling circuit 106 It uses.The shortcomings that this way is only to consider modulation type and code rate, and by other factors, (such as signal is not delivered by transmission end The tunnel condition passed through to receiving end) it is included in and considers, therefore sometimes can not scale circuit 106 for LLR ratio and look for Optimal scaling out.
Summary of the invention
To solve the above problems, the present invention proposes a kind of new signal receiving device and its signal processing method.
An embodiment according to the present invention is a kind of signal receiving device, wherein including scaling a circuit, a recursive solution Code device and a control circuit.The scaling circuit is corresponding to generate to scale an input signal according to a scaling Signal after one scaling.The recursive decoder is to impose a recursive decoding program to signal after the scaling.The control circuit It always pulls over after number generates a modification to impose on after the scaling in signal the one of N number of data segments according to the recursive decoder Scaling is used for the scaling circuit, and wherein symbol N represents a positive integer and is a preset value.
It is according to another embodiment of the present invention a kind of signal processing method applied to signal receiving device, comprising following Step: (a) scaling an input signal according to a scaling, to generate signal after a corresponding scaling;(b) after to the scaling Signal imposes a recursive decoding program;And one of N number of data segments in signal (c) is imposed on after the scaling according to step (b) Number of always pulling over generates scaling after a modification, and wherein symbol N represents a positive integer and is a preset value.
It can be further understood by following detailed description and accompanying drawings about the advantages and spirit of the present invention.
Detailed description of the invention
The outline functional block diagram at a second generation DTV satellite radio receiver end is presented in Fig. 1.
Fig. 2 is the functional block diagram according to the signal receiving device in one embodiment of the invention.
One kind that control circuit according to the present invention is presented in Fig. 3 implements example in detail.
The relativeness of Fig. 4 presentation scaling R and aggregate-value S.
Fig. 5 is the flow chart according to the signal processing method in one embodiment of the invention.
The detailed implementation steps that can be applied to signal processing method according to the present invention are further presented in Fig. 6.
101: tuner 102: analogue-to-digital converters
103: timing/weakened phase restoring circuit 104: eqalizing cricuit
105: demodulator circuit 106: LLR ratio scales circuit
107: 108: Bo Si-Qiao Heli decoder of low density parity check decoder
109: output processor 110: control circuit
200: signal receiving device 201: scaling circuit
202: recursive decoder 203: control circuit
203A: circuit 203B: memory is searched
203C: accumulator circuit 203D: increase and decrease circuit
203E: comparison circuit 400: signal processing method
S501~S504: process step S601~S611: process step
It should be noted that attached drawing of the invention includes the functional block diagram that a variety of functional mould groups associated with each other are presented. These attached drawings are not thin portion circuit diagram, and connecting line therein is only to indicate signal stream.Between functional element and/or program A variety of interactive relationship are not necessarily intended to reach through the direct electrical connection beginning.In addition, the function of individual component be not necessarily intended to as The mode being painted in attached drawing is distributed, and distributed block is not necessarily intended to the realization of distributed electronic component.
Specific embodiment
An embodiment according to the present invention is a kind of signal receiving device, and functional block diagram is illustrated in Fig. 2.Signal receives Device 200 includes a scaling circuit 201, a recursive (iterative) decoder 202 and a control circuit 203.In reality In, signal receiving device 200 can be incorporated into the various signals that recursive decoder front end is provided with scaling circuit and connect Receipts system, second generation DTV satellite broadcasting (DVB-S2) receiving end such as, but not limited to shown in FIG. 1.
201 system of circuit is scaled to scale its input signal according to a scaling, to produce signal after corresponding scaling. For example, scaling circuit 201 can be but be not limited to LLR ratio shown in FIG. 1 (LLR) scaling circuit 106.
Recursive decoder 202 is to impose a recursive decoding program to signal after the scaling.For example, recursive Decoder 202 can be but be not limited to low density parity check shown in FIG. 1 (LDPC) decoder 107 or a turbine code (turbo Code) decoder.If recursive decoder 202 carries out less in general, receiving signal after the comparatively ideal scaling of quality Secondary decoding of pulling over can obtain decoding result.Relatively, it if receiving signal after the scaling with more mistake, then pulls over Formula decoder 202, which must carry out more multiple decoding of pulling over, begins that decoding result can be obtained.It follows that recursive decoder 202 It can reflect the quality of signal after this batch scaling for the decoded number that pull over of signal after a batch scaling.
As it was earlier mentioned, scaling used by scaling circuit 201 will affect the quantization resolution of signal after scaling.It is aobvious So, inappropriate scaling can reduce the quality of signal after scaling.Therefore, in signal receiving device 200, recursive decoding The number of pulling over that device 202 imposes on signal after scaling is brought as inspecting the whether appropriate index of the scaling.It pulls over number Fewer, scaling is more ideal.As shown in Fig. 2, an information of pulling over can be fed back to control circuit 203 by recursive decoder 202, Adjust the scaling that scaling circuit 201 uses accordingly for control circuit 203.
One kind that control circuit 203 is presented in Fig. 3 implements example in detail.In this example, control circuit 203 is looked into comprising one Circuit 203A, a memory 203B, an accumulator circuit 203C, an an increase and decrease circuit 203D and comparison circuit 203E are looked for, below The function of each circuit of division.
It is equipped at least two buffers in memory 203B, is respectively intended to storage " scaling R at present " and " with reference to accumulative Value S ".Firstly, searching circuit 203A can be looked into according to the modulation type of the input signal of signal receiving device 200 with code rate Table obtains an original zoom ratio R whereby0, " scaling R at present " buffer in memory 203B is written.In practice, look into The look-up table content looked in circuit 203A can be the numerical value that circuit designers are found out via simulated experiment in advance, producing method Not repeated in this known to persond having ordinary knowledge in the technical field of the present invention.
Scaling circuit 201 generates signal after scaling using the numerical value that " scaling R at present " buffer stores.Therefore, Scaling circuit 201 can use original zoom ratio R first0Generate signal after scaling, and recursive decoder 202 then will be right Signal imposes recursive decoding program after the scaling.Control circuit 203, which can obtain after recursive decoder 202 imposes on the scaling, to be believed The one of N number of data segments always pulls over number in number, wherein symbol N represent a positive integer and predetermined for circuit designers one Numerical value.For example, N number of data segments can be corresponding to N number of video frame.Recursive decoder 202 can be wanted each time Notify that accumulator circuit 203C is added up when carrying out new recursive macro call, or complete specific deal decoding effort (such as Decoding program corresponding to a complete video frame) afterwards inform accumulator circuit 203C this period in number of always pulling over.Yu Yi In embodiment, it is multiple (such as continuous three) video frame solutions that accumulator circuit 203C, which is designed to accumulative recursive decoder 202, The number of always pulling over that the process of code is carried out.Accumulator circuit 203C can be by one section of each completion result after accumulative (hereinafter referred to as most New aggregate-value) " referring to aggregate-value S " buffer in memory 203B is written.Original zoom ratio is used in scaling circuit 201 R0After a period of time, newest aggregate-value caused by accumulator circuit 203C can be as the initial value S of " referring to aggregate-value S "0
The initial value S of " referring to aggregate-value S " is generated in accumulator circuit 203C0Afterwards, increase and decrease circuit 203D can be tentatively It generates one and is different from original zoom ratio R0Modification after scaling R1, " the scaling at present in memory 203B is written R " buffer is used for scaling circuit 201.For example, increase and decrease circuit 203D can enable scaling R after modification1Initially to contract Put ratio R090% or 110%.Then, the scaling R after scaling circuit 201 is using modification1Running a period of time with Afterwards, accumulator circuit 203C will be generated corresponding to scaling R after modification1Newest aggregate-value S1.To enable comparison basis consistent, If with reference to aggregate-value S0The number of always pulling over of the decoding program of three video frames is corresponded to, then newest aggregate-value S1It also can be pair The number of always pulling over of the decoding program of Ying Yusan video frame, even also aforementioned N number of data segments are fixed to correspond to three Video frame.
Comparison circuit 203E is responsible for comparing the newest aggregate-value S of accumulator circuit 203C generation1With memory 203B storage With reference to aggregate-value S0.With scaling R after modification1Less than original zoom ratio R0Hypothesis illustrate, if newest aggregate-value S1It is small In reference aggregate-value S0, indicate using lower than original zoom ratio R0Modification after scaling R1It can be improved signal after scaling Quality.Relatively, if newest aggregate-value S1Greater than reference aggregate-value S0, indicate scaling R after modification1Unlike initial contracting Put ratio R0It is ideal.
Then, increase and decrease circuit 203D can selectively increase and decrease current scaling according to above-mentioned comparison result, generate again Scaling R after one new modification2, " scaling R at present " buffer in memory 203B is written, for scaling circuit 201 use.More specifically, increase and decrease circuit 203D can follow previous modification direction (reduce or amplify) to continue to repair Change.With scaling R after modification1Less than original zoom ratio R0, and newest aggregate-value S1Less than reference aggregate-value S0The case where be Example, increase and decrease circuit 203D can continue to modify toward the direction for reducing scaling, that is, enable scaling R after new modification2It is small The scaling R after modification1.Relatively, if modification after scaling R1Less than original zoom ratio R0, and newest aggregate-value S1 Greater than reference aggregate-value S0, then scaling can be modified towards opposite modification direction by increasing and decreasing circuit 203D, that is, be changed to enable new Modification after scaling R2Greater than scaling R after modification1
It completes in comparison circuit 203E for newest aggregate-value S1With reference aggregate-value S0Comparison after, accumulator circuit 203C will be by newest aggregate-value S1" referring to aggregate-value S " buffer being stored in memory 203B, overriding is fallen to be stored in originally Aggregate-value S therein0.The rest may be inferred, and new aggregate-value S is then generated in accumulator circuit 203C2Later, comparison circuit 203E is With aggregate-value S1As aggregate-value S2Comparison other, and increase and decrease circuit 203D will continue to be determined according to new comparison result it is new Modification after scaling R3Scaling R after modification should be higher or lower than2
Theoretically, if being the longitudinal axis by horizontal axis, aggregate-value S of scaling R, the relativeness of the two parameters can be similar to One opening up parabola, as shown in Figure 4.If original zoom ratio R0It is not correspond to parabolical bottom section, After once or for several times correcting, increase and decrease circuit 203D can enable scaling after amendment gradually approach the bottom section, look for The scaling R that aggregate-value S can be enabled to minimize out.
It should be noted that in other embodiments of the invention, can also not include lookup circuit 203A in above-described embodiment with Its look-up table.Original zoom ratio R0Producing method be not limited to be tabled look-up according to modulation type with code rate.For example, initially Scaling R0It can be a special value having previously been stored in " scaling R at present " buffer.In fact, even if adopting With an original zoom ratio R independent of modulation type and code rate0, by amendment that is primary or being found out after amendment for several times Scaling can equally level off to best scaling afterwards.
It can be seen that by described above, different from only considering the prior art of modulation type and code rate, control circuit 203 can root The actual signal situation reflected according to information of pulling over carrys out dynamic and adjusts the scaling that scaling circuit 201 uses.The experiment proved that The scaling found out whereby can effectively promote the quality of signal after scaling, improve the probability that is correctly decoded of subsequent conditioning circuit.
Scope of the invention is not limited to specific storage mechanism;Memory 203B for a volatility or non-volatile can be deposited Reservoir device, such as random-access semiconductor memory or flash memory.In addition, other circuits in control circuit 203 can It is realized using various control and processing platform, includes fixed and programmed logic circuit, such as programmable logic Lock array, the integrated circuit for specific application, microcontroller, microprocessor, digital signal processor.In addition, control circuit 203 are also designed to through processor instruction stored in memory 203B is executed, to complete its task.
It is according to another embodiment of the present invention a kind of signal processing method applied to signal receiving device, flow chart It is illustrated in Fig. 5.Firstly, step S501 is an initialization step, to generate a current scaling.Step S502 is then root An input signal is scaled according to current scaling, to generate signal after a corresponding scaling.Secondly, step S503 is to the contracting It puts rear signal and imposes a recursive decoding program.Then, step S504 is N number of in signal after imposing on the scaling according to step S503 The number of pulling over of the one of data segments generates scaling after an amendment, and scaling after the amendment is set as new current contracting Ratio is put, wherein symbol N represents a positive integer and is a preset value.Then, step S502 can be merely re-executed.
The detailed implementation steps that can be applied to signal processing method 500 are further presented in Fig. 5.Firstly, step S601 is to take Obtain an original zoom ratio.Step S602 is that the original zoom ratio is set as current scaling.According to step S603 Scaling obtains newest number of pulling at present.Step S604 is to be set as newest number of pulling over reference to number of pulling over.Step S605 is to generate less than scaling after the amendment of current scaling, as new current scaling.Step S606 is root Newest number of pulling over is obtained according to current scaling.Step S607 is that judge whether newest number of pulling over is less than secondary with reference to pulling over Number.If the judging result of step S607 be it is yes, step S604 and its subsequent step can be merely re-executed.If step S607's sentences Disconnected result be it is no, then step S608 can be performed, and also be set as newest number of pulling over to refer to number of pulling over.Subsequent step S609 is to generate scaling after the amendment for being greater than current scaling, as new current scaling.Step S610 is root Newest number of pulling over is obtained according to current scaling.Step S611 is that judge whether newest number of pulling over is less than secondary with reference to pulling over Number.If the judging result of step S611 be it is yes, step S608 and its subsequent step can be merely re-executed.If step S611's sentences Disconnected result be it is no, then step S604 and its subsequent step can be merely re-executed.
Step S601~S603 and S604~the S605 carried out for the first time can be considered as the step S501 corresponded in Fig. 5.Step Rapid S606 corresponds to step S502~S503 in figure five.The step S607 and S604~S605 that may be then performed is then pair It should be in the step S504 in Fig. 5.Similarly, step S610 also corresponds to step S502~S503 in Fig. 5, and step S611 And S608~the S609 that may be then performed also corresponds to the step S504 in Fig. 5.
Persond having ordinary knowledge in the technical field of the present invention it is understood that in Fig. 6, the sequence of certain steps or in which The combination of decision logic can be by equivalent exchange, and will not influence the overall effect of the signal processing method.In addition, first The preceding various operation changes described when introducing signal receiving device 200 can also be applied to the signal processing method in Fig. 5, Fig. 6, Its details repeats no more.
By the detailed description of above embodiments, it would be desirable to feature and spirit of the invention are more clearly described, and more than being not Revealed embodiment is stated to limit to scope of the invention.On the contrary, the purpose is to wish to cover various changes and Tool equality is arranged in the scope of the scope of the patents of the invention to be applied.

Claims (8)

1. a kind of signal processing apparatus is suitable for a receiving system, which includes:
One scaling circuit, to scale an input signal according to a scaling, to generate signal after a corresponding scaling;
One recursive decoder, to impose a recursive decoding program to signal after the scaling;And
One control circuit is always pulled over to impose on after the scaling in signal the one of N number of data segments according to the recursive decoder Number, scaling is used for the scaling circuit after generating a modification, and wherein symbol N represents a positive integer and is a preset value.
2. signal processing apparatus as described in claim 1, which is characterized in that N number of data segments correspond to N number of video frame.
3. signal processing apparatus as described in claim 1, which is characterized in that the scaling circuit is LLR ratio scaling Circuit.
4. signal processing apparatus as described in claim 1, which is characterized in that the control circuit includes:
One memory is configured to temporarily store a current scaling and one with reference to aggregate-value;
One accumulator circuit, one to be provided according to recursive decoder information of pulling over generate the number of always pulling over;
One comparison circuit, to compare this always pull over number and the memory keep in this with reference to aggregate-value, compared with generating one Relatively result;And
One increase and decrease circuit, after the current scaling to be kept according to the comparison result and the memory generates the modification Scaling.
5. a kind of signal processing method applied to signal receiving device, includes:
(a) input signal is scaled according to a scaling, to generate signal after a corresponding scaling;
(b) a recursive decoding program is imposed to signal after the scaling;And
(c) the one of N number of data segments is imposed on after the scaling in signal according to step (b) always to pull over number, generate a modification retraction Ratio is put, wherein symbol N represents a positive integer and is a preset value.
6. signal processing method as claimed in claim 5, which is characterized in that N number of data segments correspond to N number of video frame.
7. signal processing method as claimed in claim 5, which is characterized in that step (a) executes LLR ratio scaling Program.
8. signal processing method as claimed in claim 5, which is characterized in that step (c) includes:
Compare the number and one of always pulling over reference to aggregate-value, to generate a comparison result;And
According to the comparison result and a current scaling, scaling after the modification is generated.
CN201711248941.7A 2017-12-01 2017-12-01 Signal receiving device and signal processing method thereof Expired - Fee Related CN109873684B (en)

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