CN109873684B - Signal receiving device and signal processing method thereof - Google Patents
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- CN109873684B CN109873684B CN201711248941.7A CN201711248941A CN109873684B CN 109873684 B CN109873684 B CN 109873684B CN 201711248941 A CN201711248941 A CN 201711248941A CN 109873684 B CN109873684 B CN 109873684B
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Abstract
The invention provides a signal receiving device and a signal processing method thereof. The signal receiving device comprises a scaling circuit, a recursive decoder and a control circuit. The scaling circuit is used for scaling an input signal according to a scaling ratio so as to generate a corresponding scaled signal. The recursive decoder is used for applying a recursive decoding procedure to the scaled signal. The control circuit is used for generating a modified scaling ratio for the scaling circuit according to a recursion time of the N data sections in the scaled signal applied by the recursive decoder. The symbol N represents a positive integer and is a predetermined value.
Description
Technical Field
The present invention relates to a signal receiving apparatus, and more particularly, to a signal receiving apparatus provided with a scaling circuit in a front end of a recursive decoder.
Background
With the progress of communication technology, the development of digital video broadcasting is becoming mature. Digital television broadcasting (DVB) is currently the most popular digital video broadcasting standard in africa and asian regions. Fig. 1 shows a schematic functional block diagram of a second generation digital video broadcasting-satellite-broadcasting (DVB-S2) receiver, which includes a tuner 101, an analog-to-digital converter 102, a timing/phase recovery circuit 103, an equalizer 104, a demodulation circuit 105, a log-likelihood ratio (LLR) scaling circuit 106, a Low Density Parity Check (LDPC) decoder 107, a bose-chaudhuri (BCH) decoder 108, an output processor 109, and a control circuit 110.
The signal (denoted by symbol Y in the figure) received by the low density parity check decoder 107 is a digital signal with a fixed bit length. The log-likelihood ratio scaling circuit 106 is responsible for adjusting the size of its input signal (denoted by symbol X in the figure) so that the signal Y has as much quantization resolution as possible commensurate with the fixed bit length. In practice, the log-likelihood ratio scaling circuit 106 scales the signal Y according to a specific scaling, and the scaling directly affects the quality of the signal Y. More specifically, using too much scaling results in a portion of the signal Y that would otherwise not correspond to the saturation level being amplified to the saturation level. On the other hand, if the scaling is too small, the quantization resolution of the signal Y will not be sufficient to match the fixed bit length, and the probability of correct decoding in the subsequent circuits will be reduced.
As shown in fig. 1, a typical circuit configuration is that the control circuit 110 performs a table lookup according to the modulation type and code rate (code rate) of the input signal at the receiving end to obtain the scaling ratio, which is provided to the log-likelihood ratio scaling circuit 106. This has the disadvantage that the modulation type and code rate are only considered, and other factors (such as the channel condition through which the signal is transmitted from the transmitting end to the receiving end) are not taken into consideration, so that sometimes the optimum scaling ratio cannot be found for the log-likelihood ratio scaling circuit 106.
Disclosure of Invention
In order to solve the above problems, the present invention provides a new signal receiving apparatus and a signal processing method thereof.
An embodiment of a signal receiving apparatus according to the present invention includes a scaling circuit, a recursive decoder, and a control circuit. The scaling circuit is used for scaling an input signal according to a scaling ratio so as to generate a corresponding scaled signal. The recursive decoder is used for applying a recursive decoding procedure to the scaled signal. The control circuit is used for generating a modified scaling ratio for the scaling circuit according to a total recursion times of N data segments in the scaled signal applied by the recursive decoder, wherein a symbol N represents a positive integer and is a preset value.
Another embodiment of the present invention is a signal processing method applied to a signal receiving apparatus, comprising the following steps: (a) scaling an input signal according to a scaling ratio to generate a corresponding scaled signal; (b) applying a recursive decoding procedure to the scaled signal; and (c) generating a modified scaling ratio based on a total number of recursions applied to the N data segments of the scaled signal in step (b), wherein the symbol N represents a positive integer and is a predetermined value.
The advantages and spirit of the present invention can be further understood by the following detailed description and accompanying drawings.
Drawings
FIG. 1 is a block diagram of a second generation DTV satellite broadcasting receiver.
Fig. 2 is a functional block diagram of a signal receiving apparatus according to an embodiment of the present invention.
Fig. 3 shows a detailed exemplary embodiment of the control circuit according to the present invention.
FIG. 4 presents the scaling R versus the running total S.
Fig. 5 is a flow chart of a signal processing method according to an embodiment of the invention.
Fig. 6 presents further detailed implementation steps applicable to the signal processing method according to the invention.
101: the tuner 102: analog-to-digital converter
103: timing/phase recovery circuit 104: equalizer
105: the demodulation circuit 106: log-likelihood ratio scaling circuit
107: the low-density parity-check decoder 108: Bos-Chahuri decoder
109: the output processor 110: control circuit
200: signal receiving apparatus 201: scaling circuit
202: the recursive decoder 203: control circuit
203A: the lookup circuit 203B: memory device
203C: the integrating circuit 203D: increase and decrease circuit
203E: the comparison circuit 400: signal processing method
S501 to S504: flow steps S601 to S611: procedure step
It is noted that the drawings include functional block diagrams that represent various functional blocks that can be associated with one another. These drawings are not detailed circuit diagrams, and the connecting lines are only used to indicate signal flows. The various interactions between functional elements and/or processes need not be achieved through direct electrical connections. In addition, the functions of the individual elements do not have to be distributed as shown in the drawings, and the distributed blocks do not have to be implemented by distributed electronic elements.
Detailed Description
A signal receiving apparatus according to an embodiment of the present invention is illustrated in fig. 2. The signal receiving apparatus 200 includes a scaling circuit 201, an iterative decoder 202, and a control circuit 203. In practical applications, the signal receiving apparatus 200 can be integrated into various signal receiving systems with a scaling circuit disposed at the front end of the recursive decoder, such as but not limited to the second generation digital television satellite broadcasting (DVB-S2) receiving end shown in fig. 1.
The scaling circuit 201 scales the input signal according to a scaling ratio to generate a scaled signal. For example, scaling circuit 201 may be, but is not limited to, log-likelihood ratio (LLR) scaling circuit 106 shown in fig. 1.
The recursive decoder 202 is used to apply a recursive decoding procedure to the scaled signal. For example, the recursive decoder 202 can be, but is not limited to, the Low Density Parity Check (LDPC) decoder 107 shown in fig. 1 or a turbo code (turbo code) decoder. Generally, if a scaled signal with better quality is received, the recursive decoder 202 performs a smaller number of recursive decodings to obtain the decoding result. In contrast, if the scaled signal with more errors is received, the recursive decoder 202 must perform a plurality of recursive decodings to obtain the decoding result. Therefore, the number of times that the recursive decoder 202 recursively decodes a batch of scaled signals reflects the quality of the batch of scaled signals.
As mentioned above, the scaling employed by the scaling circuit 201 may affect the quantization resolution of the scaled signal. It is clear that an improper scaling ratio will degrade the quality of the scaled signal. Therefore, in the signal receiving apparatus 200, the number of iterations that the recursive decoder 202 applies to the scaled signal is taken as an indicator to see whether the scaling is appropriate. The smaller the number of recursions, the more ideal the scaling is. As shown in FIG. 2, the recursive decoder 202 feeds back a recursive information to the control circuit 203, so that the control circuit 203 adjusts the scaling of the scaling circuit 201 accordingly.
Fig. 3 shows a detailed implementation example of the control circuit 203. In this example, the control circuit 203 includes a lookup circuit 203A, a memory 203B, an accumulation circuit 203C, an increase/decrease circuit 203D, and a comparison circuit 203E, the functions of which are described below.
The memory 203B is provided with at least two registers for storing the current scaling R and the reference accumulated value S, respectively. First, the lookup circuit 203A may perform a lookup according to the modulation type and the code rate of the input signal of the signal receiving apparatus 200, thereby obtaining an initial scaling R0Write to the "current scaling R" register in memory 203B. In practice, the contents of the lookup table in the lookup circuit 203A may be values found by a circuit designer in advance through a simulation experiment, and the generation manner thereof is known by those skilled in the art, and will not be described herein.
The scaling circuit 201 uses the value stored in the "current scaling R" register to generate the scaled signal. Therefore, the scaling circuit 201 first adopts the initial scaling ratio R0To generate a scaled signal, and the recursive decoder 202 will then apply a recursive decoding procedure to the scaled signal. The control circuit 203 obtains a total number of recursions applied by the recursive decoder 202 to the N data segments of the scaled signal, where the symbol N represents a positive integer and is a value predetermined by the circuit designer. For example, the N data segments may correspond to N video frames. The recursive decoder 202 may inform the accumulation circuit 203C to accumulate each time a new recursive process is to be performed, or inform the accumulation circuit 203C of the total number of recursive processes in the period of time after a certain amount of decoding work (e.g. a decoding process corresponding to a complete video frame) is completed. In one embodiment, the accumulation circuit 203C is configured to accumulate the recursive decoder 202 into a plurality (e.g., three consecutive) of videosTotal number of iterations performed by the process of frame decoding. The accumulation circuit 203C writes the result of one accumulation (hereinafter referred to as the latest accumulation value) each time into a register "reference accumulation value S" in the memory 203B. Using an initial scaling R at scaling circuit 2010After a period of time, the latest accumulated value generated by the accumulation circuit 203C can be used as the initial value S of the "reference accumulated value S0。
The integration circuit 203C generates an initial value S of the "reference integrated value S0Thereafter, the scaling circuit 203D may attempt to produce a different scaling R than the initial scaling R0Modified scaling R of1The "current scaling R" register in the memory 203B is written for use by the scaling circuit 201. For example, the scaling circuit 203D may scale the modified scaling ratio R1Is an initial scaling R090% or 110%. Then, the modified scaling ratio R is adopted in the scaling circuit 2011After a period of operation, the integrating circuit 203C generates the scaling R corresponding to the modified scaling1Is latest accumulated value S1. If the comparison is consistent, the accumulated value S is consulted0The total recursion times of the decoding procedure corresponding to three video frames, the latest accumulated value S1It is also the total number of iterations of the decoding process corresponding to three video frames, i.e. the aforementioned N data segments are fixed to correspond to three video frames.
The comparator 203E compares the latest integrated value S generated by the integrator 203C1And the reference accumulated value S stored in the memory 203B0. With modified scaling R1Less than the initial scaling R0To explain, if the latest accumulated value S1Less than the reference cumulative value S0Meaning that a lower than initial scaling R is used0Modified scaling R of1The quality of the scaled signal can be improved. On the contrary, if the latest accumulated value S1Greater than the reference cumulative value S0Denotes the modified scaling R1No more than the initial scaling R0Ideally.
Then, the increase/decrease circuit 203D selectively increases or decreases the voltage according to the comparison resultIncreasing or decreasing the current scaling ratio to again generate a new modified scaling ratio R2The "current scaling R" register in the memory 203B is written for use by the scaling circuit 201. More specifically, the increase/decrease circuit 203D may continue to modify in accordance with the previous modification direction (reduction or enlargement). With modified scaling R1Less than the initial scaling R0And the latest accumulated value S1Less than the reference cumulative value S0For example, the scaling circuit 203D may continue to modify the scaling direction, i.e. to make the new modified scaling R2Less than modified scale R1. In contrast, if the post-modification scaling ratio R is modified1Less than the initial scaling R0And the latest accumulated value S1Greater than the reference cumulative value S0The scaling circuit 203D may modify the scaling in the opposite direction, i.e. change the new modified scaling R2Greater than modified scale R1。
The comparison circuit 203E completes the comparison of the latest accumulated value S1And a reference accumulated value S0After the comparison, the integrating circuit 203C will integrate the latest integrated value S1The register "reference accumulated value S" stored in the memory 203B overwrites the accumulated value S originally stored therein0. And so on, and then a new accumulated value S is generated in the accumulation circuit 203C2Then, the comparison circuit 203E is the accumulated value S1As the accumulated value S2The increase/decrease circuit 203D continues to determine a new modified scaling ratio R according to the new comparison result3Should be higher or lower than the modified zoom ratio R2。
Theoretically, if the scaling R is taken as the horizontal axis and the accumulated value S is taken as the vertical axis, the relative relationship between these two parameters will approximate a parabola whose opening is upward, as shown in fig. 4. If the initial scaling R is0After one or more corrections, the scaling circuit 203D can gradually approach the scaled portion to the bottom region after the correction, and find the scaling R that minimizes the accumulated value S.
It is necessary to say thatIt should be noted that, in other embodiments of the present invention, the lookup circuit 203A and the lookup table thereof in the above embodiments may not be included. Initial scaling R0The generation method of (2) is not limited to table lookup according to modulation type and code rate. For example, the initial scaling R0May be a specific value pre-stored in the current scale R register. In fact, even with an initial scaling R independent of modulation type and code rate0The corrected scaling found after one or several corrections can also approach the optimum scaling.
As can be seen from the above description, unlike the prior art that only considers the modulation type and the code rate, the control circuit 203 dynamically adjusts the scaling ratio used by the scaling circuit 201 according to the actual signal condition reflected by the recursive information. Experiments prove that the found scaling ratio can effectively improve the quality of the scaled signal and improve the correct decoding probability of a subsequent circuit.
The scope of the present invention is not limited to a particular storage mechanism; the memory 203B may be a volatile or non-volatile memory device, such as a random access semiconductor memory or a flash memory. In addition, other circuits in the control circuit 203 may be implemented using a variety of control and processing platforms, including fixed and programmable logic circuits such as programmable logic gate arrays, application specific integrated circuits, microcontrollers, microprocessors, digital signal processors. In addition, the control circuit 203 may also be configured to perform its tasks by executing processor instructions stored in the memory 203B.
Another embodiment of the present invention is a signal processing method applied to a signal receiving apparatus, and a flowchart thereof is shown in fig. 5. First, step S501 is an initialization step for generating a current scaling. Step S502 scales an input signal according to the current scaling ratio to generate a scaled signal. Next, step S503 is to apply a recursive decoding procedure to the scaled signal. Next, in step S504, a modified scaling is generated according to a recursion number applied to N data segments in the scaled signal in step S503, and the modified scaling is set as the new current scaling, where N represents a positive integer and is a predetermined value. Subsequently, step S502 is executed again.
Fig. 5 presents further detailed implementation steps that can be applied to the signal processing method 500. First, in step S601, an initial scaling is obtained. Step S602 is to set the initial scaling ratio as the current scaling ratio. Step S603 is to obtain the latest recursion times according to the current scaling. In step S604, the latest number of iterations is set as the reference number of iterations. In step S605, a corrected zoom ratio smaller than the current zoom ratio is generated as a new current zoom ratio. Step S606 is to obtain the latest recursion times according to the current scaling. In step S607, it is determined whether the latest number of iterations is less than the reference number of iterations. If the determination result in the step S607 is yes, the step S604 and the following steps are executed again. If the determination result in the step S607 is negative, the step S608 is executed, that is, the latest recursion number is set as the reference recursion number. The next step S609 is to generate a modified zoom ratio larger than the current zoom ratio as the new current zoom ratio. Step S610 is to obtain the latest recursion times according to the current scaling. Step S611 is to determine whether the latest number of iterations is less than the reference number of iterations. If the determination result in the step S611 is yes, the step S608 and the following steps are executed again. If the determination result in the step S611 is negative, the step S604 and the following steps are executed again.
Steps S601 to S603 and S604 to S605 performed for the first time may be regarded as corresponding to step S501 in fig. 5. Step S606 corresponds to steps S502 to S503 in fig. five. Step S607 and possibly subsequent steps S604 to S605 correspond to step S504 in fig. 5. Similarly, step S610 also corresponds to steps S502 to S503 in fig. 5, and step S611 and possibly subsequent steps S608 to S609 also correspond to step S504 in fig. 5.
As one skilled in the art can understand, in fig. 6, the sequence of some steps or the combination of the determination logic therein can be equivalently exchanged without affecting the overall effect of the signal processing method. In addition, various operation changes described in the introduction of the signal receiving apparatus 200 can also be applied to the signal processing method in fig. 5 and 6, and details thereof are not repeated.
The above detailed description of the embodiments is intended to more clearly describe the features and spirit of the present invention, and the scope of the present invention is not limited by the embodiments disclosed above. On the contrary, it is intended to cover various modifications and equivalent arrangements included within the scope of the claims.
Claims (8)
1. A signal processing apparatus for a signal receiving system, the signal processing apparatus comprising:
a scaling circuit for scaling an input signal according to a scaling ratio to generate a scaled signal;
a recursive decoder for applying a recursive decoding procedure to the scaled signal; and
a control circuit for generating a modified scaling for the scaling circuit according to a total number of recursions applied by the recursive decoder to the N data segments of the scaled signal, wherein the symbol N represents a positive integer and is a predetermined value.
2. The signal processing apparatus of claim 1, wherein the N data segments correspond to N video frames.
3. The signal processing apparatus of claim 1 wherein the scaling circuit is a log likelihood ratio scaling circuit.
4. The signal processing apparatus of claim 1, wherein the control circuit comprises:
a memory for temporarily storing a current scaling and a reference accumulated value;
an accumulation circuit for generating the total number of recursions according to a recursion information provided by the recursive decoder;
a comparison circuit for comparing the total recursion times with the reference accumulated value temporarily stored in the memory to generate a comparison result; and
and the scaling circuit is used for generating the modified scaling according to the comparison result and the current scaling temporarily stored in the memory.
5. A signal processing method applied to a signal receiving apparatus, comprising:
(a) scaling an input signal according to a scaling ratio to generate a corresponding scaled signal;
(b) applying a recursive decoding procedure to the scaled signal; and
(c) generating a modified scaling factor according to a total number of recursions applied to the N data segments of the scaled signal in step (b), wherein the symbol N represents a positive integer and is a predetermined value.
6. The signal processing method of claim 5, wherein the N data segments correspond to N video frames.
7. The signal processing method of claim 5, wherein step (a) performs a log likelihood ratio scaling procedure.
8. The signal processing method of claim 5, wherein step (c) comprises:
comparing the total recursion times with a reference accumulated value to generate a comparison result; and
generating the modified scaling according to the comparison result and a current scaling.
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