TW201919348A - Signal receiving apparatus and signal processing method thereof - Google Patents

Abstract

A signal receiving apparatus including a scaling circuit, an iterative decoder, and a control circuit is provided. According to a scaling ratio, the scaling circuit changes the scale of an input signal, so as to correspondingly generate a scaled signal. The iterative decoder performs an iterative decoding process on the scaled signal. Based on the total number of iterations that the iterative decoder performed on N data segments in the scaled signal, the control circuit generates an modified scaling ratio for the scaling circuit, wherein N represents a predetermined positive integer.

Description

Signal receiving device and signal processing method thereof

The invention relates to a signal receiving device and, in particular, to a signal receiving device provided with a scaling circuit at the front end of the recursive decoder.

With the advancement of communication technology, the development of digital video broadcasting has gradually matured. Currently in Africa and Asia, digital video broadcasting (DVB) is the most popular digital video broadcasting standard. FIG. 1 is a schematic functional block diagram of a receiver of a second-generation digital-satellite-satellite broadcast (DVB-S2), including a tuner 101, an analog-to-digital converter 102, and a timing/phase recovery circuit 103. , equalizer 104, demodulation circuit 105, log-likelihood ratio (LRR) scaling circuit 106, low density parity check (LDPC) decoder 107, Bosch-Johri ( BCH) decoder 108, output processor 109, and control circuit 110.

The signal received by the low density parity check decoder 107 (indicated by the symbol Y in the figure) is a digital signal having a fixed bit length. The log-like likelihood ratio scaling circuit 106 is responsible for adjusting the size of its input signal (represented by the symbol X in the figure) such that the signal Y has as much quantized resolution as possible commensurate with the length of the fixed bit. In practice, the log-like ratio scaling circuit 106 scales the signal Y according to a particular scaling ratio, and the scaling directly affects the quality of the signal Y. More specifically, using an excessively large scaling ratio causes a portion of the signal Y that is not originally corresponding to the saturation value to be amplified to a saturation value. In contrast, if the scaling is too small, the quantization resolution of the signal Y will be insufficient to match the length of the aforementioned fixed bit, thereby reducing the probability of correct decoding of subsequent circuits.

As shown in FIG. 1, a typical circuit configuration is obtained by the control circuit 110 according to the modulation type and code rate of the input signal of the receiving end to obtain the scaling ratio, and the logarithmic approximate ratio scaling is provided. Circuitry 106 is used. The disadvantage of this approach is that only the modulation type and the code rate are considered, and other factors (such as the channel conditions through which the signal is transmitted from the transmitting end to the receiving end) are not taken into consideration, so sometimes it is not possible to scale the circuit for the logarithmic approximate ratio. 106 find the most appropriate scaling.

In order to solve the above problems, the present invention proposes a new signal receiving apparatus and a signal processing method thereof.

According to an embodiment of the invention, a signal receiving apparatus includes a scaling circuit, a recursive decoder, and a control circuit. The scaling circuit is configured to scale an input signal according to a scaling to generate a corresponding one of the scaled signals. The recursive decoder is configured to apply a recursive decoding procedure to the scaled signal. The control circuit is configured to generate a modified scaling ratio according to the total number of retransmissions of one of the N data segments applied by the recursive decoder for the scaling circuit, wherein the symbol N represents a positive An integer is a preset value.

Another embodiment of the present invention is a signal processing method applied to a signal receiving apparatus, comprising the steps of: (a) scaling an input signal according to a scaling ratio to generate a corresponding one of the scaled signals; (b) The scaled signal is subjected to a recursive decoding procedure; and (c) a modified scale is generated according to the total number of recursive times of one of the N data sections applied to the scaled signal according to step (b), wherein the symbol N Represents a positive integer and is a preset value.

The advantages and spirit of the present invention will be further understood from the following detailed description of the invention.

An embodiment of the present invention is a signal receiving apparatus, and a functional block diagram thereof is shown in FIG. The signal receiving device 200 includes a scaling circuit 201, an iterative decoder 202, and a control circuit 203. In practical applications, the signal receiving apparatus 200 can be integrated in various signal receiving systems provided with a scaling circuit at the front end of the reciprocating decoder, such as but not limited to the second generation digital television broadcasting (DVB-S2) shown in FIG. )Receiving end.

The scaling circuit 201 is operative to scale its input signal according to a scaling to produce a corresponding scaled signal. For example, scaling circuit 201 can be, but is not limited to, a log likelihood ratio (LLR) scaling circuit 106 as shown in FIG.

The recursive decoder 202 is configured to apply a recursive decoding procedure to the scaled signal. For example, the recursive decoder 202 can be, but is not limited to, a low density parity check (LDPC) decoder 107 or a turbo code decoder as shown in FIG. In general, if a scaled signal of a better quality is received, the recursive decoder 202 performs a number of recursive decodings to obtain a decoding result. In contrast, if a scaled signal with more errors is received, the recursive decoder 202 must perform more than one recursive decoding to obtain the decoding result. It can be seen that the number of times that the recursive decoder 202 performs recursive decoding on a batch of scaled signals can reflect the quality of the batch of scaled signals.

As previously described, the scaling employed by scaling circuit 201 affects the quantized resolution of the scaled signal. Obviously, an inappropriate scaling will reduce the quality of the scaled signal. Therefore, in the signal receiving apparatus 200, the number of times the recursive signal is applied to the scaled signal by the recursive decoder 202 is taken as an index for checking whether or not the scaling is appropriate. The fewer the number of recursions, the better the scaling. As shown in FIG. 2, the recursive decoder 202 feeds back a recursive information to the control circuit 203 for the control circuit 203 to adjust the scaling used by the scaling circuit 201 accordingly.

FIG. 3 presents a detailed implementation example of control circuit 203. In this example, the control circuit 203 includes a lookup circuit 203A, a memory 203B, an accumulation circuit 203C, an increase and decrease circuit 203D, and a comparison circuit 203E. The functions of the circuits are described below.

The memory 203B is provided with at least two temporary registers for storing the "current scaling ratio R" and the "reference cumulative value S", respectively. First, the search circuit 203A can perform a lookup according to the modulation type and the code rate of the input signal of the signal receiving device 200, thereby obtaining an initial scaling ratio R ₀ , and temporarily storing the “current scaling ratio R” in the memory 203B. Device. In practice, the lookup table content in the lookup circuit 203A may be a value that the circuit designer finds in advance through a simulation experiment, and the manner of generation thereof is known to those of ordinary skill in the art to which the present invention pertains, and details are not described herein.

The scaling circuit 201 uses the values stored in the "current scaling R" register to generate the scaled signal. Thus, scaling circuit 201 first uses the initial scaling R ₀ to produce the scaled signal, and recursive decoder 202 will then apply the recursive decoding procedure to the scaled signal. The control circuit 203 obtains the total number of times of retransmission of one of the N data sectors in the scaled signal by the recursive decoder 202, wherein the symbol N represents a positive integer and is predetermined by the circuit designer. For example, the N data sections may correspond to N video frames. The recursive decoder 202 may notify the accumulating circuit 203C to accumulate each time a new recursive procedure is to be performed, or notify the accumulating circuit after completing a certain amount of decoding work (eg, a decoding procedure corresponding to one complete video frame). 203C The total number of recursions during this time. In one embodiment, the accumulation circuit 203C is designed to count the total number of recursive times that the recursive decoder 202 performs for a plurality of (eg, three consecutive) video frame decoding processes. The accumulation circuit 203C writes the result of the completion of each accumulation (hereinafter referred to as the latest accumulated value) into the "reference cumulative value S" register in the memory 203B. After the scaling circuit 201 adopts the initial scaling ratio R ₀ for a while, the latest accumulated value generated by the integrating circuit 203C can be used as the initial value S _{0 of the} "reference cumulative value S".

After the accumulation circuit 203C generates the initial value S ₀ of the "reference cumulative value S", the increase/decrease circuit 203D can tentatively generate a modified scaling ratio R ₁ different from the initial scaling ratio R ₀ , and write it into the memory 203B. The "current scaling R" register is used by the scaling circuit 201. For example, the increase and decrease circuit 203D can make the modified scaling ratio R ₁ 90% or 110% of the initial scaling ratio R ₀ . After then, after using scaling circuit 201 changes the scale factor R ₁ a period of operation, it will produce a corresponding integrating circuit 203C latest accumulated value of the scaling ratio of R ₁ to the modified S _1. In order to make the comparison basis consistent, if the reference cumulative value S ₀ is the total number of recursive times corresponding to the decoding procedures of the three video frames, the latest accumulated value S ₁ will also be the total retransmission of the decoding program corresponding to the three video frames. The number of times, that is, the aforementioned N data sections are fixed to correspond to three video frames.

The comparison circuit 203E is responsible for comparing the latest accumulated value S ₁ generated by the accumulation circuit 203C with the reference cumulative value S ₀ stored by the memory 203B. The assumption that the modified scaling ratio R _{1 is} smaller than the initial scaling ratio R ₀ indicates that if the latest accumulated value S _{1 is} smaller than the reference cumulative value S ₀ , it means that the modified scaling ratio R ₁ lower than the initial scaling ratio R ₀ can be used to increase the scaling. The quality of the post signal. In contrast, if the latest accumulated value S _{1 is} greater than the reference cumulative value S ₀ , it indicates that the modified scaling ratio R ₁ is not ideal than the initial scaling ratio R ₀ .

Then, the increase/decrease circuit 203D selectively increases or decreases the current zoom ratio according to the comparison result, and generates a new modified scale R _{2 again} , and writes the “current scale R” register in the memory 203B for The scaling circuit 201 is used. More specifically, the increase/decrease circuit 203D can continue to modify according to the previous modification direction (reduction or enlargement). For example, in the case where the modified scaling ratio R _{1 is} smaller than the initial scaling ratio R ₀ and the latest accumulated value S _{1 is} smaller than the reference cumulative value S ₀ , the increase/decrease circuit 203D can continue to modify the direction in which the scaling is reduced, that is, to make a new one. The modified scaling R _{2 is} smaller than the modified scaling R ₁ . In contrast, if the modified scaling ratio R _{1 is} smaller than the initial scaling ratio R ₀ and the latest accumulated value S _{1 is} greater than the reference cumulative value S ₀ , the increase/decrease circuit 203D can modify the scaling ratio in the opposite modification direction, that is, Let the new modified scale R _{2 be} greater than the modified scale R ₁ .

After the comparison circuit 203E completes the comparison of the latest integrated value S ₁ and the reference integrated value S ₀ , the accumulation circuit 203C stores the latest accumulated value S ₁ in the "reference cumulative value S" register in the memory 203B, Write the accumulated value S ₀ that was originally stored in it. And so on, after the accumulation circuit 203C generates a new integrated value S ₂ , the comparison circuit 203E compares the cumulative value S ₁ as the integrated value S ₂ , and the increase/decrease circuit 203D continues to follow the new comparison result. It is decided that the new modified scale R ₃ should be higher or lower than the modified scale R ₂ .

Theoretically, if the scaling ratio R is the horizontal axis and the cumulative value S is the vertical axis, the relative relationship between the two parameters will approximate a parabola with an opening upward, as shown in FIG. If the initial scaling ratio R _{0 does} not correspond to the bottom interval of the parabola, after one or several corrections, the increasing/decreasing circuit 203D can gradually make the corrected scaling ratio approach the bottom interval, and find that the cumulative value S can be minimized. The scale of R.

It should be noted that, in other embodiments of the present invention, the lookup circuit 203A and the lookup table in the above embodiment may not be included. The manner in which the initial scaling ratio R ₀ is generated is not limited to look up the table according to the modulation type and the code rate. For example, the initial scaling R ₀ may be a specific value pre-stored in the "current scaling R" register. In fact, even with an initial scaling R ₀ that is independent of the modulation type and code rate, the corrected scaling ratio found after one or several corrections can also approach the optimal scaling.

As can be seen from the above description, unlike the prior art which only considers the modulation type and the code rate, the control circuit 203 dynamically adjusts the scaling used by the scaling circuit 201 based on the actual signal condition reflected by the recursive information. It has been proved by experiments that the scale obtained by this can effectively improve the quality of the signal after scaling and improve the probability of correct decoding of subsequent circuits.

The scope of the present invention is not limited to a particular storage mechanism; the memory 203B can be a volatile or non-volatile memory device such as a random access semiconductor memory or a flash memory. In addition, other circuits in control circuit 203 can be implemented using a variety of control and processing platforms, including fixed and programmable logic circuits, such as programmable logic gate arrays, integrated circuits for specific applications, microcontrollers, Microprocessor, digital signal processor. In addition, the control circuit 203 can also be designed to perform its tasks by executing processor instructions stored in the memory 203B.

Another embodiment of the present invention is a signal processing method applied to a signal receiving apparatus, and a flow chart thereof is shown in FIG. First, step S501 is an initialization step for generating a current zoom ratio. Step S502 is to scale an input signal according to the current scaling to generate a corresponding one of the scaled signals. Next, step S503 is to apply a recursive decoding procedure to the scaled signal. Next, in step S504, a corrected scaling is generated according to the number of times of returning one of the N data segments in the scaled signal according to step S503, and the corrected scaling is set to a new current scaling, wherein the symbol N Represents a positive integer and is a preset value. Subsequently, step S502 is re-executed.

FIG. 5 further presents detailed implementation steps that may be applied to signal processing method 500. First, step S601 is to obtain an initial scaling. Step S602 is to set the initial zoom ratio to the current zoom ratio. Step S603 is to obtain the latest number of recursive times according to the current zoom ratio. Step S604 is to set the latest number of recursive times as the number of reference retransmissions. Step S605 is to generate a corrected zoom ratio that is smaller than the current zoom ratio as a new current zoom ratio. Step S606 is to obtain the latest number of recursive times according to the current zoom ratio. Step S607 is to determine whether the latest number of recursions is less than the number of reference recursions. If the decision result in the step S607 is YES, the step S604 and its subsequent steps are re-executed. If the result of the determination in the step S607 is no, the step S608 is executed, that is, the latest number of retransmissions is set as the number of reference retransmissions. Subsequent step S609 is to generate a corrected zoom ratio that is greater than the current zoom ratio as a new current zoom ratio. Step S610 is to obtain the latest number of recursive times according to the current zoom ratio. Step S611 is to determine whether the latest number of recursions is less than the number of reference recursions. If the decision result in the step S611 is YES, the step S608 and its subsequent steps are re-executed. If the decision result in the step S611 is NO, the step S604 and its subsequent steps are re-executed.

Steps S601 to S603 and the first performed S604 to S605 can be regarded as corresponding to step S501 in FIG. Step S606 corresponds to steps S502 to S503 in FIG. Step S607 and S604~S605, which may be subsequently executed, correspond to step S504 in FIG. Similarly, step S610 also corresponds to steps S502 to S503 in FIG. 5, and step S611 and subsequent S608 to S609 may also be performed corresponding to step S504 in FIG.

It will be understood by those of ordinary skill in the art that, in FIG. 6, the order of certain steps or combinations of decision logic therein may be equivalently interchanged without affecting the overall effect of the signal processing method. In addition, various operational changes previously described in the introduction of the signal receiving apparatus 200 can also be applied to the signal processing methods in FIG. 5 and FIG. 6, and details thereof will not be described again.

The features and spirit of the present invention are intended to be more apparent from the detailed description of the embodiments. On the contrary, the intention is to cover various modifications and equivalents within the scope of the invention as claimed.

101‧‧‧ Tuner

102‧‧‧ Analog-Digital Converter

103‧‧‧Time/Phase Recovery Circuit

104‧‧‧ Equalizer

105‧‧‧Demodulation circuit

106‧‧‧ Logarithmic Likelihood Ratio Scaling Circuit

107‧‧‧Low density parity check decoder

108‧‧ Bosch-Johri decoder

109‧‧‧Output processor

110‧‧‧Control circuit

200‧‧‧Signal receiving device

201‧‧‧Scaling circuit

202‧‧‧Reciprocal decoder

203‧‧‧Control circuit

203A‧‧‧Search circuit

203B‧‧‧ memory

203C‧‧‧Accumulating circuit

203D‧‧‧ increase and decrease circuit

203E‧‧‧Comparative circuit

400‧‧‧Signal Processing Method

S501~S504‧‧‧ Process steps

S601~S611‧‧‧ Process steps

Figure 1 presents a schematic functional block diagram of a second generation digital television satellite broadcast receiver. Figure 2 is a functional block diagram of a signal receiving apparatus in accordance with an embodiment of the present invention. Figure 3 presents a detailed embodiment of a control circuit in accordance with the present invention. Figure 4 shows the relative relationship between the scaling ratio R and the cumulative value S. Figure 5 is a flow chart of a signal processing method in accordance with an embodiment of the present invention. Figure 6 further presents detailed implementation steps that can be applied to the signal processing method in accordance with the present invention.

It should be noted that the drawings of the present invention include functional block diagrams that present a plurality of functional modules associated with each other. These figures are not detailed circuit diagrams, and the connecting lines therein are only used to represent the signal flow. Multiple interactions between functional components and/or procedures do not have to be achieved through direct electrical connections. In addition, the functions of the individual components are not necessarily allotted in the manner illustrated in the drawings, and the decentralized blocks are not necessarily implemented in the form of decentralized electronic components.

Claims (8)

A signal processing device is applicable to a signal receiving system, the signal processing device comprising: a scaling circuit for scaling an input signal according to a scaling ratio to generate a corresponding one of the scaled signals; a recursive decoder, And a control circuit for generating a total number of retransmission times of one of the N data segments in the scaled signal according to the recursive decoder A modified scale is used by the scaling circuit, where the symbol N represents a positive integer and is a predetermined value. The signal processing device of claim 1, wherein the N data segments correspond to N video frames. The signal processing device of claim 1, wherein the scaling circuit is a log-likelihood ratio (LLR) scaling circuit. The signal processing device of claim 1, wherein the control circuit comprises: a memory for temporarily storing a current scaling ratio and a reference accumulated value; and an accumulating circuit for decoding according to the recursive decoding Providing one of the recursive information to generate the total number of retransmissions; a comparison circuit for comparing the total number of retransmissions with the reference accumulated value temporarily stored in the memory to generate a comparison result; and an increasing or decreasing circuit And generating the modified scaling according to the comparison result and the current scaling ratio temporarily stored by the memory. A signal processing method applied to a signal receiving apparatus, comprising: (a) scaling an input signal according to a scaling to generate a corresponding one of the scaled signals; (b) applying a recursive decoding to the scaled signal a program; and (c) applying a modified number of times of one of the N data segments in the scaled signal according to step (b), wherein the modified symbol represents a positive integer and is a preset value . The signal processing method of claim 5, wherein the N data segments correspond to N video frames. The signal processing method of claim 5, wherein the step (a) is to perform a one-to-seven approximate ratio scaling procedure. The signal processing method of claim 5, wherein the step (c) comprises: comparing the total number of times of retransmission with a reference accumulated value to generate a comparison result; and according to the comparison result and a current scaling ratio, This modified scale is generated.