CN109859698A - A kind of GOA driving circuit - Google Patents

A kind of GOA driving circuit Download PDF

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Publication number
CN109859698A
CN109859698A CN201810955301.8A CN201810955301A CN109859698A CN 109859698 A CN109859698 A CN 109859698A CN 201810955301 A CN201810955301 A CN 201810955301A CN 109859698 A CN109859698 A CN 109859698A
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China
Prior art keywords
film transistor
tft
thin film
control module
module
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CN201810955301.8A
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Inventor
段忠红
洪胜宝
柳发霖
李林
巫蒙
肖亮
付浩
何孝金
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Truly Semiconductors Ltd
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Truly Semiconductors Ltd
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Priority to CN201810955301.8A priority Critical patent/CN109859698A/en
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Abstract

The invention discloses a kind of GOA driving circuits, belong to electronic technology field, GOA driving circuit includes multistage GOA driving unit, n-th grade of GOA driving unit includes pull-up control module, pull-down control module, global control module, supplementary module, reseting module and output module, pull-up control module is electrically connected with pull-down control module and global control module, and supplementary module is electrically connected with global control module and reseting module, and output module is electrically connected with global control module and reseting module;Pull-up control module is for pulling up global control module;Pull-down control module is for pulling down global control module;Output module is used to export low level signal to the output end of n-th grade of GOA driving unit;Auxiliary unit for reducing output module capacitive coupling;Reseting module, for dragging down the output signal of output module.The present invention can be improved the driving capability of every grade of GOA driving unit, realize the low cost, narrow frame, the demand of slimming of product.

Description

A kind of GOA driving circuit
Technical field
The present invention relates to electronic circuit fields, and in particular to a kind of GOA driving circuit.
Background technique
The circuit of driving in liquid crystal display is mainly by liquid crystal display panel external connection integrated circuit (Integrated Circuit IC) is come what is completed.In contrast, array substrate row driving (Gate Driver On Array) Technology, abbreviation GOA technology are that directly gate driving circuit is produced in array substrate, to replace extraneous silicon chip production A kind of technology of driving chip.Since GOA can be directly produced on around panel, making technology is simplified, cost can also be reduced The integrated level for improving liquid crystal display panel, so that panel be made to be intended to more be thinned.However currently used GOA driving circuit, because Driving capability is poor to cause output signal unstable, will lead to pixel electric leakage, influences display effect.
Summary of the invention
The present invention is directed to disclose a kind of GOA driving circuit, which can improve the driving capability of GOA, optimize face Display product low-power consumption, low cost, narrow frame, the demand of slimming are realized in plate design.
The technical scheme adopted by the invention is as follows:
A kind of GOA driving circuit, the GOA driving circuit include multistage GOA driving unit, and n-th grade of GOA driving unit includes There are pull-up control module, pull-down control module, global control module, supplementary module, reseting module and output module, the pull-up Control module is electrically connected with the pull-down control module and the global control module, the supplementary module and the global control Module and reseting module electrical connection, the output module are electrically connected with the global control module and the reseting module;
Wherein, the pull-up control module, for pulling up global control module;
The pull-down control module, for pulling down global control module;
The output module, for exporting low level signal to the output end of n-th grade of GOA driving unit;
The auxiliary unit, for reducing the capacitive coupling of output module;
The reseting module, for dragging down the output signal of output module.
Further, the pull-up control module includes first film transistor, the leakage of the first film transistor Forward scan signal is accessed in pole, and grid accesses the output signal G (n-1) of (n-1)th grade of GOA driving unit, source electrode and the overall situation Control module electrical connection.
Further, the pull-down control module includes the second thin film transistor (TFT), the grid of second thin film transistor (TFT) The output signal G (n+1) of (n+1)th grade of GOA driving unit is accessed in pole, and drain electrode access direction scanning signal, source electrode connects described complete Office's control module.
Further, the global control module includes the 4th thin film transistor (TFT), the grid of the 4th thin film transistor (TFT) Pole is electrically connected with the source electrode of the first film transistor, the source electrode of the second thin film transistor (TFT) and the output module respectively, leakage Pole is electrically connected with the supplementary module, and source electrode accesses the end VGL.
Further, the supplementary module includes that the 5th thin film transistor (TFT), the 6th thin film transistor (TFT) and the 7th film are brilliant The grid of body pipe, the 5th thin film transistor (TFT) accesses second clock signal, and brilliant with drain electrode and the 6th film respectively The drain electrode of body pipe is electrically connected, and source electrode is electrically connected with the grid of the 6th thin film transistor (TFT), the source of the 6th thin film transistor (TFT) Pole is electrically connected with the drain electrode of the 4th thin film transistor (TFT), the grid of the 7th thin film transistor (TFT) and the reseting module;Institute It states the source electrode access end VGL of the 7th thin film transistor (TFT) and is electrically connected with the reseting module, it is brilliant that drain electrode connects the 4th film The grid of body pipe.
Further, the reseting module includes the 8th thin film transistor (TFT), the grid point of the 8th thin film transistor (TFT) It is not electrically connected with the grid of the source electrode of the 6th thin film transistor (TFT), the 7th thin film transistor (TFT), source electrode accesses the end VGL, leakage Pole connects the output end G (n) of n-th grade of GOA driving unit.
Further, the output module includes third thin film transistor (TFT) and capacitor, the third thin film transistor (TFT) Drain electrode the first clock signal of access, the grid source electrode with the source electrode of the first film transistor, the second thin film transistor (TFT) respectively And the first end electrical connection of the grid and the capacitor of the 4th thin film transistor (TFT), the second end of source electrode and the capacitor are electrically connected It connects, and accesses the output end G (n) of n-th grade of GOA driving unit.
Further, the second clock signal frequency is one times of the first clock signal frequency.
It is had the advantage that using technical solution of the present invention
1. the present invention, by Design assistant module, the width for adjusting separately the 4th thin film transistor (TFT) and the 7th thin film transistor (TFT) two is long Than the mutual containing of the grid potential of the 4th thin-film transistor gate current potential of Lai Shixian and the 7th thin film transistor (TFT) reaches to work as and be somebody's turn to do When GOA driving unit need to export high level, the 4th thin-film transistor gate current potential inhibits the grid potential of the 7th thin film transistor (TFT), Keep the grid potential of the 7th thin film transistor (TFT) low, prevents the 8th thin film transistor (TFT) from opening and discharge to output.When the GOA drives list When member need to export low level, the 7th thin film transistor (TFT) current potential inhibits the 4th thin film transistor (TFT) current potential, the grid of the 7th thin film transistor (TFT) Electrode potential is high level, so that opening the 8th thin film transistor (TFT) gives output electric discharge, to realize the driving for improving every grade of GOA unit Ability, optimization panel design, realize display product low-power consumption.
2. by the reduction output module of supplementary module, because capacitive coupling acts on two teams, it exports the interference impacted, It all can cascade and share a signal, realize the low cost, narrow frame, the demand of slimming of product.
Detailed description of the invention
Fig. 1 is an a kind of functional block diagram of a driving unit of GOA driving circuit of the embodiment of the present invention;
Fig. 2 is a line map of the driving unit in a kind of GOA driving circuit of the present invention;
Fig. 3 is a timing variation diagram of the invention;
Main element symbol description
Pull up control module 10 Pull-down control module 20 Global control module 30
Supplementary module 40 Output module 60 Reseting module 110
The present invention that the following detailed description will be further explained with reference to the above drawings.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other Embodiment shall fall within the protection scope of the present invention.
It should be noted that the term used in embodiments of the present invention is only merely for the mesh of description specific embodiment , it is not intended to limit the invention." the one of the embodiment of the present invention and singular used in the attached claims Kind ", " described " and "the" are also intended to including most forms, unless the context clearly indicates other meaning.It is also understood that this Term "and/or" used herein refers to and includes one or more associated any or all possible group for listing project It closes.
Term " includes " in description and claims of this specification and above-mentioned attached drawing and " having " and they appoint What is deformed, it is intended that is covered and non-exclusive is included.Such as contain the process, method, system, production of a series of steps or units Product or equipment are not limited to listed step or unit, but optionally further comprising the step of not listing or unit, or Optionally further comprising other step or units intrinsic for these process, methods, product or equipment.
It should be noted that the embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, In which the same or similar labels are throughly indicated same or similar element or elements with the same or similar functions.Under Face is exemplary by reference to the embodiment that attached drawing describes, and for explaining only the invention, and cannot be construed to of the invention Limitation.
Following disclosure provides many different embodiments or example is used to realize different structure of the invention.For letter Change disclosure of the invention, hereinafter the component of specific examples and setting are described.Certainly, they are merely examples, and It is not intended to limit the present invention.In addition, the present invention can in different examples repeat reference numerals and/or letter.It is this heavy It is for purposes of simplicity and clarity, itself not indicate the relationship between discussed various embodiments and/or setting again.
Referring to Fig. 1, being a kind of the functional block diagram of GOA driving unit provided in an embodiment of the present invention, such as Fig. 1 Shown, the GOA driving unit in the embodiment of the present invention comprises the following modules: pull-up control module 10, pull-down control module 20, complete Office's control module 30, supplementary module 40, reseting module 50 and output module 60.
Wherein, the pull-up control module 10 is electric with the pull-down control module 20, the global control module 30 respectively Connection, the supplementary module 40 are electrically connected with the global control module 30, the reseting module 50 respectively, the output module 60 are electrically connected with the global control module 30, the reseting module 50 respectively.The pull-up control module 10 is for pulling up institute Global control module 30 is stated, the pull-down control module 20 is for pulling down the global control module 30, the output module 60 For the output end outputs level signals to n-th grade of GOA driving unit, the auxiliary unit 40 for reducing output module electricity Hold coupling, the reseting module 50 is used to drag down the output signal that the output smears out 60.
As can be seen that the GOA driving circuit in technical solution of the embodiment of the present invention, wherein GOA driving unit at different levels includes Pull up control module, pull-down control module, global control module, supplementary module, reseting module and output module.
Referring to Fig. 2, for a kind of line map of the GOA driving circuit provided in the embodiment of the present invention.
Each circuit module is specifically introduced below.
The pull-up control module 10 includes first film transistor M1, and the drain electrode of the first film transistor M1 connects Enter forward scan signal U2D, grid accesses the output signal G (n-1) of (n-1)th grade of GOA driving unit, source electrode and the global control Molding block 30 is electrically connected.
The pull-down control module 20 includes the second thin film transistor (TFT) M2, and the grid of the second thin film transistor (TFT) M2 connects Enter the output signal G (n+1) of (n+1)th grade of GOA driving unit, drain electrode access direction scanning signal D2U, source electrode connects the overall situation Control module 30.
The global control module 30 includes the 4th thin film transistor (TFT) M4, the grid point of the 4th thin film transistor (TFT) M4 It is not electrically connected with the source electrode of the first film transistor M1, the source electrode of the second thin film transistor (TFT) M2 and the output module 60, Drain electrode is electrically connected with the supplementary module 40, and source electrode accesses the end VGL.
The supplementary module 40 includes the 5th thin film transistor (TFT) M5, the 6th thin film transistor (TFT) M6 and the 7th thin film transistor (TFT) The grid of M7, the 5th thin film transistor (TFT) M5 accesses second clock signal CLK2, and respectively with drain electrode and described 6th thin The drain electrode of film transistor M6 is electrically connected, and source electrode is electrically connected with the grid of the 6th thin film transistor (TFT) M6.6th film is brilliant The drain electrode of the source electrode of body pipe M6 and the 4th thin film transistor (TFT) M4, the grid of the 7th thin film transistor (TFT) M7 and the reset Module 50 is electrically connected.The source electrode access end VGL of the 7th thin film transistor (TFT) M7 is simultaneously electrically connected with the reseting module 50, is drained Connect the grid of the 4th thin film transistor (TFT) M4.
The reseting module includes the 8th thin film transistor (TFT) M8, the grid of the 8th thin film transistor (TFT) M8 respectively with institute The grid electrical connection of the source electrode, the 7th thin film transistor (TFT) M7 of the 6th thin film transistor (TFT) M6 is stated, source electrode accesses the end VGL, drain electrode It connects output end G (n).
The output module 60 includes third thin film transistor (TFT) M3 and capacitor C, the leakage of the third thin film transistor (TFT) M3 The first clock signal clk is accessed in pole, grid respectively with the source electrode of the first film transistor M1, the second thin film transistor (TFT) M2 The first end of the grid and the capacitor C of source electrode and the 4th thin film transistor (TFT) M4 is electrically connected, and the of source electrode and the capacitor C The electrical connection of two ends, and access the output end G (n) of n-th grade of GOA driving unit.
Wherein, source electrode, the second film crystal of the grid of the 4th thin film transistor (TFT) M4 and the first film transistor M1 The tie point of the source electrode of pipe M2 is set as A point, and the source electrode of the 6th thin film transistor (TFT) M6 is with the 7th thin film transistor (TFT) M7's The grid of grid and the 8th thin film transistor (TFT) M8 are set as P point.
As shown in figure 3, being a timing variation diagram of the invention, concrete operating principle of the invention is said in conjunction with Fig. 2 and Fig. 3 It is bright as follows:
(n+1)th grade of GOA driving unit output signal of T1 moment is low level, and the second thin film transistor (TFT) M2 is closed;Pull-up control mould Output signal G(n-1 of the grid of the first film transistor M1 of block 10 by (n-1)th grade of GOA driving unit) high level signal drive Dynamic conducting, while the high level direct current signal of forward scan signal U2D is sent into third by the drain electrode of first film transistor M1 A point is become high potential, third thin film transistor (TFT) M3, the 4th by the grid A point of thin film transistor (TFT) M3, the 4th thin film transistor (TFT) M4 Thin film transistor (TFT) M4 conducting, capacitor C charging;By the 7th thin film transistor (TFT) M7, the 8th film after 4th thin film transistor (TFT) M4 opening The grid P point current potential of transistor M8 is pulled down to low level VGL, guarantees that the 7th thin film transistor (TFT) M7, the 8th thin film transistor (TFT) M8 are closed Close, do not make VGL signal by the drain electrode of the 7th thin film transistor (TFT) M7, the 8th thin film transistor (TFT) M8 to A point, G(n) current potential causes shadow It rings;High level leads the 5th thin film transistor (TFT) M5, the 6th thin film transistor (TFT) M6 of the supplementary module 40 to CLK2 signal before this It is logical, high level signal is sent into P point, is high potential, the 4th film crystal since A point passes through the pull-up control module 10 at this time P point current potential is pulled down to VGL by its drain electrode by pipe M4 conducting, as long as guaranteeing drain electrode electricity when the 4th thin film transistor (TFT) M4 conducting Stream is better than drain current when the 6th thin film transistor (TFT) M6 conducting, that is, can guarantee that P point is low potential;T1 second half section at moment CLK2 is Low level signal, the 5th thin film transistor (TFT) M5, the 6th thin film transistor (TFT) M6 gate off, on P point current potential substantially without influence;As above Described, third thin film transistor (TFT) M3 is connected at this time, and the low level signal of CLK is sent into n-th grade of output end G(n by drain electrode), the The output signal G(n of n grades of GOA driving units) it is low level.
T2 moment, the output signal G(n-1 of (n-1)th grade of GOA driving unit) it is low level signal, (n+1)th grade of GOA driving Element output signal G(n+1) it is low level signal, first film transistor M1, the second thin film transistor (TFT) M2 are closed;CLK2 letter The 5th thin film transistor (TFT) M5, the 6th thin film transistor (TFT) M6 of the supplementary module 40 was connected in high level number before this, by high level Signal is sent into P point, since capacitor C charges at the T1 moment, can be maintained the high potential of A point, the 4th thin film transistor (TFT) M4 conducting is led to It crosses its drain electrode and P point current potential is pulled down to VGL, as long as to be better than the 6th thin for the drain current for guaranteeing when the 4th thin film transistor (TFT) M4 conducting Drain current when film transistor M6 is connected can guarantee that P point is low potential;T1 second half section at moment CLK2 is low level signal, 5th thin film transistor (TFT) M5, the 6th thin film transistor (TFT) M6 gate off, on P point current potential substantially without influence;CLK signal becomes high electricity Ordinary mail number, since capacitive coupling effect is further pulled up A point current potential, such as above-mentioned A point is high potential, and third thin film transistor (TFT) M3 is led Logical, CLK high level signal is sent into G(n), the output signal G(n of n-th grade of GOA driving unit at this time) it is high level.
T3 moment, the output signal G(n-1 of (n-1)th grade of GOA driving unit) it is low level signal, (n+1)th grade of GOA driving Element output signal G(n+1) it is high level signal, first film transistor M1 is closed, the second thin film transistor (TFT) M2 is connected, reversely The low level direct current signal of scanning signal D2U is sent by the drain electrode of the second thin film transistor (TFT) M2 of the pull-down control module 20 The grid A point of the third thin film transistor (TFT) M3 of the global control module 30, the 4th thin film transistor (TFT) M4, become low electricity for A point Position, third thin film transistor (TFT) M3, the 4th thin film transistor (TFT) M4 are closed, capacitor C electric discharge;CLK2 signal before this high level made it is described The 5th thin film transistor (TFT) M5, the 6th thin film transistor (TFT) M6 of supplementary module 40 are connected, and high level signal are sent into P point, due to this When A point by pull-down control module 20 be low potential, the 4th thin film transistor (TFT) M4 is closed, and P point maintains high potential, and the 7th film is brilliant VGL low level signal is sent into G(n by the drain electrode of body pipe M7, the 8th thin film transistor (TFT) M8 conducting, the 8th thin film transistor (TFT) M8), it will G(n) current potential drags down, at this point, the output signal G(n of n-th grade of GOA driving unit) it is low level.
After the T3 moment, due to the output signal G(n-1 of (n-1)th grade of GOA driving unit) it is always low level, first is thin Film transistor M1 is closed always, and high level direct current signal U2D cannot be sent into A point by the pull-up control module 10, and A point remains low Current potential, third thin film transistor (TFT) M3, the 4th thin film transistor (TFT) M4 are closed always, and third thin film transistor (TFT) M3 cannot be by CLK signal It is sent into G(n), VGL signal cannot be sent into P point by the 4th thin film transistor (TFT) M4;Low and high level alternately changes CLK2 signal always, When CLK is in high level, the 5th thin film transistor (TFT) M5, the 6th thin film transistor (TFT) M6 of the supplementary module 40 are connected, will High level signal is sent into P point, and since A point is low potential always, the 4th thin film transistor (TFT) M4 is closed, P point maintenance high potential, and the 7th VGL low level signal is sent into G by the drain electrode of thin film transistor (TFT) M7, the 8th thin film transistor (TFT) M8 conducting, the 8th thin film transistor (TFT) M8 (n), G(n) current potential is dragged down, the output signal G(n of n-th grade of GOA driving unit) low level will be exported always.
After the T3 moment, when it is high level that CLK signal is by low level jump, since capacitive coupling acts on, CLK signal Jump can be to A point and G(n by the parasitic capacitance of third thin film transistor (TFT) M3 itself) there is one to draw high effect so that GOA is mono- First output signal G(n) low potential cannot be maintained well after the T2 moment, it may cause the wind that TFT in pixel has electric leakage Danger generates display bad phenomenon.This patent passes through the CLK2 signal and supplementary module for increasing by 2 times of output signal CLK of frequency, Can continue to A point and G(n) drop-down, to GOA unit output signal G when CLK signal is jumped by low level as high level (n) coupled interference generated effectively reduces, and improves the driving capability of every grade of GOA unit, guarantees the work of GOA circuit stability.
The present invention have it is following the utility model has the advantages that
The present invention adjusts separately the width of the 4th thin film transistor (TFT) M4 and the 7th thin film transistor (TFT) M7 two by Design assistant module Long ratio, the mutual containing of Lai Shixian A point current potential and P point current potential reach when the GOA driving unit need to export high level, A point electricity Position inhibits P point current potential, keeps P point current potential low, prevents the 8th thin film transistor (TFT) M8 from opening and discharges to output.When the GOA drives list When member need to export low level, P point current potential inhibits A point current potential, and P point is high level, to open the 8th thin film transistor (TFT) M8 to defeated It discharges out, thus realize the driving capability for improving every grade of GOA driving unit, optimization panel design, realization display product low-power consumption, Low cost, narrow frame, the demand of slimming.

Claims (8)

1. a kind of GOA driving circuit, it is characterised in that: the GOA driving circuit includes multistage GOA driving unit, and n-th grade GOA driving unit includes pull-up control module, pull-down control module, global control module, supplementary module, reseting module and defeated Module out, the pull-up control module are electrically connected with the pull-down control module and the global control module, the auxiliary mould Block is electrically connected with the global control module and the reseting module, the output module and the global control module and described Reseting module electrical connection;
Wherein, the pull-up control module, for pulling up global control module;
The pull-down control module, for pulling down global control module;
The output module, for exporting low level signal to the output end of n-th grade of GOA driving unit;
The auxiliary unit, for reducing the capacitive coupling of output module;
The reseting module, for dragging down the output signal of output module.
2. a kind of GOA driving circuit according to claim 1, it is characterised in that: the pull-up control module includes One thin film transistor (TFT), the drain electrode of the first film transistor access forward scan signal, and grid accesses (n-1)th grade of GOA driving The output signal G (n-1) of unit, source electrode are electrically connected with the global control module.
3. a kind of GOA driving circuit according to claim 2, it is characterised in that: the pull-down control module includes Two thin film transistor (TFT)s, the grid of second thin film transistor (TFT) access the output signal G (n+1) of (n+1)th grade of GOA driving unit, Drain electrode access direction scanning signal, source electrode connect the global control module.
4. a kind of GOA driving circuit according to claim 3, it is characterised in that: the global control module includes Four thin film transistor (TFT)s, the grid of the 4th thin film transistor (TFT) respectively with the source electrode of the first film transistor, the second film The source electrode of transistor and output module electrical connection, drain electrode are electrically connected with the supplementary module, and source electrode accesses the end VGL.
5. a kind of GOA driving circuit according to claim 4, it is characterised in that: the supplementary module includes the 5th thin The grid of film transistor, the 6th thin film transistor (TFT) and the 7th thin film transistor (TFT), the 5th thin film transistor (TFT) accesses second clock Signal, and be electrically connected respectively with drain electrode and the drain electrode of the 6th thin film transistor (TFT), source electrode and the 6th thin film transistor (TFT) Grid electrical connection, the drain electrode of the source electrode of the 6th thin film transistor (TFT) and the 4th thin film transistor (TFT), the 7th film The grid of transistor and reseting module electrical connection;7th thin film transistor (TFT) source electrode access the end VGL and with it is described multiple Position module electrical connection, drain electrode connect the grid of the 4th thin film transistor (TFT).
6. a kind of GOA driving circuit according to claim 5, it is characterised in that: the reseting module includes the 8th thin Film transistor, the grid of the 8th thin film transistor (TFT) respectively with the source electrode of the 6th thin film transistor (TFT), the 7th film The grid of transistor is electrically connected, and source electrode accesses the end VGL, the output end G (n) of drain electrode n-th grade of GOA driving unit of connection.
7. a kind of GOA driving circuit according to claim 6, it is characterised in that: the output module includes that third film is brilliant Body pipe and capacitor, the drain electrode of the third thin film transistor (TFT) access the first clock signal, and grid is brilliant with the first film respectively The first end electricity of the source electrode of body pipe, the grid of the source electrode of the second thin film transistor (TFT) and the 4th thin film transistor (TFT) and the capacitor Connection, source electrode are electrically connected with the second end of the capacitor, and access the output end G (n) of n-th grade of GOA driving unit.
8. a kind of GOA driving circuit according to claim 7, it is characterised in that: when the second clock signal frequency is first One times of clock signal frequency.
CN201810955301.8A 2018-08-21 2018-08-21 A kind of GOA driving circuit Pending CN109859698A (en)

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CN112037728A (en) * 2020-09-22 2020-12-04 成都中电熊猫显示科技有限公司 Gate driving unit, gate scanning driving circuit and liquid crystal display device
CN112289251A (en) * 2020-11-02 2021-01-29 武汉华星光电技术有限公司 GOA circuit and display panel
CN114333701A (en) * 2022-01-10 2022-04-12 信利(仁寿)高端显示科技有限公司 Grid driving circuit and method

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CN103208263A (en) * 2013-03-14 2013-07-17 京东方科技集团股份有限公司 Shift register, display device, gate drive circuit and driving method
CN104318908A (en) * 2014-10-22 2015-01-28 友达光电股份有限公司 Gate drive circuit capable of enhancing circuit drive ability
CN104934011A (en) * 2015-07-20 2015-09-23 合肥京东方光电科技有限公司 Shifting register unit, gate drive circuit and display device
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Cited By (4)

* Cited by examiner, † Cited by third party
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CN112037728A (en) * 2020-09-22 2020-12-04 成都中电熊猫显示科技有限公司 Gate driving unit, gate scanning driving circuit and liquid crystal display device
CN112289251A (en) * 2020-11-02 2021-01-29 武汉华星光电技术有限公司 GOA circuit and display panel
CN112289251B (en) * 2020-11-02 2022-10-04 武汉华星光电技术有限公司 GOA circuit and display panel
CN114333701A (en) * 2022-01-10 2022-04-12 信利(仁寿)高端显示科技有限公司 Grid driving circuit and method

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