CN109831207B - Multi-site testing method integrating SAR ADC and SD ADC - Google Patents

Multi-site testing method integrating SAR ADC and SD ADC Download PDF

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CN109831207B
CN109831207B CN201910079853.1A CN201910079853A CN109831207B CN 109831207 B CN109831207 B CN 109831207B CN 201910079853 A CN201910079853 A CN 201910079853A CN 109831207 B CN109831207 B CN 109831207B
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CN109831207A (en
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李高祥
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Chipsea Technologies Shenzhen Co Ltd
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Chipsea Technologies Shenzhen Co Ltd
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Abstract

The invention is suitable for the technical field of SD ADC and SAR ADC test, and provides a multi-site test method integrating an SAR ADC and an SD ADC, which comprises the following steps: python configures registers of a plurality of chips to be tested through a serial port, and initializes SAR ADC and SD ADC; when the SD ADC is measured, the Python sends an instruction to the main control chip through the serial port to configure different voltage acquisition chips, and respectively and correspondingly acquires the reference voltages of a plurality of chips to be measured; when testing the SAR-ADC, the Python configures registers of a plurality of chips to be tested through serial ports, and configures the reference voltages of the chips to be tested as V1; the SAR ADC and the SD ADC can be conveniently, quickly and flexibly tested by the testing method, the number of chips to be tested can be flexibly expanded, and the measured data is automatically recorded, analyzed and stored, so that the working efficiency is improved.

Description

Multi-site testing method integrating SAR ADC and SD ADC
Technical Field
The invention belongs to the technical field of SD ADC and SAR ADC test, and particularly relates to a multi-site test method integrating an SAR ADC and an SD ADC.
Background
At present, in the measurement field of high-precision SD-ADC (analog-to-digital converter for converting acquired audio signals into digital signals) and high-altitude SAR-ADC (successive approximation type analog-to-digital converter), the test of multi-site SAR ADC and SD ADC cannot be integrated on one system, so that the purpose of improving efficiency is achieved.
Disclosure of Invention
The invention aims to provide a multi-site testing method integrating an SAR ADC and an SD ADC, and aims to solve the problem that the prior art cannot provide a multi-site testing method integrating the SAR ADC and the SD ADC so as to achieve the aim of improving efficiency.
The invention provides a multi-site testing method integrating an SAR ADC and an SD ADC, which comprises the following steps:
firstly, the Python configures registers of a plurality of chips to be tested through serial ports, and initializes the SAR ADC and the SD ADC.
Secondly, measuring the SD ADC and the Python, sending an instruction to a main control chip through a serial port to configure different voltage acquisition chips, and respectively and correspondingly acquiring the reference voltages of a plurality of chips to be detected;
and the Python creates a plurality of data storage files and correspondingly stores a plurality of reference voltage values of the chip to be tested.
And thirdly, reading the configuration file, and sequentially testing the configurations under different label names in the configuration file according to the sequence.
And fourthly, judging the chips to be detected, initializing the SD ADC through a serial port if the chips to be detected are the first chips to be detected, reading the configuration file to configure the corresponding register, sending an instruction for reading the conversion code value of the SD ADC after the configuration is finished, and setting the configuration reading number to be K.
And fifthly, after the SD ADC of the chip to be tested is converted, the chip to be tested sends the converted code value to Python through the serial port, and the Python records corresponding data.
And sixthly, judging whether the number of the read data transmitted by the chip to be tested reaches K by Python, if not, returning to the third step to the fifth step, and ending the configuration test until the number of the read data transmitted by the chip to be tested reaches K by Python judgment.
Seventhly, after the configuration test is finished, the Python stores the created data and the analysis result in the corresponding folder A; and can also generate a histogram and a scatter diagram through Python;
and repeating the third step to the sixth step until the configuration under all different label names in the configuration file is completely tested.
And step eight, testing the SAR-ADC and Python, configuring registers of a plurality of chips to be tested through serial ports, and configuring the reference voltages of the chips to be tested into V1.
Ninth, after the configuration is finished, a serial port sends a command for reading and testing the SAR ADC, and after the command is finished, the main control chip controls the DACs to enable the output voltages of the DACs to be sequentially from 0 to V1 volts, the middle of the DAC comprises a plurality of adjusting gears, and one adjusting gear is 250 microvolts; the main control chip reads the SAR ADC conversion code value sent by the chips to be tested through the serial port and sends the SAR ADC conversion code value to the Python script through the serial port of the main control chip.
And tenth, repeating the ninth step until all the voltage gear tests are completed, recording data by Python, automatically analyzing results, storing the results into the created configuration files, closing all the created files by the Python, and exiting the test.
The invention has the beneficial effects that: the SAR ADC and the SD ADC can be conveniently, quickly and flexibly measured by the measuring method, the number of chips to be measured can be flexibly expanded, and the measured data is automatically recorded, analyzed and stored, so that the working efficiency is improved.
Drawings
Fig. 1 is a test flow of an SD ADC of a multi-site test method integrating an SAR ADC and the SD ADC according to an embodiment of the present invention;
fig. 2 is a test flow of the SAR ADC according to the multi-site test method for integrating the SAR ADC and the SD ADC provided in the embodiment of the present invention;
fig. 3 is a Python script data processing flow of the multi-site testing method for integrating the SAR ADC and the SD ADC according to the embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The following detailed description of specific implementations of the present invention is provided in conjunction with specific embodiments:
fig. 1 shows a preferred embodiment of the present invention, and fig. 2 to 3 show only the relevant parts of the embodiment of the present invention for convenience of description, and the following detailed description is provided:
firstly, the Python configures registers of a plurality of chips to be tested through serial ports, and initializes the SAR ADC and the SD ADC.
Secondly, measuring the SD ADC and the Python, sending an instruction to a main control chip through a serial port to configure different voltage acquisition chips, and respectively and correspondingly acquiring the reference voltages of a plurality of chips to be detected;
the Python creates a plurality of data storage files and correspondingly stores the reference voltage values of a plurality of chips to be tested.
And thirdly, reading the configuration file, and sequentially testing the configurations under different label names in the configuration file according to the sequence.
And fourthly, judging the number of the chips to be detected, initializing the SD ADC through a serial port if the chips to be detected are the first chips to be detected, reading the configuration file to configure the corresponding register, sending an instruction for reading the conversion code value of the SD ADC after the configuration is finished, and setting the number of configuration reading to be K.
And fifthly, after the SD ADC of the chip to be tested is converted, the chip to be tested sends the converted code value to Python through the serial port, and the Python records corresponding data.
And sixthly, judging whether the number of the read data transmitted by the chip to be tested reaches K by Python, if not, returning to the third step to the fifth step, and ending the configuration test until the number of the read data transmitted by the chip to be tested reaches K by Python judgment.
Seventhly, after the configuration test is finished, the Python stores the created data and the analysis result in the corresponding folder A; and can also generate a histogram and a scatter diagram through Python;
and repeating the third step to the sixth step until the configuration under all different label names in the configuration file is completely tested.
And step eight, testing the SAR-ADC and Python, configuring registers of a plurality of chips to be tested through serial ports, and configuring the reference voltages of the chips to be tested into V1.
Ninth, after the configuration is finished, the serial port sends a command for reading and testing the SAR ADC, and after the command is finished, the main control chip controls the DACs to enable the output voltages of the DACs to be sequentially from 0 to V1 volts, the middle of the DAC comprises a plurality of adjusting gears, and one adjusting gear is 250 microvolts; the main control chip reads SAR ADC conversion code values sent by the chips to be tested through the serial port and sends the SAR ADC conversion code values to the Python script through the serial port of the main control chip.
And tenth, repeating the ninth step until all the voltage gear tests are completed, recording data by Python, automatically analyzing results, storing the results into the created configuration files, closing all the created files by the Python, and exiting the test.
It should be noted that: the technical scheme of the invention is applied to the performance test of SAR ADC and SD ADC needing to measure a plurality of SITEs, and has expandability, because the communication mode uses the analog serial port for communication, the expanded digital-analog to be tested is related to the number of the analog serial ports, if the analog serial ports have N pairs, N chips can be tested in series;
in order to solve the technical problem, the method outputs the signal quantity at the same side of multiple SITEs of the SAR ADC at will, supports the coexistence of a single-ended mode and a differential mode, and can adjust the differential signal quantity output by each path at will when multiple paths of excitation sources provided outside the SD ADC are output at the same time, and the reference voltage of the chip to be tested is related.
The method adopts Python script processing, reads data through a serial port, and realizes automatic creation of a storage file and automatic storage and analysis of data through numpy, XML, matplotlib, struct and other function modules.
Meanwhile, in order to explain the multi-site testing method integrating the SAR ADC and the SD ADC more intuitively, the testing process of the SD ADC is shown in fig. 1, the testing process of the SAR ADC is shown in fig. 2, and the Python script data processing process is shown in fig. 3.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims (1)

1. A multi-site testing method for integrating SAR ADC and SD ADC is characterized by comprising the following steps:
firstly, python configures registers of a plurality of chips to be tested through serial ports, and initializes SAR ADC and SD ADC;
secondly, measuring the SD ADC and the Python, sending an instruction to a main control chip through a serial port to configure different voltage acquisition chips, and respectively and correspondingly acquiring the reference voltages of a plurality of chips to be detected;
the Python creates a plurality of data storage files and correspondingly stores the reference voltage values of the chips to be tested;
reading the configuration file, and sequentially testing the configurations under different label names in the configuration file according to the sequence;
fourthly, judging the chips to be detected, initializing the SD ADC through a serial port if the chips to be detected are the first chips to be detected, reading a configuration file to configure a corresponding register, sending an instruction for reading the conversion code value of the SD ADC after the configuration is finished, and setting the configuration reading number to be K;
fifthly, after the SD ADC of the chip to be tested is converted, the chip to be tested sends the converted code value to Python through a serial port, and the Python records corresponding data;
sixthly, judging whether the number of the read data transmitted by the chip to be tested reaches K by Python, if not, returning to the third step to the fifth step, and ending the configuration test until the number of the read data transmitted by the chip to be tested reaches K by Python judgment;
seventhly, after the configuration test is finished, the Python stores the created data and the analysis result in the corresponding folder A; and can also generate a histogram and a scatter diagram through Python;
repeating the third step to the sixth step until the configuration under all different label names in the configuration file is completely tested;
eighthly, testing the SAR ADC and the Python, configuring registers of a plurality of chips to be tested through serial ports, and configuring the reference voltages of the chips to be tested to be V1;
ninth, after the configuration is finished, a serial port sends a command for reading and testing the SAR ADC, and after the command is finished, the main control chip controls the DACs to enable the output voltages of the DACs to be sequentially from 0 to V1 volts, the middle of the DAC comprises a plurality of adjusting gears, and one adjusting gear is 250 microvolts; the main control chip reads the SAR ADC conversion code values sent by the chips to be tested through the serial ports and sends the SAR ADC conversion code values to a Python script through the serial ports of the main control chip;
and tenth, repeating the ninth step until all the voltage gear tests are completed, recording data by Python, automatically analyzing results, storing the results into the created configuration files, closing all the created files by the Python, and exiting the test.
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US8477052B2 (en) * 2011-04-05 2013-07-02 Freescale Semiconductor, Inc. Method and apparatus for self-test of successive approximation register (SAR) A/D converter
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