CN109830484A - A kind of novel soi structure and its manufacture craft - Google Patents
A kind of novel soi structure and its manufacture craft Download PDFInfo
- Publication number
- CN109830484A CN109830484A CN201910081269.XA CN201910081269A CN109830484A CN 109830484 A CN109830484 A CN 109830484A CN 201910081269 A CN201910081269 A CN 201910081269A CN 109830484 A CN109830484 A CN 109830484A
- Authority
- CN
- China
- Prior art keywords
- layer
- silicon
- boron nitride
- soi structure
- silicon wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
The invention discloses a kind of novel soi structure and its manufacture crafts.The present invention includes the top layer silicon being from top to bottom arranged successively, insulating layer, backing bottom, it is characterized in that, insulating layer is mainly made of silicon dioxide layer and boron nitride layer two-layer composite, top layer silicon includes the first silicon wafer layer, backing bottom is mainly combined by the silicon layer and the second silicon wafer layer hot key that sputter, silicon dioxide layer upper surface is the first silicon wafer layer, and boron nitride layer lower surface is silicon layer.Present invention improves the heat dissipation performances of conventional SOI structure, the heat-sinking capability of insulating layer can be improved under conditions of not influencing its insulation performance, so as to improve the heat dissipation performance based on SOI device.
Description
Technical field
The present invention relates to semiconductor SOI technical fields, and in particular to a kind of soi structure of good heat dispersion performance and its production
Technique.
Background technique
SOI (Silicon-On-Insulator, the silicon in insulating substrate) technology is drawn between top layer silicon and backing bottom
A layer insulating is entered.By forming semiconductive thin film on insulator, SOI material is provided with incomparable excellent of body silicon
Point: the medium isolation of component in integrated circuit may be implemented, completely eliminate the parasitic latch-up in Bulk CMOS circuit；
Also have that parasitic capacitance is small, integration density is high, speed is fast, simple process, short channel using integrated circuit made of this material
Effect is small and especially suitable for advantages such as low voltage and low power circuits, it can be said that SOI would be possible to as the low of deep-submicron
Pressure, the mainstream technology of low power consumption integrated circuit, into practical stage.But due to the silicon dioxide insulating layer of low-thermal conductivity
Caused self-heating effect causes the channel current of device to decline the formation etc. with negative differential resistance, leads to answering for SOI technology
With being subject to certain restrictions.Thus, how to overcome self-heating effect, becomes the new issue of SOI material and device research.
Summary of the invention
In order to solve the problems in background technique, the present invention provides a kind of novel soi structure and its manufacture crafts, to have
Effect inhibits self-heating effect, improves device heat dissipation performance.
Since soi structure is exactly to have more an insulating layer on the basis of bulk silicon technological, so that the heat to shed from substrate portions
Amount greatly reduces.Replace silica simultaneously using the insulating materials of high thermoconductivity does not influence the interface of film interface combination again
Performance is the effective ways for solving SOI weak heat-dissipating.The present invention will change the material and structure of buried layer oxide layer, using special
Structure and manufacturing process improve the heat dissipation performance of soi structure under the premise of not influencing film performance.
The technical solution adopted by the invention is as follows:
One, a kind of novel soi structure
Including be from top to bottom arranged successively top layer silicon, composite insulation layer, backing bottom, the composite insulation layer is mainly by two
Silicon oxide layer and boron nitride layer two-layer composite composition, top layer silicon include the first silicon wafer layer, and backing bottom is mainly by silicon layer and the
Two silicon wafer layers composition, silicon dioxide layer upper surface are the first silicon wafer layer, and boron nitride layer lower surface is silicon layer.
The silicon dioxide layer with a thickness of 10nm, in the case where this thickness, even if the thermal conductivity of silica is very low
Heat dissipation performance will not be impacted.Silicon dioxide layer primarily serves the interfacial bonding property improved between insulating layer and top layer silicon
The effect of energy.
The boron nitride layer with a thickness of 700nm, main insulating effect is played, since boron nitride has good insulating properties
It can be conducive to radiate so that the thermal resistance of insulating layer substantially reduces with very high pyroconductivity.
The backing bottom is mainly formed by silicon layer and the second silicon wafer layer thermal bonding.
The boron nitride layer using boron nitride or other have dielectric constant close with boron nitride/identical and pyroconductivity
Material.The boron nitride pellicle relative dielectric constant prepared in the present invention is 4, and thermal coefficient is about 360W/ (mK).
Two, a kind of manufacture craft of novel soi structure
The following steps are included:
1) layer of silicon dioxide film is sputtered as silicon dioxide layer in the first silicon wafer layer surface using radio frequency sputtering method；
2) one layer of boron nitride pellicle is sputtered as boron nitride layer in the silica layer surface of step 1)；
3) one layer of silicon thin film is sputtered as silicon layer in the boron nitride layer surface of step 2)；
4) silicon surface for obtaining step 3) is polished, then by the silicon layer and the second silicon wafer layer hot key after polishing
It closes, obtains inverted soi structure；
5) the inverted soi structure of step 4) is rotated 180 °, then thins the first silicon wafer layer upper surface as top layer silicon,
Finally obtain required novel soi structure.
The boron nitride layer of the step 2) is prepared using boron nitride.
The silicon dioxide layer of the step 1) with a thickness of 10nm.
The boron nitride layer of the step 2) with a thickness of 700nm.
The polishing of the step 3) and thinning for step 5) are all made of chemical mechanical polishing method.
The beneficial effects of the present invention are:
1) composite insulation layer of the invention replaces traditional titanium dioxide using boron nitride (BN) and silica composite construction
Silicon insulating layer, effectively inhibits self-heating effect, can improve the heat radiation energy of oxide layer under conditions of not influencing its insulation performance
Power, so as to improve the heat dissipation performance based on soi structure device.
2) present invention is different from traditional soi structure manufacturing process, and the present invention uses inverted preparation method in the preparation,
It is first sequentially prepared top layer silicon, composite insulation layer, backing bottom, is finally overturn, using such special manufacturing process, is improved
The heat dissipation performance of soi structure.
Detailed description of the invention
Fig. 1 is the sectional view of soi structure of the present invention；
Fig. 2 is the structure chart of step 1 of the embodiment of the present invention；
Fig. 3 is the structure chart of step 2 of the embodiment of the present invention；
Fig. 4 is the structure chart of step 3 of the embodiment of the present invention；
Fig. 5 is the structure chart of step 4 of the embodiment of the present invention；
Fig. 6 is the structure chart of step 5 of the embodiment of the present invention.
In figure: the first silicon wafer layer (1), silicon dioxide layer (2), boron nitride layer (3), silicon layer (4), the second silicon wafer layer (5).
Specific embodiment
Invention is further described in detail with reference to the accompanying drawings and embodiments.
As shown in Figure 1, the present invention includes the top layer silicon being from top to bottom arranged successively, buried layer oxide layer, backing bottom, buried layer oxygen
Change layer to be mainly made of silicon dioxide layer 2 and 3 two-layer composite of boron nitride layer, top layer silicon includes the first silicon wafer layer 1, backing bottom
It is mainly made of silicon layer 4 and the second silicon wafer layer 5,2 upper surface of silicon dioxide layer is the first silicon wafer layer 1, and 3 lower surface of boron nitride layer is
Silicon layer 4.
Embodiment:
Manufacture craft of the invention the following steps are included:
1) as shown in Fig. 2, sputtering one layer on 1 surface of the first silicon wafer layer using radio frequency sputtering method is about that 10nm silica is thin
Film is as silicon dioxide layer 2；
2) as shown in figure 3, making in the boron nitride pellicle that 2 surface of silicon dioxide layer of step 1 sputters one layer of about 700nm thickness
For boron nitride layer 3；
3) as shown in figure 4, sputtering the silicon of one layer of 1 μm of left and right thickness as silicon layer 4 in 3 surface of boron nitride layer of step 2；
4) it as shown in figure 5, being polished in 4 surface of silicon layer that step 3 obtains using chemical mechanical polishing method, then will beat
5 thermal bonding of silicon layer 4 and the second silicon wafer layer after mill, obtains inverted soi structure；
5) as shown in fig. 6, the inverted soi structure of step 4 is rotated 180 °, then by 1 upper surface of the first silicon wafer layer
It learns after mechanical polishing (CMP) thins as top layer silicon, finally obtains required novel soi structure.
In manufacture craft as described above, the first silicon wafer and the second silicon wafer use 4 cun of wafers cutting with a thickness of 0.520mm
It is made.
Traditional SOI substrate insulating layer uses earth silicon material, and silica is the non-conductor of heat, and thermal coefficient is about
For 1.39W/ (mK).The boron nitride insulating layer thermal coefficient that the present invention uses for 360W/ (mK), about the 260 of silica times,
Substantially increase the heat-sinking capability of SOI substrate.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (9)
1. a kind of novel soi structure, including be from top to bottom arranged successively top layer silicon, insulating layer, backing bottom, which is characterized in that
The insulating layer is composite insulation layer, and composite insulation layer is mainly by silicon dioxide layer (2) and boron nitride layer (3) two-layer compound knot
Structure composition, top layer silicon are mainly made of the first silicon wafer layer (1), and backing bottom is mainly made of silicon layer (4) and the second silicon wafer layer (5),
Silicon dioxide layer (2) upper surface is the first silicon wafer layer (1), and boron nitride layer (3) lower surface is silicon layer (4).
2. novel soi structure according to claim 1, which is characterized in that the silicon dioxide layer (2) with a thickness of
10nm。
3. novel soi structure according to claim 1, which is characterized in that the boron nitride layer (3) with a thickness of 700nm.
4. novel soi structure according to claim 1, which is characterized in that the backing bottom is mainly by silicon layer (4) and second
Silicon wafer layer (5) thermal bonding forms.
5. novel soi structure according to claim 1, which is characterized in that the boron nitride layer (3) using boron nitride or its
He has the material of dielectric constant and pyroconductivity close with boron nitride/identical.
6. a kind of manufacture craft of novel soi structure according to any one of claims 1 to 4, which is characterized in that including following
Step:
1) layer of silicon dioxide is sputtered as silicon dioxide layer (2) on the first silicon wafer layer (1) surface using radio frequency sputtering method；
2) one layer of boron nitride is sputtered as boron nitride layer (3) in the silicon dioxide layer of step 1) (2) surface；
3) one layer of silicon is sputtered as silicon layer (4) in the boron nitride layer of step 2) (3) surface；
4) silicon layer (4) surface that step 3) obtains is polished, then by after polishing silicon layer (4) and the second silicon wafer layer (5)
Thermal bonding obtains inverted soi structure as the backing bottom in soi structure；
5) the inverted soi structure of step 4) is rotated 180 °, then thins the first silicon wafer layer (1) upper surface as top layer silicon,
Finally obtain required novel soi structure.
7. the manufacture craft of novel soi structure according to claim 6, it is characterised in that: the boron nitride of the step 2)
Layer (3) is prepared using boron nitride.
8. the manufacture craft of novel soi structure according to claim 6, it is characterised in that: the titanium dioxide of the step 1)
Silicon layer (2) with a thickness of 10nm, the boron nitride layer (3) of the step 2) with a thickness of 700nm.
9. the manufacture craft of novel soi structure according to claim 6, it is characterised in that: the polishing of the step 3) with
Thinning for step 5) is all made of chemical mechanical polishing method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910081269.XA CN109830484B (en) | 2019-01-28 | 2019-01-28 | SOI structure and manufacturing process thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910081269.XA CN109830484B (en) | 2019-01-28 | 2019-01-28 | SOI structure and manufacturing process thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109830484A true CN109830484A (en) | 2019-05-31 |
| CN109830484B CN109830484B (en) | 2020-10-16 |
Family
ID=66862713
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910081269.XA Active CN109830484B (en) | 2019-01-28 | 2019-01-28 | SOI structure and manufacturing process thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109830484B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111290148A (en) * | 2020-02-19 | 2020-06-16 | 联合微电子中心有限责任公司 | Method for manufacturing modulator with SiO2 substrate formed based on wafer bonding and modulator structure thereof |
| CN111649782A (en) * | 2020-07-28 | 2020-09-11 | 江苏睦荷科技有限公司 | Platform made of single-chip integrated multi-axis MEMS sensor and manufacturing method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101587902A (en) * | 2009-06-23 | 2009-11-25 | 吉林大学 | Silicon-on-nanometer-insulator material and preparing method thereof |
| CN102623387A (en) * | 2012-04-25 | 2012-08-01 | 上海新储集成电路有限公司 | Method for preparing silicon on insulator (SOI) material based on buried-layer nitride ceramic backing base |
| US20150243740A1 (en) * | 2014-02-24 | 2015-08-27 | International Business Machines Corporation | Boron rich nitride cap for total ionizing dose mitigation in soi devices |
| CN107004639A (en) * | 2014-07-08 | 2017-08-01 | 麻省理工学院 | Substrate manufacture method |
-
2019
- 2019-01-28 CN CN201910081269.XA patent/CN109830484B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101587902A (en) * | 2009-06-23 | 2009-11-25 | 吉林大学 | Silicon-on-nanometer-insulator material and preparing method thereof |
| CN102623387A (en) * | 2012-04-25 | 2012-08-01 | 上海新储集成电路有限公司 | Method for preparing silicon on insulator (SOI) material based on buried-layer nitride ceramic backing base |
| US20150243740A1 (en) * | 2014-02-24 | 2015-08-27 | International Business Machines Corporation | Boron rich nitride cap for total ionizing dose mitigation in soi devices |
| CN107004639A (en) * | 2014-07-08 | 2017-08-01 | 麻省理工学院 | Substrate manufacture method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111290148A (en) * | 2020-02-19 | 2020-06-16 | 联合微电子中心有限责任公司 | Method for manufacturing modulator with SiO2 substrate formed based on wafer bonding and modulator structure thereof |
| CN111649782A (en) * | 2020-07-28 | 2020-09-11 | 江苏睦荷科技有限公司 | Platform made of single-chip integrated multi-axis MEMS sensor and manufacturing method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109830484B (en) | 2020-10-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101208794B (en) | Silicon device on Si:C-OI and SGOI, and method of manufacture | |
| US6770507B2 (en) | Semiconductor wafer and method for producing the same | |
| US6297128B1 (en) | Process for manufacturing shallow trenches filled with dielectric material having low mechanical stress | |
| US6627519B2 (en) | Method of manufacturing an SOI (silicon on insulator) wafer | |
| US10748989B2 (en) | Insulating layer structure for semiconductor product, and preparation method of insulating layer structure | |
| US9142448B2 (en) | Method of producing a silicon-on-insulator article | |
| TW200929436A (en) | Semiconductor device and method of manufacturing the same | |
| US20090224369A1 (en) | IC Substrate and Method of Manufacture of IC Substrate | |
| CN101110428A (en) | Multi-layer insulator silicon material used for MEMS and method thereof | |
| CN109830484A (en) | A kind of novel soi structure and its manufacture craft | |
| CN1564308A (en) | Upper silicon structure of insulation layer and its prepn. method | |
| US10553518B2 (en) | Heat dissipation substrate and method for producing same | |
| US7695564B1 (en) | Thermal management substrate | |
| CN101635274A (en) | Method for eliminating cavity in filling of metal gap | |
| JP2002525839A (en) | Thin-film semiconductor structure having a heat conducting layer | |
| JPS6155252B2 (en) | ||
| Widiez et al. | Fabrication of Silicon on Diamond (SOD) substrates by either the Bonded and Etched-back SOI (BESOI) or the Smart-Cut™ technology | |
| JPH10223870A (en) | Wafer for manufacturing semiconductor device | |
| JPH1012547A (en) | Method of manufacturing semiconductor substrate | |
| CN103137537B (en) | Si/CoSi2 substrate material on imaging fully-depleted insulation body and preparing method thereof | |
| CN103137538B (en) | Si/NiSi2 backing material and preparation method thereof on a kind of pattern dielectric body | |
| CN101859781A (en) | SOI device resistant to total dose radiation and manufacturing method thereof | |
| KR102449216B1 (en) | Composite Monocrystalline Film | |
| KR101841359B1 (en) | Monolithic 3D Semiconductor Structure and Method of Fabricating The Same | |
| JP2001298169A (en) | Semiconductor device and producing method therefor |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |