CN109813348B - Distributed optical fiber sensing system and control method thereof - Google Patents

Distributed optical fiber sensing system and control method thereof Download PDF

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CN109813348B
CN109813348B CN201910091098.9A CN201910091098A CN109813348B CN 109813348 B CN109813348 B CN 109813348B CN 201910091098 A CN201910091098 A CN 201910091098A CN 109813348 B CN109813348 B CN 109813348B
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baseband digital
digital signals
signal
unit
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CN109813348A (en
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喻强
吕立冬
张刚
张增华
王玮
虞跃
刘川
李炳林
郭经红
刘伟麟
吴鹏
陶静
黄在朝
张�浩
刘世栋
卜宪德
姚继明
郭云飞
邓辉
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State Grid Corp of China SGCC
State Grid Zhejiang Electric Power Co Ltd
Global Energy Interconnection Research Institute
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State Grid Corp of China SGCC
State Grid Zhejiang Electric Power Co Ltd
Global Energy Interconnection Research Institute
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Abstract

The invention relates to a distributed optical fiber sensing system and a control method thereof, wherein the system comprises: the device comprises a high-speed A/D parallel acquisition unit, a digital down converter, a parallel accumulation averager unit and a signal extraction and calculation unit; the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit and the signal extraction and calculation unit are sequentially connected. The technical scheme provided by the invention reduces various noise interferences introduced by a plurality of external functional modules in the traditional scheme, increases the integration level of the system, and greatly shortens the time of signal analysis, thereby improving the stability and reliability of the distributed optical fiber sensing system.

Description

Distributed optical fiber sensing system and control method thereof
Technical Field
The invention relates to the technical field of distributed optical fiber sensing, in particular to a distributed optical fiber sensing system and a control method thereof.
Background
The optical fiber not only can be used as a transmission medium of the light wave, but also can indirectly or directly change characteristic parameters (amplitude, phase, polarization state, wavelength and the like) representing the light wave due to the action of external factors (such as temperature, pressure, magnetic field, electric field, displacement and the like) when the light wave is transmitted in the optical fiber, so that the optical fiber can be used as a sensing element to detect various to-be-measured (physical quantity, chemical quantity, biomass and the like), which is the basic principle of the optical fiber sensor.
Modern information technology is composed of information acquisition, transmission and processing technologies, so that sensors, communication and computer technologies become three major pillars of the information technology. Especially, the present society has entered the information age with optical fiber communication technology as the main feature, and the optical fiber sensing technology represents the development trend of the new generation of sensors.
The optical fiber sensor is classified into a point type and a distributed type according to different measurement modes. The distributed optical fiber sensor has the capability of extracting the distribution information of a large-range measurement field, and can solve a plurality of problems in the current measurement field. The distributed optical fiber temperature sensor can be used for measuring and monitoring the temperature distribution of large or long equipment such as large power transformers, high-voltage power networks, high-rise buildings and the like. With the continuous and deep research of the distributed optical fiber sensing technology based on the brillouin scattering, a distributed sensing system with good real-time performance, stability and reliability and high precision is developed more greatly.
In the existing distributed optical fiber sensing technology, one-time measurement time is long, and if the multi-channel system is used, the period of one-time scanning of all channels is longer, so that the real-time performance of the sensing system is greatly influenced; in addition, the signal processing module is built by adopting discrete elements, and an additional frequency sweeping module is introduced, so that external noise can be introduced into the whole digital signal processing channel, and the originally weak reflected signal is more difficult to identify and judge.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to construct a distributed optical fiber sensing system by utilizing a high-speed A/D parallel acquisition unit, a digital down converter, a parallel accumulation averager unit, a signal extraction and calculation unit and a control unit, so that various noise interferences introduced by a plurality of external function modules in the traditional scheme are reduced, the integration level of the system is increased, the signal analysis time is greatly shortened, and the stability and the reliability of the distributed optical fiber sensing system are improved.
The purpose of the invention is realized by adopting the following technical scheme:
in a distributed fiber optic sensing system, the improvement comprising: the device comprises a high-speed A/D parallel acquisition unit, a digital down converter, a parallel accumulation averager unit and a signal extraction and calculation unit;
the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit and the signal extraction and calculation unit are sequentially connected;
the high-speed A/D parallel acquisition unit is used for converting received analog electric signals into 4 paths of digital signals with different phases, combining the 4 paths of digital signals with different phases into a serial sampling stream according to a phase time sequence and outputting the serial sampling stream to the digital down converter;
the digital down converter is used for converting a received serial sampling stream into a plurality of parallel baseband digital signals and outputting the plurality of parallel baseband digital signals to the parallel accumulation averager unit;
the parallel accumulation averager unit is used for respectively acquiring the average value of each baseband digital signal in the plurality of parallel baseband digital signals and outputting the average value of each baseband digital signal in the plurality of parallel baseband digital signals to the signal extraction and calculation unit;
the signal extraction and calculation unit is configured to perform fast fourier transform on an average value of each of the multiple parallel baseband digital signals, obtain a spectrum of the average value of each of the multiple parallel baseband digital signals, and perform fitting on the spectrum of the average value of each of the multiple parallel baseband digital signals to form a lorentz curve.
Preferably, the high-speed a/D parallel acquisition unit includes: the device comprises an amplifying circuit, four ADC chips connected in parallel, a digital clock management module and an A/D sampling value buffer area;
the amplifying circuit is used for amplifying and filtering the analog electric signals provided by the photoelectric detector and respectively transmitting the amplified and filtered analog electric signals to four parallel ADC chips;
the digital clock management module is used for respectively providing a 0-degree phase clock signal, a 90-degree phase clock signal, a 180-degree phase clock signal and a 270-degree phase clock signal for the four ADC chips which are connected in parallel;
the ADC chip is used for converting the amplified and filtered analog electric signal with the phase of x degrees into a digital signal if the phase of the received clock signal is x degrees, wherein x is 0, 90, 180 or 270;
and the A/D sampling value buffer area is used for combining the digital signals with the phases of 0 degree, 90 degrees, 180 degrees and 270 degrees into a serial sampling stream according to the phase sequence and outputting the serial sampling stream to the digital down converter.
Further, the sampling rate and the resolution of the ADC chip are respectively 250MSPS and 16bit;
the model of the ADC chip is AD9467-250 or AD9652;
the digital clock management module is a PLL or DCM unit in the Xilinx FPGA.
Preferably, the parallel accumulation averager unit is formed by connecting m accumulation averagers in parallel.
Further, the digital down converter is configured to:
and sequentially performing frequency mixing operation, FIR filtering operation and extraction operation on the received serial sampling stream to obtain m parallel baseband digital signals, and respectively outputting the m parallel baseband digital signals to m parallel accumulation averagers in the parallel accumulation averager unit, wherein m is a positive integer and is more than 1.
Specifically, the signal extraction and calculation unit includes: m FFT time-frequency transformation modules and a Lorentz curve fitting and analyzing module;
the FFT time-frequency transformation module is used for carrying out fast Fourier transformation on the average value of 1 baseband digital signal in the m parallel baseband digital signals to obtain the frequency spectrum of the average value of the baseband digital signals;
and the Lorentz curve fitting and analyzing module is used for fitting the frequency spectrum of the average value of each baseband digital signal in the m parallel baseband digital signals into a Lorentz curve.
Specifically, the FFT time-frequency transformation module is an FFT IP CORE of a Xilinx FPGA;
the execution logic of the Lorentz curve fitting and analyzing unit is written by adopting VHDL or Verilog language.
Preferably, the system further comprises: a control unit;
the control unit is respectively connected with the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit and the signal extraction and calculation unit;
and the control unit is used for controlling the execution sequence of the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit and the signal extraction and calculation unit.
Further, the control unit is specifically configured to:
when the high-speed A/D parallel acquisition unit receives an analog electric signal, the high-speed A/D parallel acquisition unit is controlled to convert the received analog electric signal into 4 paths of digital signals with different phases, the 4 paths of digital signals with different phases are combined into a serial sampling stream according to a phase sequence, and the serial sampling stream is output to the digital down converter;
when the digital down converter receives the serial sampling stream, the digital down converter is controlled to convert the received sampling stream into a plurality of parallel baseband digital signals and output the plurality of parallel baseband digital signals to the parallel accumulation averager unit;
when the parallel accumulation averager unit receives a plurality of parallel baseband digital signals, the parallel accumulation averager unit is controlled to respectively obtain the average value of each baseband digital signal in the plurality of parallel baseband digital signals, and the average value of each baseband digital signal in the plurality of parallel baseband digital signals is output to the signal extraction and calculation unit;
when the signal extraction and calculation unit receives the average value of each baseband digital signal in a plurality of parallel baseband digital signals, the signal extraction and calculation unit is controlled to perform fast Fourier transform on the average value of each baseband digital signal in the plurality of parallel baseband digital signals, obtain the frequency spectrum of the average value of each baseband digital signal in the plurality of parallel baseband digital signals, and fit the frequency spectrum of the average value of each baseband digital signal in the plurality of parallel baseband digital signals into a Lorentz curve.
In a method of controlling a distributed fiber optic sensing system, the improvement comprising:
s1, initializing the iteration number n =0, n belongs to [1, N ];
s2, the control unit controls the high-speed A/D parallel acquisition unit to convert the received analog electric signals into 4 paths of digital signals with different phases, the 4 paths of digital signals with different phases are combined into a serial sampling stream according to a phase sequence, and the serial sampling stream is output to the digital down converter;
s3, the control unit controls the digital down converter to sequentially perform frequency mixing operation, FIR filtering operation and extraction operation on the received serial digital signals to obtain m parallel baseband digital signals, and the m parallel baseband digital signals are respectively output to m parallel accumulation averagers in the parallel accumulation averager unit;
wherein m is a positive integer and m > 1;
s4, the control unit judges whether the iteration number N is equal to N, and if the iteration number N is equal to N, the step S5 is executed; if N is not equal to N, let N = N +1, and execute step S2;
s5, the control unit controls the parallel accumulation averager unit to respectively acquire the average value of each baseband digital signal in the m parallel baseband digital signals and outputs the average value of each baseband digital signal in the m parallel baseband digital signals to the signal extraction and calculation unit;
and S6, the control unit controls the signal extraction and calculation unit to perform fast Fourier transform on the average value of each baseband digital signal in the m parallel baseband digital signals, so as to obtain the frequency spectrum of the average value of each baseband digital signal in the m parallel baseband digital signals, and the frequency spectrum of the average value of each baseband digital signal in the m parallel baseband digital signals is fitted into a Lorentz curve.
Compared with the closest prior art, the invention has the following beneficial effects:
according to the technical scheme provided by the invention, the distributed optical fiber sensing system is constructed by the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit, the signal extraction and calculation unit and the control unit, so that various noise interferences introduced by a plurality of external function modules in the traditional scheme are reduced, the integration level of the system is increased, the signal analysis time is greatly shortened, and the stability and the reliability of the distributed optical fiber sensing system are improved;
according to the technical scheme provided by the invention, the high-speed A/D parallel acquisition unit and the digital down converter are adopted, so that the signals of m frequency bands can be acquired once and then processed in parallel, the original processing time is shortened to 1/m, and the signal extraction time is greatly shortened.
Drawings
FIG. 1 is a schematic structural diagram of a distributed optical fiber sensing system according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a high-speed A/D parallel acquisition unit, a parallel accumulation averager unit and a signal extraction and calculation unit in a distributed optical fiber sensing system according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of an amplifying circuit in a high-speed A/D parallel acquisition unit of a distributed optical fiber sensing system according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of the operation of the buffer area of the A/D sampling value in the high-speed A/D parallel acquisition unit of the distributed optical fiber sensing system according to the embodiment of the present invention;
FIG. 5 is a schematic structural diagram of a digital down converter in a distributed optical fiber sensing system according to an embodiment of the present invention;
FIG. 6 is a schematic structural diagram of a distributed optical fiber sensing system according to an embodiment of the present invention;
fig. 7 is a flowchart illustrating a control method of a distributed optical fiber sensing system according to an embodiment of the present invention.
Detailed Description
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The present invention provides a distributed optical fiber sensing system, as shown in fig. 1, the system includes: the device comprises a high-speed A/D parallel acquisition unit, a digital down converter, a parallel accumulation averager unit and a signal extraction and calculation unit;
the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit and the signal extraction and calculation unit are sequentially connected;
the high-speed A/D parallel acquisition unit is used for converting received analog electric signals into 4 paths of digital signals with different phases, combining the 4 paths of digital signals with different phases into a serial sampling stream according to a phase time sequence, and outputting the serial sampling stream to the digital down converter;
the digital down converter is used for converting a received serial sampling stream into a plurality of parallel baseband digital signals and outputting the plurality of parallel baseband digital signals to the parallel accumulation averager unit;
the parallel accumulation averager unit is used for respectively acquiring the average value of each baseband digital signal in the plurality of parallel baseband digital signals and outputting the average value of each baseband digital signal in the plurality of parallel baseband digital signals to the signal extraction and calculation unit;
the signal extracting and calculating unit is configured to perform fast fourier transform on an average value of each of the plurality of parallel baseband digital signals, obtain a spectrum of the average value of each of the plurality of parallel baseband digital signals, and synthesize a lorentz curve from the spectrum of the average value of each of the plurality of parallel baseband digital signals.
Further, as shown in fig. 2, the high-speed a/D parallel acquisition unit includes: the device comprises an amplifying circuit, four ADC chips connected in parallel, a digital clock management module and an A/D sampling value buffer area;
the amplifying circuit is configured to amplify and filter the analog electrical signal provided by the photodetector, and transmit the amplified and filtered analog electrical signal to four parallel ADC chips, respectively, for example, as shown in fig. 3;
the digital clock management module is used for respectively providing a 0-degree phase clock signal, a 90-degree phase clock signal, a 180-degree phase clock signal and a 270-degree phase clock signal for the four ADC chips which are connected in parallel;
the ADC chip is used for converting the amplified and filtered analog electric signal with the phase of x degrees into a digital signal if the phase of the received clock signal is x degrees, wherein x is 0, 90, 180 or 270;
the A/D sampling value buffer area is used for combining digital signals with phases of 0 degree, 90 degrees, 180 degrees and 270 degrees into a serial sampling stream according to a phase sequence and outputting the serial sampling stream to the digital down converter; for example, as shown in fig. 4.
Specifically, the sampling rate and the resolution of the ADC chip are 250MSPS and 16bit respectively;
the model of the ADC chip is AD9467-250 or AD9652;
the digital clock management module is a PLL or DCM unit in the Xilinx FPGA.
Further, as shown in fig. 2, the parallel accumulation averager unit is formed by connecting m accumulation averagers in parallel.
Further, as shown in fig. 5, the digital down converter is configured to:
and sequentially performing frequency mixing operation, FIR filtering operation and extraction operation on the received serial sampling stream to obtain m parallel baseband digital signals, and respectively outputting the m parallel baseband digital signals to m parallel accumulation averagers in the parallel accumulation averager unit, wherein m is a positive integer and m is more than 1.
Further, as shown in fig. 2, the signal extracting and calculating unit includes: m FFT time-frequency transformation modules and a Lorentz curve fitting and analyzing module;
the FFT time-frequency transformation module is used for carrying out fast Fourier transformation on the average value of 1 baseband digital signal in the m parallel baseband digital signals to obtain the frequency spectrum of the average value of the baseband digital signals;
and the Lorentz curve fitting and analyzing module is used for fitting the frequency spectrum of the average value of each baseband digital signal in the m parallel baseband digital signals into a Lorentz curve.
Specifically, the FFT time-frequency transformation module is an FFT IP CORE of the Xilinx FPGA;
the execution logic of the Lorentz curve fitting and analyzing unit is written by adopting VHDL or Verilog language.
Preferably, as shown in fig. 6, the system further includes: a control unit;
the control unit is respectively connected with the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit and the signal extraction and calculation unit;
and the control unit is used for controlling the execution sequence of the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit and the signal extraction and calculation unit.
Further, the control unit is specifically configured to:
when the high-speed A/D parallel acquisition unit receives an analog electric signal, the high-speed A/D parallel acquisition unit is controlled to convert the received analog electric signal into 4 paths of digital signals with different phases, the 4 paths of digital signals with different phases are combined into a serial sampling stream according to a phase sequence, and the serial sampling stream is output to the digital down converter;
when the digital down converter receives the serial sampling stream, the digital down converter is controlled to convert the received sampling stream into a plurality of parallel baseband digital signals and output the plurality of parallel baseband digital signals to the parallel accumulation averager unit;
when the parallel accumulation averager unit receives a plurality of parallel baseband digital signals, the parallel accumulation averager unit is controlled to respectively obtain the average value of each baseband digital signal in the plurality of parallel baseband digital signals, and the average value of each baseband digital signal in the plurality of parallel baseband digital signals is output to the signal extraction and calculation unit;
when the signal extraction and calculation unit receives the average value of each baseband digital signal in a plurality of parallel baseband digital signals, the signal extraction and calculation unit is controlled to perform fast Fourier transform on the average value of each baseband digital signal in the plurality of parallel baseband digital signals, obtain the frequency spectrum of the average value of each baseband digital signal in the plurality of parallel baseband digital signals, and fit the frequency spectrum of the average value of each baseband digital signal in the plurality of parallel baseband digital signals into a Lorentz curve.
According to the technical scheme provided by the embodiment, through improving and optimizing the Brillouin signal detection and processing module in the traditional BOTDR system, a Digital Down Conversion (DDC) technology which is a key technology in a software radio technology is introduced, the traditional frequency sweep module is replaced, signals of m frequency bands can be acquired once and then processed in parallel, the original processing time is shortened to 1/m, and therefore the signal extraction time is greatly shortened;
in addition, by introducing a DDS frequency synthesis method which utilizes a digital clock management module (DCM) and adopts a full digital technology in the DDC module, all reflected signals are processed by adopting a digital means, the signal processing mode which adopts analog and digital in the traditional scheme is optimized, and the DDS frequency synthesis method has the remarkable advantages of high frequency resolution, short frequency conversion time, continuous output phase and the like when the frequency is changed.
The invention also provides a control method of the distributed optical fiber sensing system, as shown in fig. 7, the method includes:
101. the number of initialization iterations n =0,n ∈ [1,n ];
102. the control unit controls the high-speed A/D parallel acquisition unit to convert received analog electric signals into 4 paths of digital signals with different phases, combines the 4 paths of digital signals with different phases into a serial sampling stream according to a phase time sequence, and outputs the serial sampling stream to the digital down converter;
103. the control unit controls the digital down converter to sequentially perform frequency mixing operation, FIR filtering operation and extraction operation on the received serial digital signals to acquire m parallel baseband digital signals and respectively output the m parallel baseband digital signals to m parallel accumulation averagers in the parallel accumulation averager unit;
wherein m is a positive integer and m > 1;
104. the control unit judges whether the iteration number N is equal to N, if N is equal to N, step 105 is executed; if N is not equal to N, let N = N +1, and execute step 102;
105. the control unit controls the parallel accumulation averager unit to respectively acquire the average value of each baseband digital signal in the m parallel baseband digital signals and outputs the average value of each baseband digital signal in the m parallel baseband digital signals to the signal extraction and calculation unit;
106. the control unit controls the signal extraction and calculation unit to perform fast Fourier transform on the average value of each baseband digital signal in the m parallel baseband digital signals, obtains the frequency spectrum of the average value of each baseband digital signal in the m parallel baseband digital signals, and synthesizes the frequency spectrum of the average value of each baseband digital signal in the m parallel baseband digital signals into a Lorentz curve.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting the same, and although the present invention is described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which is to be covered by the claims.

Claims (2)

1. A distributed fiber optic sensing system, comprising: the device comprises a high-speed A/D parallel acquisition unit, a digital down converter, a parallel accumulation averager unit and a signal extraction and calculation unit;
the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit and the signal extraction and calculation unit are sequentially connected;
the high-speed A/D parallel acquisition unit is used for converting received analog electric signals into 4 paths of digital signals with different phases, combining the 4 paths of digital signals with different phases into a serial sampling stream according to a phase time sequence, and outputting the serial sampling stream to the digital down converter;
the digital down converter is used for converting a received serial sampling stream into a plurality of parallel baseband digital signals and outputting the plurality of parallel baseband digital signals to the parallel accumulation averager unit;
the parallel accumulation averager unit is used for respectively acquiring the average value of each baseband digital signal in the plurality of parallel baseband digital signals and outputting the average value of each baseband digital signal in the plurality of parallel baseband digital signals to the signal extraction and calculation unit;
the signal extracting and calculating unit is configured to perform fast fourier transform on an average value of each baseband digital signal in the plurality of parallel baseband digital signals, obtain a spectrum of the average value of each baseband digital signal in the plurality of parallel baseband digital signals, and fit the spectrum of the average value of each baseband digital signal in the plurality of parallel baseband digital signals into a lorentzian curve;
the high-speed A/D parallel acquisition unit comprises: the device comprises an amplifying circuit, four ADC chips connected in parallel, a digital clock management module and an A/D sampling value buffer area;
the amplifying circuit is used for amplifying and filtering the analog electric signals provided by the photoelectric detector and respectively transmitting the amplified and filtered analog electric signals to four parallel ADC chips;
the digital clock management module is used for respectively providing a 0-degree phase clock signal, a 90-degree phase clock signal, a 180-degree phase clock signal and a 270-degree phase clock signal for the four ADC chips which are connected in parallel;
the ADC chip is used for converting the amplified and filtered analog electric signal with the phase of x degrees into a digital signal if the phase of the received clock signal is x degrees, wherein x is 0, 90, 180 or 270;
the A/D sampling value buffer area is used for combining digital signals with phases of 0 degree, 90 degrees, 180 degrees and 270 degrees into a serial sampling stream according to a phase sequence and outputting the serial sampling stream to the digital down converter;
the sampling rate and the resolution of the ADC chip are respectively 250MSPS and 16bit;
the model of the ADC chip is AD9467-250 or AD9652;
the digital clock management module is a PLL or DCM unit in the XilinxFPGA;
the parallel accumulation averager unit is formed by connecting m accumulation averagers in parallel;
the digital down converter is configured to:
sequentially performing frequency mixing operation, FIR filtering operation and extraction operation on a received serial sampling stream to obtain m parallel baseband digital signals, and respectively outputting the m parallel baseband digital signals to m parallel accumulation averagers in the parallel accumulation averager unit, wherein m is a positive integer and m is greater than 1;
the signal extraction and calculation unit comprises: m FFT time-frequency transformation modules and Lorentz curve fitting and analyzing modules;
the FFT time-frequency transformation module is used for carrying out fast Fourier transformation on the average value of 1 baseband digital signal in the m parallel baseband digital signals to obtain the frequency spectrum of the average value of the baseband digital signals;
the Lorentz curve fitting and analyzing module is used for fitting the frequency spectrum of the average value of each baseband digital signal in the m parallel baseband digital signals into a Lorentz curve;
the FFT time-frequency transformation module is FFTIPCORE of the XilinxFPGA;
the execution logic of the Lorentz curve fitting and analyzing unit is written by adopting VHDL or Verilog language;
the system, still include: a control unit;
the control unit is respectively connected with the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit and the signal extraction and calculation unit;
the control unit is used for controlling the execution sequence of the high-speed A/D parallel acquisition unit, the digital down converter, the parallel accumulation averager unit and the signal extraction and calculation unit;
the control unit is specifically configured to:
when the high-speed A/D parallel acquisition unit receives an analog electric signal, the high-speed A/D parallel acquisition unit is controlled to convert the received analog electric signal into 4 paths of digital signals with different phases, the 4 paths of digital signals with different phases are combined into a serial sampling stream according to a phase sequence, and the serial sampling stream is output to the digital down converter;
when the digital down converter receives the serial sampling stream, the digital down converter is controlled to convert the received sampling stream into a plurality of parallel baseband digital signals and output the plurality of parallel baseband digital signals to the parallel accumulation averager unit;
when the parallel accumulation averager unit receives a plurality of parallel baseband digital signals, the parallel accumulation averager unit is controlled to respectively obtain the average value of each baseband digital signal in the plurality of parallel baseband digital signals, and the average value of each baseband digital signal in the plurality of parallel baseband digital signals is output to the signal extraction and calculation unit;
when the signal extracting and calculating unit receives the average value of each baseband digital signal in the plurality of parallel baseband digital signals, the signal extracting and calculating unit is controlled to perform fast Fourier transform on the average value of each baseband digital signal in the plurality of parallel baseband digital signals, obtain the frequency spectrum of the average value of each baseband digital signal in the plurality of parallel baseband digital signals, and simulate the frequency spectrum of the average value of each baseband digital signal in the plurality of parallel baseband digital signals into a Lorentz curve.
2. A method of controlling a distributed fibre optic sensing system according to claim 1, the method comprising:
s1, initializing iteration times n =0, n belongs to [1, N ];
s2, the control unit controls the high-speed A/D parallel acquisition unit to convert the received analog electric signals into 4 paths of digital signals with different phases, the 4 paths of digital signals with different phases are combined into a serial sampling stream according to a phase sequence, and the serial sampling stream is output to the digital down converter;
s3, the control unit controls the digital down converter to sequentially perform frequency mixing operation, FIR filtering operation and extraction operation on the received serial digital signals to obtain m parallel baseband digital signals, and the m parallel baseband digital signals are respectively output to m parallel accumulation averagers in the parallel accumulation averager unit;
wherein m is a positive integer and m > 1;
s4, the control unit judges whether the iteration number N is equal to N, and if the iteration number N is equal to N, the step S5 is executed; if N is not equal to N, let N = N +1, and execute step S2;
s5, the control unit controls the parallel accumulation averager unit to respectively obtain the average value of each baseband digital signal in the m parallel baseband digital signals, and outputs the average value of each baseband digital signal in the m parallel baseband digital signals to the signal extraction and calculation unit;
and S6, the control unit controls the signal extraction and calculation unit to perform fast Fourier transform on the average value of each baseband digital signal in the m parallel baseband digital signals, so that the frequency spectrum of the average value of each baseband digital signal in the m parallel baseband digital signals is obtained, and the frequency spectrum of the average value of each baseband digital signal in the m parallel baseband digital signals is simulated into a Lorentz curve.
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