CN109785791B - Logic gate operation circuit based on pixel driving, integrated chip and display device - Google Patents
Logic gate operation circuit based on pixel driving, integrated chip and display device Download PDFInfo
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- CN109785791B CN109785791B CN201910236386.9A CN201910236386A CN109785791B CN 109785791 B CN109785791 B CN 109785791B CN 201910236386 A CN201910236386 A CN 201910236386A CN 109785791 B CN109785791 B CN 109785791B
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Abstract
The invention discloses a logic gate operation circuit based on pixel driving, an integrated chip and a display device, wherein the logic gate operation circuit comprises a first transistor, a second transistor, a capacitor and a light emitting device; the first pole and the grid of the first transistor are respectively used as a first input end and a second input end of the logic gate operation circuit, and the second pole of the first transistor is electrically connected with the grid of the second transistor; the first electrode of the second transistor is electrically connected with the first power line, the second electrode of the second transistor is electrically connected with the first electrode of the light emitting device, and the second electrode of the second transistor is used as an output end of the logic gate operation circuit; the second pole of the light emitting device is electrically connected with a second power line; the first electrode of the capacitor is electrically connected with the grid electrode of the second transistor, and the second electrode of the capacitor is electrically connected with a reference voltage line; the first transistor and the second transistor are both P-type transistors. The logic gate operation circuit based on pixel driving can drive the light emitting diode to emit light and can also realize the logic AND operation function.
Description
Technical Field
The embodiment of the invention relates to a pixel driving technology, in particular to a logic gate operation circuit based on pixel driving, an integrated chip and a display device.
Background
The pixel driving circuit has important application in the field of display panels, and the display panel formed by the pixel driving circuit has the advantages of flexible display, transparent display, high brightness, simple structure, low cost and the like.
However, the conventional pixel driving circuit only drives the light emitting diodes to emit light, and each light emitting diode corresponds to an independent pixel driving circuit, so that a great deal of waste of resources of the pixel driving circuit is caused.
Disclosure of Invention
In view of the shortcomings of the prior art, the invention provides a logic gate operation circuit based on pixel driving, so that the logic gate operation circuit based on pixel driving can drive a light emitting diode to emit light and can also realize a logic AND operation function.
In a first aspect, an embodiment of the present invention provides a pixel driving-based logic gate operation circuit, including a first transistor, a second transistor, a capacitor, and a light emitting device;
the first pole and the grid electrode of the first transistor are respectively used as a first input end and a second input end of the logic gate operation circuit, and the second pole of the first transistor is electrically connected with the grid electrode of the second transistor;
the first electrode of the second transistor is electrically connected with the first power line, the second electrode of the second transistor is electrically connected with the first electrode of the light emitting device, and the second electrode of the second transistor is used as the output end of the logic gate operation circuit;
a second electrode of the light emitting device is electrically connected with a second power line;
the first electrode of the capacitor is electrically connected with the grid electrode of the second transistor, and the second electrode of the capacitor is used for inputting reference voltage;
wherein the first transistor and the second transistor are both N-type transistors.
Optionally, the reference voltage line is the second power line.
Optionally, the voltage on the first power supply line is higher than the voltage on the second power supply line.
Optionally, the second power line is a ground line.
Optionally, the first transistor and the second transistor are bipolar junction transistors or field effect transistors.
Optionally, the light emitting element is an organic light emitting diode OLED, a quantum dot light emitting diode QLED, or a Micro light emitting diode Micro-LED.
Optionally, a third transistor and a control line are also included;
the second electrode of the second transistor is connected to the first electrode of the third transistor, the second electrode of the third transistor is connected to the first electrode of the light emitting device, and the gate electrode of the third transistor is connected to the control line.
In a second aspect, an embodiment of the present invention further provides an integrated chip, including the pixel driving-based logic gate operation circuit described in any one of the above.
In a third aspect, an embodiment of the present invention further provides a display device, where the display device has a logic operation function, and the display device includes a plurality of the pixel driving-based logic gate operation circuits described in any one of the above, and a plurality of the logic gate circuits are arranged in an array.
Optionally, at least one of the first input terminal, the second input terminal and the output terminal of one or several of the logic gate operation circuits is electrically connected with at least one of the first input terminal, the second input terminal and the output terminal of another one or several of the logic gate operation circuits through a switch.
The invention adopts the logic gate operation circuit comprising the first transistor, the second transistor, the capacitor and the light-emitting device, so that the logic gate operation circuit can be used for driving the light-emitting diode to emit light and can also be used for logical AND operation, the service efficiency of the logic gate operation circuit is improved, and the operation load of a processor can be reduced.
Drawings
Fig. 1 is a schematic circuit diagram of a logic gate operation circuit based on pixel driving according to an embodiment of the present invention;
FIG. 2 is a simulated timing diagram corresponding to the circuit shown in FIG. 1;
FIG. 3 is a schematic diagram of a logic gate operation circuit based on pixel driving according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Examples
Fig. 1 is a schematic circuit diagram of a logic gate operation circuit based on pixel driving according to an embodiment of the present invention; referring to fig. 1, the transistor includes a first transistor 101, a second transistor 102, a capacitor 103, and a light emitting device 104;
a first pole and a gate of the first transistor 101 are respectively used as a first input end A and a second input end B of the logic gate operation circuit, and a second pole of the first transistor 101 is electrically connected with a gate of the second transistor 102;
a first electrode of the second transistor 102 is electrically connected to the first power supply line 105, a second electrode of the second transistor 102 is electrically connected to the first electrode of the light emitting device 104, and the second electrode of the second transistor 102 serves as an output terminal Y of the logic gate operation circuit;
a second electrode of the light emitting device 104 is electrically connected to a second power line 106;
a first pole of the capacitor 103 is electrically connected to the gate of the second transistor 102, and a second pole of the capacitor 103 is used for inputting a reference voltage;
wherein, the first transistor 101 and the second transistor 102 are both N-type transistors.
The reference voltage line is the second power supply line 106.
Specifically, the second pole of the capacitor 103 may be connected to a reference voltage, so long as the voltage can be maintained for the gate potential of the second transistor 102 when the logic gate operation circuit is used as the pixel driving circuit, and in this embodiment, the second pole of the capacitor 103 is connected to the second power line 106, the first transistor 101 and the second transistor 102 are both enhancement PMOS transistors, and the light emitting device 104 is a GaN micro LED; the P-type transistor is turned on when the grid electrode is in a low level, and turned off when the grid electrode is in a high level; FIG. 2 is a simulated timing diagram corresponding to the circuit shown in FIG. 1; referring to fig. 2, when the input level of the second input terminal B, i.e., the gate of the first transistor 101 is at the high level 1, the first transistor 101 is turned on, the input signal of the first input terminal a reaches the gate of the second transistor B, if the input signal of the first input terminal a is at the low level 0 at this time, the second transistor 102 is turned off, and due to the clamping effect of the light emitting device 104, the output terminal Y outputs at the low level 0, and if the input signal of the first input terminal a is at the high level 1 at this time, the second transistor 102 is turned on, and the output terminal Y outputs at the high level 1; when the second input terminal B inputs a low level 0, the first transistor 101 is turned off, that is, the input signal of the first input terminal a cannot reach the gate of the second transistor 102 at this time, that is, no matter whether the input signal of the first input terminal a inputs a high level 1 or a low level 0, the output terminal Y outputs a low level 0; therefore, the logical relation between the output terminal Y and the first input terminal a and the second input terminal B is y=a·b, and the output terminal Y can be used as an and logic gate.
According to the technical scheme, the logic gate operation circuit comprising the first transistor, the second transistor, the capacitor and the light emitting device can be used for driving the light emitting diode to emit light, and can also be used for logical AND operation, so that the service efficiency of the logic gate operation circuit is improved, and meanwhile, the operation load of a processor can be reduced.
Optionally, the voltage on the first power line 105 is higher than the voltage on the second power line 106;
specifically, the voltage on the first power line 105 and the voltage on the second power line 106 are used to ensure that the current flowing direction on the light emitting device 104 is that the first pole of the light emitting device 104 flows to the second pole, so as to drive the light emitting device 104 to emit light, and since the light emitting device 104 has unidirectional conduction characteristic, when the voltage on the first power line 105 is higher than the voltage on the second power line 106, the light emitting device 104 can emit light normally when the second transistor 102 is turned on.
Optionally, the second power line 106 is a ground line;
alternatively, the first transistor 101 and the second transistor 102 are both bipolar junction transistors or field effect transistors;
alternatively, the Light Emitting device is an Organic Light-Emitting Diode (OLED), a quantum dot Light-Emitting Diode (Quantum Dot Light Emitting Diodes, QLED), or a Micro Light-Emitting Diode (Micro-Light Emitting Diode, micro-LED).
According to the technical scheme, the specific component types of the logic gate operation circuit are set, so that the cost of the logic gate operation circuit can be effectively controlled under the condition that the light emitting device is driven to emit light and perform logical operation.
Optionally, fig. 3 is a schematic circuit diagram of another logic gate operation circuit based on pixel driving according to an embodiment of the present invention; referring to fig. 3, the pixel driving-based logic gate operation circuit provided by the present invention further includes a third transistor 201 and a control line 202;
the second pole of the second transistor 102 is connected to the first pole of the third transistor 201, the second pole of the third transistor 201 is connected to the first pole of the light emitting device 104, and the gate of the third transistor 201 is connected to the control line 202.
Specifically, the control line 202 may be a control bus for controlling the third transistor 201 to be turned on or turned off, and when the logic gate operation circuit is not used as the pixel driving circuit to drive the light emitting device 104 to emit light, and is used as the logic gate operation circuit, the control line 202 may control the third transistor 201 to be turned off so as to avoid the light emitting diode 104 from emitting light by mistake; when the logic gate operation circuit is used as a pixel driving circuit to drive the light emitting device 104 to emit light, the control line 202 controls the third transistor 201 to be turned on, so that the logic gate operation circuit satisfies the function of driving the light emitting device 104 to emit light.
According to the technical scheme, the logic gate operation circuit comprising the third transistor and the control line is adopted, so that false light emission of the light emitting device can not be caused when the logic gate operation circuit is used as logic operation, and the function of logic operation is realized under the condition that the display effect of the light emitting device is not affected.
Optionally, the embodiment of the invention further provides an integrated chip, which comprises any one of the logic gate operation circuits based on pixel driving.
Specifically, the integrated chip provided in this embodiment may be applied to a display device or an arithmetic circuit.
Optionally, fig. 4 is a schematic structural diagram of a display device according to an embodiment of the present invention; referring to fig. 4, the pixel driving circuit includes a plurality of logic gate operation circuits 401 according to any one of the above, and the plurality of logic gate operation circuits 401 are arranged in an array.
Optionally, at least one of the first input terminal a, the second input terminal B and the output terminal Y of one or several logic gate operation circuits 401 is electrically connected to at least one of the first input terminal, the second input terminal and the output terminal of another one or several logic gate operation circuits 401 through the switch 301.
It can be understood that the switch connection manner among the first input end, the second input end and the output end of the plurality of logic gate operation circuits can be designed according to specific needs, the switch can be a transistor, and the control end C can control the switch 301 to be turned on so as to form different types of combinational logic circuits or sequential logic circuits among the logic gate operation circuits. The display panel may also include logic gate operation circuits for other logic functions to meet different logic needs.
It should be noted that, the display device provided in this embodiment may not only satisfy the display function and the operation function at the same time, but also realize the display function and the distinction between them according to the on or off of the third transistor. If the display device satisfies both the display function and the AND operation function, the logic gate operation circuit needs to satisfy the display function first, so that the operation distribution is distributed in different logic gate operation circuits to maximally utilize the existing circuit states of the logic gate operation circuits, and since the second pole of the first transistor is switched from high level to low level and the first pole of the first transistor is high level when the second pole of the first transistor is high level, that is, the second transistor is switched from on to off state, the second transistor should be continuously turned on for a period of time when the second transistor is switched from on to off due to the holding effect of the capacitor, and if the logic gate operation circuit is still applied to logic operation at this time, logic errors will occur when the logic gate operation circuit is applied to logic operation, the distributed operation distribution is adopted in each logic gate operation circuit to avoid logic errors.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (7)
1. The logic gate operation circuit based on pixel driving is characterized by comprising a first transistor, a second transistor, a capacitor and a light emitting device;
the first pole and the grid electrode of the first transistor are respectively used as a first input end and a second input end of the logic gate operation circuit, and the second pole of the first transistor is electrically connected with the grid electrode of the second transistor;
the first electrode of the second transistor is electrically connected with the first power line, the second electrode of the second transistor is electrically connected with the first electrode of the light emitting device, and the second electrode of the second transistor is used as the output end of the logic gate operation circuit;
a second electrode of the light emitting device is electrically connected with a second power line;
a first electrode of the capacitor is electrically connected with the gate of the second transistor, and a second electrode of the capacitor is electrically connected with a reference voltage line;
wherein the first transistor and the second transistor are both N-type transistors;
the reference voltage line is the second power line; the voltage on the first power supply line is higher than the voltage on the second power supply line; the second power line is a ground line.
2. The logic gate operation circuit according to claim 1, further comprising a third transistor and a control line, wherein a second electrode of the second transistor is electrically connected to a first electrode of the light emitting device through the third transistor; wherein a second electrode of the second transistor is connected to a first electrode of the third transistor, a second electrode of the third transistor is connected to a first electrode of the light emitting device, and a gate of the third transistor is connected to the control line.
3. The logic gate operation circuit according to claim 1, wherein the first transistor and the second transistor are bipolar junction transistors or field effect transistors.
4. The logic gate operation circuit according to claim 1, wherein the light emitting device is an organic light emitting diode OLED, a quantum dot light emitting diode QLED, or a Micro light emitting diode Micro-LED.
5. An integrated chip comprising the pixel-drive-based logic gate operation circuit of any one of claims 1-4.
6. A display device having a logic operation function, comprising a plurality of the pixel-drive-based logic gate operation circuits according to any one of claims 1 to 4, the plurality of logic gate operation circuits being arranged in an array.
7. The display device according to claim 6, wherein at least one of the first input terminal, the second input terminal, and the output terminal of one or several of the logic gate operation circuits is electrically connected to at least one of the first input terminal, the second input terminal, and the output terminal of another one or several of the logic gate operation circuits through a switch.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910236386.9A CN109785791B (en) | 2019-03-27 | 2019-03-27 | Logic gate operation circuit based on pixel driving, integrated chip and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910236386.9A CN109785791B (en) | 2019-03-27 | 2019-03-27 | Logic gate operation circuit based on pixel driving, integrated chip and display device |
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| CN109785791A CN109785791A (en) | 2019-05-21 |
| CN109785791B true CN109785791B (en) | 2024-01-30 |
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| JP2004258683A (en) * | 2004-05-31 | 2004-09-16 | Seiko Epson Corp | Active matrix type liquid crystal display device |
| EP1755103A1 (en) * | 2005-08-17 | 2007-02-21 | Samsung SDI Co., Ltd. | Emission control driver and organic light emitting display device having the same and a logical OR circuit for an emission control driver for outputting an emission control signal |
| KR100748361B1 (en) * | 2006-08-08 | 2007-08-09 | 삼성에스디아이 주식회사 | Logic gate, scan driver and organic light emitting display using the same |
| KR20080104617A (en) * | 2007-05-28 | 2008-12-03 | 엘지디스플레이 주식회사 | Shift register and liquid crystal disslay including, method of driving the same |
| KR20160094560A (en) * | 2015-01-30 | 2016-08-10 | 엘지디스플레이 주식회사 | Organic light emitting display device |
| CN107301834A (en) * | 2017-08-25 | 2017-10-27 | 京东方科技集团股份有限公司 | A kind of logic unit circuit and pixel-driving circuit |
-
2019
- 2019-03-27 CN CN201910236386.9A patent/CN109785791B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004258683A (en) * | 2004-05-31 | 2004-09-16 | Seiko Epson Corp | Active matrix type liquid crystal display device |
| EP1755103A1 (en) * | 2005-08-17 | 2007-02-21 | Samsung SDI Co., Ltd. | Emission control driver and organic light emitting display device having the same and a logical OR circuit for an emission control driver for outputting an emission control signal |
| KR100748361B1 (en) * | 2006-08-08 | 2007-08-09 | 삼성에스디아이 주식회사 | Logic gate, scan driver and organic light emitting display using the same |
| KR20080104617A (en) * | 2007-05-28 | 2008-12-03 | 엘지디스플레이 주식회사 | Shift register and liquid crystal disslay including, method of driving the same |
| KR20160094560A (en) * | 2015-01-30 | 2016-08-10 | 엘지디스플레이 주식회사 | Organic light emitting display device |
| CN107301834A (en) * | 2017-08-25 | 2017-10-27 | 京东方科技集团股份有限公司 | A kind of logic unit circuit and pixel-driving circuit |
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