CN109768692B - Dynamic boosting system - Google Patents
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- CN109768692B CN109768692B CN201711062511.6A CN201711062511A CN109768692B CN 109768692 B CN109768692 B CN 109768692B CN 201711062511 A CN201711062511 A CN 201711062511A CN 109768692 B CN109768692 B CN 109768692B
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Abstract
The invention discloses a dynamic boosting system, which comprises a peak value sampling and holding circuit and a controlled boosting circuit; the sampling output end of the peak value sampling hold circuit is connected with the input end of the controlled boost circuit; the peak value sampling and holding circuit is connected with the first differential signal, the second differential signal and the clock signal, detects the peak value of the first differential signal and the peak value of the second differential signal according to the clock signal, compares the peak value with the first differential signal, outputs a peak value sampling signal with a high peak value to the controlled boost circuit, and outputs a boost signal after the controlled boost circuit is connected with the voltage signal to perform voltage boost processing, wherein the amplitude of the boost signal is controlled by the peak value sampling signal. The invention can realize the real-time dynamic boosting of the dynamic boosting system continuously following the peak value of the input signal by changing the voltage of the output signal in real time along with the size of the input signal in the continuous changing process of the input signal.
Description
Technical Field
The invention relates to the technical field of peak detection, in particular to a dynamic boosting system.
Background
Most of the conventional peak detection circuits use a special diode, which is very difficult to manufacture for CMOS (Complementary Metal Oxide Semiconductor ) process, and requires more complicated process and more layers, which increases the chip cost.
Therefore, the prior art has the problems of complex manufacturing process and high cost.
Disclosure of Invention
The embodiment of the invention provides a dynamic boosting system, which aims to solve the problems of complex device manufacturing process and high cost in the prior art.
The embodiment of the invention provides a dynamic boosting system which comprises a peak value sampling and holding circuit and a controlled boosting circuit.
The sampling output end of the peak value sampling hold circuit is connected with the input end of the controlled boost circuit.
The peak value sampling and holding circuit is connected with the first differential signal, the second differential signal and the clock signal, detects the peak value of the first differential signal and the peak value of the second differential signal according to the clock signal, compares the peak value with the first differential signal, outputs a peak value sampling signal with a high peak value to the controlled boost circuit, and outputs a boost signal after the controlled boost circuit is connected with the voltage signal to perform voltage boost processing, wherein the amplitude of the boost signal is controlled by the peak value sampling signal.
In one embodiment, the peak sample and hold circuit includes a first voltage follower module, a second voltage follower module, a first switch control module, a second switch control module, a first peak detection module, and a second peak detection module.
The output end of the first voltage following module is commonly connected with the first input end of the first peak detection module and the input end of the first switch control module, and the output end of the first peak detection module is connected with the controlled end of the first switch control module; the output end of the second voltage following module is commonly connected with the first input end of the second peak detection module and the input end of the second switch control module, and the output end of the second peak detection module is connected with the controlled end of the second switch control module; the output end of the first switch control module and the output end of the second switch control module are connected together to form a sampling output end of the peak value sampling hold circuit; the sampling output end is respectively connected with the second input end of the first peak value detection module and the second input end of the second peak value detection module.
The third input of the first peak detection module and the third input of the second peak detection module are simultaneously connected with a clock signal.
The sampling output end outputs a peak sampling signal.
The first voltage following module receives the first differential signal and outputs the first following signal to the first switch control module and the first peak detection module respectively.
The first peak detection module receives the first following signal, the peak sampling signal and the clock signal, and compares the first following signal with the peak sampling signal according to the clock signal; when the amplitude of the first following signal is higher than that of the peak sampling signal, the first peak detection module controls the first switch control module to be conducted, so that the first switch control module outputs the first following signal; when the amplitude of the first following signal is not higher than that of the peak sampling signal, the first peak detection module controls the first switch control module to be disconnected, so that the first switch control module keeps the previous output.
The second voltage following module receives the second differential signal and outputs the second following signal to the second switch control module and the second peak detection module respectively.
The second peak detection module receives the second following signal, the peak sampling signal and the clock signal, and compares the second following signal with the peak sampling signal according to the clock signal; when the amplitude of the second following signal is higher than that of the peak sampling signal, the second peak detection module controls the second switch control module to be conducted, so that the second switch control module outputs the second following signal; when the amplitude of the second following signal is not higher than that of the peak sampling signal, the second peak detection module controls the second switch control module to be disconnected, so that the second switch control module keeps the previous output.
In one embodiment, the first voltage follower module includes a first operational amplifier, a forward input terminal of the first operational amplifier is an input terminal of the first voltage follower module, and a reverse input terminal of the first operational amplifier is commonly connected with an output terminal thereof to form an output terminal of the first voltage follower module.
The second voltage following module comprises a second operational amplifier, wherein the forward input end of the second operational amplifier is the input end of the second voltage following module, and the reverse input end of the second operational amplifier and the output end of the second operational amplifier are connected together to form the output end of the second voltage following module.
In one embodiment, the first switch control module includes a first PMOS (P-channel MOS transistor), a source of the first PMOS is an input terminal of the first switch control module, a gate of the first PMOS is a controlled terminal of the first switch control module, and a drain of the first PMOS is an output terminal of the first switch control module.
The second switch control module comprises a second PMOS tube, the source electrode of the second PMOS tube is the input end of the second switch control module, the grid electrode of the second PMOS tube is the controlled end of the second switch control module, and the drain electrode of the second PMOS tube is the output end of the second switch control module.
In one embodiment, the first peak detection module includes a first voltage comparator and a first trigger, wherein a reverse input end of the first voltage comparator is a first input end of the first peak detection module, a forward input end of the first voltage comparator is a second input end of the first peak detection module, an output end of the first voltage comparator is connected with the first input end of the first trigger, a second input end of the first trigger is a third input end of the first peak detection module, and an output end of the first trigger is an output end of the first peak detection module.
The second peak detection module comprises a second voltage comparator and a second trigger, wherein the reverse input end of the second voltage comparator is the first input end of the second peak detection module, the forward input end of the second voltage comparator is the second input end of the second peak detection module, the output end of the second voltage comparator is connected with the first input end of the second trigger, the second input end of the second trigger is the third input end of the second peak detection module, and the output end of the second trigger is the output end of the second peak detection module.
In one embodiment, the first trigger is a first RS trigger, an S terminal of the first RS trigger is a first input terminal of the first trigger, an R terminal of the first RS trigger is a second input terminal of the first trigger, and a forward output terminal of the first RS trigger is an output terminal of the first trigger.
The second trigger is a second RS trigger, the S end of the second RS trigger is a first input end of the second trigger, the R end of the second RS trigger is a second input end of the second trigger, and the forward output end of the second RS trigger is an output end of the second trigger.
In one embodiment, a controlled boost circuit includes a voltage controlled current source module and a boost module.
The input end of the voltage-controlled current source module is used as the sampling output end of the peak value sampling and holding circuit, the output end of the voltage-controlled current source module is connected with the input end of the voltage-boosting module, and the output end of the voltage-boosting module is the output end of the controlled voltage-boosting circuit.
The voltage-controlled current source module receives the peak sampling signal and controls the output current signal according to the peak sampling signal; the boosting module receives the current signal and the voltage signal, performs boosting processing on the voltage signal with different amplitudes according to the magnitude of the current signal, and outputs a boosting signal.
In one embodiment, the BOOST module includes a BOOST Chopper (BOOST Chopper) BOOST circuit unit, a first feedback unit, and a second feedback unit.
The current signal input end of the BOOST circuit unit, the first end of the first feedback unit and the first end of the second feedback unit are commonly connected to form the input end of the BOOST module, the BOOST signal output end of the BOOST circuit unit and the second end of the first feedback unit are commonly connected to form the output end of the BOOST module, and the second end of the second feedback unit is grounded.
In one embodiment, the controlled boost circuit further comprises an energy storage module for maintaining the voltage of the peak sampled signal.
The first end of the energy storage module receives the input end of the control boost circuit, and the second end of the energy storage module is grounded.
In one embodiment, the energy storage module includes an energy storage capacitor and a discharge resistor.
The first end of the energy storage capacitor and the first end of the discharge resistor are connected together to form a first end of the energy storage module, and the second end of the energy storage capacitor and the second end of the discharge resistor are connected together to form a second end of the energy storage module.
Compared with the prior art, the embodiment of the invention has the beneficial effects that: the voltage of the output signal changes in real time along with the size of the input signal in the continuous change process of the input signal, so that the dynamic boosting system continuously and dynamically boosts the voltage along with the peak value of the input signal in real time.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present invention, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a dynamic boosting system according to an embodiment of the present invention;
FIG. 2 is a schematic block diagram of a dynamic boost system according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a dynamic boosting system according to an embodiment of the present invention.
Detailed Description
In order to make the present solution better understood by those skilled in the art, the technical solution in the present solution embodiment will be clearly described below with reference to the accompanying drawings in the present solution embodiment, and it is obvious that the described embodiment is an embodiment of a part of the present solution, but not all embodiments. All other embodiments, based on the embodiments in this solution, which a person of ordinary skill in the art would obtain without inventive faculty, shall fall within the scope of protection of this solution.
The term "comprising" in the description of the present solution and the claims and in the above figures, as well as any other variants, means "including but not limited to", intended to cover a non-exclusive inclusion. Furthermore, the terms "first" and "second," etc. are used for distinguishing between different objects and not for describing a particular sequential order.
The implementation of the invention is described in detail below with reference to the specific drawings:
Fig. 1 shows a composition of a dynamic boost system 10 according to an embodiment of the present invention, and for convenience of explanation, only the portions related to the embodiment of the present invention are shown in detail as follows:
as shown in fig. 1, a dynamic boost system 10 provided by an embodiment of the present invention includes a peak sample-and-hold circuit 100 and a controlled boost circuit 200.
The sampling output of the peak sample-and-hold circuit 100 is connected to the input of the controlled boost circuit 200.
The peak sample-and-hold circuit 100 is connected to the first differential signal VON, the second differential signal VOP and the clock signal OSC, the peak sample-and-hold circuit 100 detects the peak value of the first differential signal VON and the second differential signal VOP according to the clock signal OSC and compares them, and outputs a peak sample signal VCAP with a high peak value to the controlled boost circuit 200, the controlled boost circuit 200 is connected to the voltage signal VCC to perform voltage boost processing and then outputs a boost signal PVDD, and the amplitude of the boost signal PVDD is controlled by the peak sample signal VCAP.
In this embodiment, the peak sample-and-hold circuit 100 detects the peak values of the first differential signal VON and the second differential signal VOP outside to output different peak sample signals VCAP, and the controlled boost circuit 200 continuously and dynamically boosts the voltage in real time along with the magnitude of the peak sample signals VCAP, so that the amplitude of the output boost signal PVDD changes in real time along with the magnitude of the signal accessed from outside.
In one embodiment, the first differential signal VON is a first audio differential signal, and the second differential signal VOP is a second audio differential signal, the first and second audio differential signals being provided by an external audio source device.
In this embodiment, the dynamic voltage boosting system 10 accesses the audio differential signal provided by the external audio source device, so that the dynamic voltage boosting system 10 continuously and dynamically boosts the voltage in real time along with the peak value of the audio differential signal in the continuous change process of the audio differential signal, and the output voltage boosting signal PVDD changes in real time along with the size of the input audio differential signal. The dynamic boost system 10 in this embodiment can be applied to an audio power amplifier to realize automatic dynamic boosting according to an audio signal.
As shown in fig. 2, in one embodiment of the present invention, the peak sample-and-hold circuit 100 in the embodiment shown in fig. 1 includes a first voltage follower module 110, a second voltage follower module 120, a first switch control module 130, a second switch control module 140, a first peak detection module 150, and a second peak detection module 160.
The output end of the first voltage following module 110 is commonly connected with the first input end of the first peak detection module 150 and the input end of the first switch control module 130, and the output end of the first peak detection module 150 is connected with the controlled end of the first switch control module 130; the output end of the second voltage following module 120 is commonly connected with the first input end of the second peak detection module 160 and the input end of the second switch control module 140, and the output end of the second peak detection module 160 is connected with the controlled end of the second switch control module 140; the output end of the first switch control module 130 and the output end of the second switch control module 140 are commonly connected to form a sampling output end of the peak sample-and-hold circuit 100; the sampling output terminal is connected to the second input terminal of the first peak detection module 150 and the second input terminal of the second peak detection module 160, respectively.
The third input of the first peak detection module 150 and the third input of the second peak detection module 160 are simultaneously connected to the clock signal OSC.
The sampling output outputs a peak sampling signal VCAP.
The first voltage follower module 110 receives the first differential signal VON and outputs a first follower signal VONF to the first switch control module 130 and the first peak detection module 150, respectively.
The first peak detection module 150 receives the first follower signal VONF, the peak sample signal VCAP, and the clock signal OSC, and compares the first follower signal VONF and the peak sample signal VCAP according to the clock signal OSC; when the amplitude of the first following signal VONF is higher than the amplitude of the peak sampling signal VCAP, the first peak detection module 150 controls the first switch control module 130 to be turned on, so that the first switch control module 130 outputs the first following signal VONF; when the amplitude of the first follow signal VONF is not higher than the amplitude of the peak sample signal VCAP, the first peak detection module 150 controls the first switch control module 130 to be turned off, so that the first switch control module 130 maintains the previous output.
The second voltage follower module 120 receives the second differential signal VOP and outputs a second follower signal VOPF to the second switch control module 140 and the second peak detection module 160, respectively.
The second peak detection module 160 receives the second follow signal VOPF, the peak sample signal VCAP, and the clock signal OSC, and compares the second follow signal VOPF and the peak sample signal VCAP according to the clock signal OSC; when the amplitude of the second following signal VOPF is higher than the amplitude of the peak sampling signal VCAP, the second peak detection module 160 controls the second switch control module 140 to be turned on, so that the second switch control module 140 outputs the second following signal VOPF; when the amplitude of the second follow signal VOPF is not higher than the amplitude of the peak sample signal VCAP, the second peak detection module 160 controls the second switch control module 140 to be turned off, so that the second switch control module 140 maintains the previous output.
In this embodiment, the function of the peak sample-and-hold circuit 100 is realized through the combined actions of the first voltage following module 110, the second voltage following module 120, the first switch control module 130, the second switch control module 140, the first peak detection module 150 and the second peak detection module 160, and the peak sizes of the first differential signal VON and the second differential signal VOP are compared, so that the peak sampling signal VCAP with a larger output peak value is formed.
As shown in fig. 3, in one embodiment of the present invention, the first voltage follower module 110 in the embodiment shown in fig. 2 includes a first operational amplifier OP1, where a forward input terminal of the first operational amplifier OP1 is an input terminal of the first voltage follower module 110, and an inverse input terminal of the first operational amplifier OP1 is commonly connected with an output terminal thereof to form an output terminal of the first voltage follower module 110.
As shown in fig. 3, in one embodiment of the present invention, the second voltage follower module 120 in the embodiment shown in fig. 2 includes a second operational amplifier OP2, where a forward input terminal of the second operational amplifier OP2 is an input terminal of the second voltage follower module 120, and an opposite input terminal of the second operational amplifier OP2 is commonly connected with an output terminal thereof to form an output terminal of the second voltage follower module 120.
In this embodiment, the positive input terminal of the first operational amplifier OP1 receives the first differential signal VON, and the output terminal outputs the first follow signal VONF. The second operational amplifier OP2 has a positive input terminal receiving the second differential signal VOP and an output terminal outputting the second follow signal VOPF. The voltage following function is realized through the operational amplifier, and a following signal with driving capability is output.
As shown in fig. 3, in an embodiment of the present invention, the first switch control module 130 in the embodiment shown in fig. 2 includes a first PMOS transistor POMS1, a source of the first PMOS transistor POMS1 is an input end of the first switch control module 130, a gate of the first PMOS transistor POMS1 is a controlled end of the first switch control module 130, and a drain of the first PMOS transistor POMS1 is an output end of the first switch control module 130.
As shown in fig. 3, in one embodiment of the present invention, the second switch control module 140 in the embodiment shown in fig. 2 includes a second PMOS transistor POMS2, the source of the second PMOS transistor POMS2 is an input end of the second switch control module 140, the gate of the second PMOS transistor POMS2 is a controlled end of the second switch control module 140, and the drain of the second PMOS transistor POMS2 is an output end of the second switch control module 140.
As shown in fig. 3, in one embodiment of the present invention, the first peak detection module 150 in the embodiment shown in fig. 2 includes a first voltage comparator COMP1 and a first trigger RS1, the reverse input terminal of the first voltage comparator COMP1 is the first input terminal of the first peak detection module 150, the forward input terminal of the first voltage comparator COMP1 is the second input terminal of the first peak detection module 150, the output terminal of the first voltage comparator COMP1 is connected to the first input terminal of the first trigger RS1, the second input terminal of the first trigger RS1 is the third input terminal of the first peak detection module 150, and the output terminal of the first trigger RS1 is the output terminal of the first peak detection module 150.
As shown in fig. 3, in one embodiment of the present invention, the second peak detection module 160 in the embodiment shown in fig. 2 includes a second voltage comparator COMP2 and a second trigger RS2, where the inverting input terminal of the second voltage comparator COMP2 is the first input terminal of the second peak detection module 160, the forward input terminal of the second voltage comparator COMP2 is the second input terminal of the second peak detection module 160, the output terminal of the second voltage comparator COMP2 is the first input terminal of the second trigger RS2, the second input terminal of the second trigger RS2 is the third input terminal of the second peak detection module 160, and the output terminal of the second trigger RS2 is the output terminal of the second peak detection module 160.
In this embodiment, the positive input terminal of the first voltage comparator COMP1 receives the peak sampling signal VCAP, the negative input terminal receives the first following signal VONF, and the first comparison signal V1 is output after comparing the magnitudes of the two signals.
The positive input terminal of the second voltage comparator COMP2 receives the peak sampling signal VCAP, the negative input terminal receives the second following signal VOPF, and the second comparison signal V2 is output after comparing the magnitudes of the two signals.
As shown in fig. 3, in one embodiment of the present invention, the first flip-flop RS1 in the embodiment shown in fig. 2 is a first RS flip-flop, the S terminal of the first RS flip-flop is a first input terminal of the first flip-flop RS1, the R terminal of the first RS flip-flop is a second input terminal of the first flip-flop RS1, and the forward output terminal of the first RS flip-flop is an output terminal of the first flip-flop RS 1.
As shown in fig. 3, in one embodiment of the present invention, the second flip-flop RS2 in the embodiment shown in fig. 2 is a second RS flip-flop, the S terminal of the second RS flip-flop is the first input terminal of the second flip-flop RS2, the R terminal of the second RS flip-flop is the second input terminal of the second flip-flop RS2, and the forward output terminal of the second RS flip-flop is the output terminal of the second flip-flop RS 2.
In this embodiment, the first trigger RS1 outputs the first switch signal K1 to the gate of the first PMOS transistor POMS1 to control the on/off of the first PMOS transistor POMS 1. The second trigger RS2 outputs a second switching signal K2 to the gate of the second PMOS transistor POMS2 to control the on/off of the second PMOS transistor POMS 2.
For ease of understanding, the following describes the various signal variations of fig. 3:
The first following signal VONF =the first differential signal VON is always maintained by the first operational amplifier OP1, and the second following signal VOPF =the second differential signal VOP is always maintained by the second operational amplifier OP 2.
When the peak sampling signal VCAP is smaller than the first following signal VONF or the second following signal VOPF in a certain clock period of the clock signal OSC, the corresponding first comparison signal V1 output by the first voltage comparator COMP1 or the second comparison signal V2 output by the second voltage comparator COMP2 becomes a low level.
If the clock signal OSC is at a high level at this time, the first switch signal K1 output by the corresponding first flip-flop RS1 or the second switch signal K2 output by the corresponding second flip-flop RS2 becomes a low level, so that the first PMOS transistor POMS1 or the second PMOS transistor POMS2 is turned on, thereby realizing the peak sampling signal vcap=the first follower signal VONF or the peak sampling signal vcap=the second follower signal VOPF.
If the clock signal OSC is at a low level at this time, the first switch signal K1 output by the corresponding first flip-flop RS1 and the second switch signal K2 output by the corresponding second flip-flop RS2 are reset to be at a high level, so that the first PMOS transistor POMS1 and the second PMOS transistor POMS2 are both turned off, thereby implementing that the peak sampling signal VCAP samples the peak values of the first following signal VONF and the second following signal VOPF and holds them.
When the peak sampling signal VCAP is greater than the first following signal VONF and the second following signal VOPF in another clock cycle of the clock signal OSC, then the first comparison signal V1 and the second comparison signal V2 both become low, and the first switch signal K1 and the second switch signal K2 remain high, so that the first PMOS transistor POMS1 and the second PMOS transistor POMS2 both remain off, thereby realizing that the peak sampling signal VCAP samples the peaks of the first following signal VONF and the second following signal VOPF and remains.
As shown in fig. 2, in one embodiment of the present invention, the controlled boost circuit 200 in the embodiment shown in fig. 1 includes a voltage controlled current source module 210 and a boost module 220.
The input end of the voltage-controlled current source module 210 is used as the input end of the controlled boost circuit 200 to be connected with the sampling output end of the peak value sampling and holding circuit 100, the output end of the voltage-controlled current source module 210 is connected with the input end of the boost module 220, and the output end of the boost module 220 is the output end of the controlled boost circuit 200.
The voltage-controlled current source module 210 receives the peak sampling signal VCAP and controls the magnitude of the current signal output by the voltage-controlled current source module according to the peak sampling signal VCAP; the voltage boosting module 220 receives the current signal and the voltage signal VCC, performs voltage boosting processing on the voltage signal VCC with different magnitudes according to the magnitude of the current signal, and outputs a voltage boosting signal PVDD.
In this embodiment, the voltage-controlled current source module 210 includes a voltage-controlled current source.
As shown in fig. 3, in one embodiment of the present invention, the BOOST module 220 in the embodiment shown in fig. 2 includes a BOOST circuit unit 221, a first feedback unit 222, and a second feedback unit 223.
The current signal input end of the BOOST circuit unit 221, the first end of the first feedback unit 222 and the first end of the second feedback unit 223 are commonly connected to form an input end of the BOOST module 220, the BOOST signal output end of the BOOST circuit unit 221 and the second end of the first feedback unit 222 are commonly connected to form an output end of the BOOST module 220, and the second end of the second feedback unit 223 is grounded.
In this embodiment, the BOOST circuit, also called step-up converter, is a common switch dc BOOST circuit, which can make the output voltage higher than the input voltage.
In this embodiment, the BOOST signal PVDD output by the BOOST circuit unit 221 is fed back to the input end thereof through the first feedback unit 222 and the second feedback unit 223, so as to realize closed-loop control of the BOOST circuit unit 221.
In one embodiment, the first feedback unit 222 includes a first feedback resistor RFB1, and a first end and a second end of the first feedback resistor RFB1 are a first end and a second end of the first feedback unit 222, respectively. The second feedback unit 223 includes a second feedback resistor RFB2, and a first end and a second end of the second feedback resistor RFB1 are a first end and a second end of the second feedback unit 223, respectively.
As shown in fig. 2, in one embodiment of the present invention, the controlled boost circuit 200 of the embodiment shown in fig. 1 further includes an energy storage module 230 for maintaining the voltage of the peak sample signal VCAP.
The first end of the energy storage module 230 receives the input end of the boost control circuit 200, and the second end of the energy storage module 230 is grounded.
As shown in fig. 3, in one embodiment of the present invention, the energy storage module 230 in the embodiment shown in fig. 2 includes an energy storage capacitor C1 and a discharge resistor R1.
The first end of the energy storage capacitor C1 and the first end of the discharge resistor R1 are commonly connected to form a first end of the energy storage module 230, and the second end of the energy storage capacitor C1 and the second end of the discharge resistor R1 are commonly connected to form a second end of the energy storage module 230.
In this embodiment, the energy storage module 230 makes the voltage of the peak sampling signal VCAP very slowly decrease by the discharging action of the discharging resistor R1 with a larger resistance value, and the voltage of the boosting signal PVDD output by the BOOST circuit unit 221 also slowly decreases. When the amplitude of the first differential signal VON or the second differential signal VOP input by the dynamic BOOST system 10 becomes larger, the peak sampling signal VCAP will resample to the higher peak voltage of the first differential signal VON or the second differential signal VOP, thereby realizing the automatic voltage regulation output of the BOOST circuit unit 221.
It should be noted that the ports or pins with the same reference numerals in the specification and the drawings of the present invention are connected.
The above embodiments are only for illustrating the technical solution of the present invention, and not for limiting the same; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (8)
1. The dynamic boosting system is characterized by comprising a peak value sampling and holding circuit and a controlled boosting circuit;
The sampling output end of the peak value sampling and holding circuit is connected with the input end of the controlled boost circuit;
The peak value sampling and holding circuit is connected with the first differential signal, the second differential signal and the clock signal, detects the peak value of the first differential signal and the peak value of the second differential signal according to the clock signal, compares the peak value with the peak value of the first differential signal and the peak value of the second differential signal, outputs a peak value sampling signal with a high peak value to the controlled boost circuit, and outputs a boost signal after the controlled boost circuit is connected with the voltage signal to perform voltage boost processing, wherein the amplitude of the boost signal is controlled by the peak value sampling signal;
The peak value sampling and holding circuit comprises a first voltage following module, a second voltage following module, a first switch control module, a second switch control module, a first peak value detection module and a second peak value detection module;
The output end of the first voltage following module is commonly connected with the first input end of the first peak detection module and the input end of the first switch control module, and the output end of the first peak detection module is connected with the controlled end of the first switch control module; the output end of the second voltage following module is commonly connected with the first input end of the second peak detection module and the input end of the second switch control module, and the output end of the second peak detection module is connected with the controlled end of the second switch control module; the output end of the first switch control module and the output end of the second switch control module are connected together to form a sampling output end of the peak value sampling and holding circuit; the sampling output end is respectively connected with the second input end of the first peak detection module and the second input end of the second peak detection module;
the third input end of the first peak detection module and the third input end of the second peak detection module are simultaneously connected with the clock signal;
the sampling output end outputs the peak value sampling signal;
the first voltage following module receives the first differential signal and outputs a first following signal to the first switch control module and the first peak detection module respectively;
The first peak detection module receives the first following signal, the peak sampling signal and the clock signal, and compares the first following signal with the peak sampling signal according to the clock signal; when the amplitude of the first following signal is higher than that of the peak sampling signal, the first peak detection module controls the first switch control module to be conducted so that the first switch control module outputs the first following signal; when the amplitude of the first following signal is not higher than the amplitude of the peak sampling signal, the first peak detection module controls the first switch control module to be disconnected, so that the first switch control module keeps the previous output;
The second voltage following module receives the second differential signal and outputs a second following signal to the second switch control module and the second peak detection module respectively;
The second peak detection module receives the second following signal, the peak sampling signal and the clock signal, and compares the second following signal with the peak sampling signal according to the clock signal; when the amplitude of the second following signal is higher than that of the peak sampling signal, the second peak detection module controls the second switch control module to be conducted so that the second switch control module outputs the second following signal; when the amplitude of the second following signal is not higher than the amplitude of the peak sampling signal, the second peak detection module controls the second switch control module to be disconnected, so that the second switch control module keeps the previous output;
the controlled boost circuit comprises a voltage-controlled current source module and a boost module;
The input end of the voltage-controlled current source module is used as the input end of the controlled boost circuit to be connected with the sampling output end of the peak value sampling and holding circuit, the output end of the voltage-controlled current source module is connected with the input end of the boost module, and the output end of the boost module is the output end of the controlled boost circuit;
The voltage-controlled current source module receives the peak sampling signal and controls the output current signal according to the peak sampling signal; the voltage boosting module receives the current signal and the voltage signal, performs voltage boosting processing on the voltage signal according to the magnitude of the current signal, and outputs the voltage boosting signal.
2. The dynamic boost system of claim 1, wherein the first voltage follower module comprises a first operational amplifier, a forward input of the first operational amplifier being an input of the first voltage follower module, a reverse input of the first operational amplifier being commonly connected with an output thereof to form an output of the first voltage follower module;
The second voltage following module comprises a second operational amplifier, the forward input end of the second operational amplifier is the input end of the second voltage following module, and the reverse input end of the second operational amplifier and the output end of the second operational amplifier are connected together to form the output end of the second voltage following module.
3. The dynamic boost system of claim 1, wherein the first switch control module comprises a first PMOS transistor, a source of the first PMOS transistor is an input terminal of the first switch control module, a gate of the first PMOS transistor is a controlled terminal of the first switch control module, and a drain of the first PMOS transistor is an output terminal of the first switch control module;
The second switch control module comprises a second PMOS tube, the source electrode of the second PMOS tube is the input end of the second switch control module, the gate electrode of the second PMOS tube is the controlled end of the second switch control module, and the drain electrode of the second PMOS tube is the output end of the second switch control module.
4. The dynamic boost system of claim 1, wherein the first peak detection module comprises a first voltage comparator and a first trigger, wherein a reverse input of the first voltage comparator is a first input of the first peak detection module, a forward input of the first voltage comparator is a second input of the first peak detection module, an output of the first voltage comparator is connected to the first input of the first trigger, a second input of the first trigger is a third input of the first peak detection module, and an output of the first trigger is an output of the first peak detection module;
The second peak detection module comprises a second voltage comparator and a second trigger, wherein the reverse input end of the second voltage comparator is the first input end of the second peak detection module, the forward input end of the second voltage comparator is the second input end of the second peak detection module, the output end of the second voltage comparator is connected with the first input end of the second trigger, the second input end of the second trigger is the third input end of the second peak detection module, and the output end of the second trigger is the output end of the second peak detection module.
5. The dynamic boost system of claim 4, wherein said first flip-flop is a first RS flip-flop, an S terminal of said first RS flip-flop is a first input terminal of said first flip-flop, an R terminal of said first RS flip-flop is a second input terminal of said first flip-flop, and a forward output terminal of said first RS flip-flop is an output terminal of said first flip-flop;
The second trigger is a second RS trigger, an S end of the second RS trigger is a first input end of the second trigger, an R end of the second RS trigger is a second input end of the second trigger, and a forward output end of the second RS trigger is an output end of the second trigger.
6. The dynamic BOOST system of claim 1, wherein the BOOST module includes a BOOST circuit unit, a first feedback unit, and a second feedback unit;
The current signal input end of the BOOST circuit unit, the first end of the first feedback unit and the first end of the second feedback unit are commonly connected to form the input end of the BOOST module, the BOOST signal output end of the BOOST circuit unit and the second end of the first feedback unit are commonly connected to form the output end of the BOOST module, and the second end of the second feedback unit is grounded.
7. The dynamic boost system of claim 1, wherein said controlled boost circuit further comprises an energy storage module for maintaining a voltage of said peak sampled signal;
the first end of the energy storage module is connected with the input end of the controlled boost circuit, and the second end of the energy storage module is connected with the ground.
8. The dynamic boost system of claim 7, wherein said energy storage module includes an energy storage capacitor and a discharge resistor;
The first end of the energy storage capacitor and the first end of the discharge resistor are connected together to form the first end of the energy storage module, and the second end of the energy storage capacitor and the second end of the discharge resistor are connected together to form the second end of the energy storage module.
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