CN109767519A - The monitoring system and method for multi channel signals - Google Patents
The monitoring system and method for multi channel signals Download PDFInfo
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- CN109767519A CN109767519A CN201811633277.2A CN201811633277A CN109767519A CN 109767519 A CN109767519 A CN 109767519A CN 201811633277 A CN201811633277 A CN 201811633277A CN 109767519 A CN109767519 A CN 109767519A
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Abstract
The invention discloses the monitoring system and methods of multi channel signals, are related to field of signal processing.The system includes: data collecting plate card and host computer, data collecting plate card includes: fpga chip, synchronous DRAM group, first processor and the first hard disk, fpga chip is provided with multiple data collection terminal mouths, it connects one to one respectively with the multiplexer channel of aircraft, host computer includes: second processor and display.Monitoring system and method provided by the invention, realize the real-time monitoring to aircraft multi-channel data, it can satisfy the data monitoring demand that strong real-time, data volume are big, data transfer rate is high, and storage equipment at different levels all has good versatility and expansibility, it is practical.
Description
Technical field
The present invention relates to field of signal processing more particularly to the monitoring system and methods of multi channel signals.
Background technique
In aerospace field, the operational data important in inhibiting in each channel of aircraft, the work number of aircraft are monitored
According to having the characteristics that strong real-time, data transfer rate are high, data volume is big.
Existing signal monitoring method or device mostly the acquisition just for a small number of channel high speed signals and storage strategy into
Gone optimization, can not the important informations such as change procedure, transformation period, pulse width to most of signal be observed or survey
Amount, is unable to satisfy higher data monitoring demand.
Summary of the invention
The technical problem to be solved by the present invention is in view of the deficiencies of the prior art, provide a kind of monitoring of multi channel signals
System and a kind of monitoring method of multi channel signals.
The technical scheme to solve the above technical problems is that
A kind of monitoring system of multi channel signals, comprising: data collecting plate card and host computer, the data collecting plate card packet
Include: fpga chip, synchronous DRAM group, first processor and the first hard disk, the fpga chip are provided with multiple
Data collection terminal mouth connects one to one with the multiplexer channel of aircraft respectively, and the host computer includes: second processor and shows
Show device, in which:
The fpga chip is used to monitor the multiplexer channel of the aircraft by multiple data collection terminal mouths respectively
Numerical value, and when monitoring the numerical value change in any channel, according to the first protocol format between the first processor
Primary group packet is carried out to change information, and sends the synchronous dynamic random for the change information after primary group packet and stores
It is stored in device group；
After the change information that is stored in the synchronous DRAM group meets the first preset condition, described the
One processor sends the change information in first hard disk and stores for taking out the change information；
After the change information being stored in first hard disk meets the second preset condition, the first processor is also used
It takes out, the change information is carried out according to the second protocol format between the host computer secondary in by the change information
Group packet, and the change information after secondary group of packet is sent to the second processor；
The second processor is for unpacking the change information after secondary group of packet, the institute that will be obtained after unpacking
Change information is stated to be shown by the display.
The beneficial effects of the present invention are: monitoring system provided by the invention, passes through the multichannel of fpga chip sense aircraft
The numerical value in channel realizes the real-time monitoring to aircraft multi-channel data, and passes through synchronous DRAM group, first
Processor and the first hard disk are stored and are acquired to data, at the transformation by second processor and display logarithm
Reason and display, realize and the important informations such as the change procedure, transformation period, pulse width of data are observed or are measured, energy
Enough meet the data monitoring demand that strong real-time, data volume are big, data transfer rate is high, and storage equipment at different levels all have it is good general
Property and expansibility, it is practical.
The another technical solution that the present invention solves above-mentioned technical problem is as follows:
A kind of monitoring method of multi channel signals, is monitored by monitoring system, and the monitoring system includes: that data are adopted
Collect board and host computer, the data collecting plate card include: fpga chip, synchronous DRAM group, first processor
With the first hard disk, the fpga chip is provided with multiple data collection terminal mouths, corresponds respectively with the multiplexer channel of aircraft
Connection, the host computer includes: second processor and display, and the monitoring method includes:
The fpga chip monitors the numerical value of the multiplexer channel of the aircraft by multiple data collection terminal mouths respectively, and
When monitoring the numerical value change in any channel, according to the first protocol format between the first processor to change information
Primary group packet is carried out, and sends the change information after primary group packet in the synchronous DRAM group and carries out
Storage；
After the change information that is stored in the synchronous DRAM group meets the first preset condition, described the
One processor takes out the change information, sends the change information in first hard disk and stores；
After the change information that is stored in first hard disk meets the second preset condition, the first processor is by institute
Change information taking-up is stated, secondary group of packet is carried out to the change information according to the second protocol format between the host computer,
And the change information after secondary group of packet is sent to the second processor；
The second processor unpacks the change information after secondary group of packet, the change that will be obtained after unpacking
Change information to be shown by the display.
The advantages of additional aspect of the invention, will be set forth in part in the description, and will partially become from the following description
It obtains obviously, or practice is recognized through the invention.
Detailed description of the invention
Fig. 1 is the structural framing schematic diagram that the embodiment of the monitoring system of multi channel signals of the present invention provides；
Fig. 2 is the structural framing figure that the other embodiments of the monitoring system of multi channel signals of the present invention provide；
Fig. 3 is the flow diagram that the embodiment of the monitoring method of multi channel signals of the present invention provides.
Specific embodiment
The principle and features of the present invention will be described below with reference to the accompanying drawings, and illustrated embodiment is served only for explaining the present invention,
It is not intended to limit the scope of the present invention.
As shown in Figure 1, the structural framing figure that provides of embodiment of the monitoring system for multi channel signals of the present invention, the system
It include: data collecting plate card 1 and host computer 2, data collecting plate card 1 includes: fpga chip 11, synchronous DRAM group
12, first processor 13 and the first hard disk 14, fpga chip 11 are provided with multiple data collection terminal mouths, more with aircraft respectively
Paths connect one to one, and host computer 2 includes: second processor 21 and display 22.
Preferably, fpga chip 11 can use the XC7K325T cake core of Xilinx company, support PCI Express
The mainstream standards such as Gen3 and 10 Gigabit Ethernet；First processor 13 can select the P2041 of Freescale company
Four core processors, running frequency may be up to 1.5GHz, and there are three 2 controller of PCI Express Gen and two SATA 2.0 for tool
Controller；Each synchronous DRAM in synchronous DRAM group 12 can be DDR3 SDRAM, can adopt
With the MT41J256M16RE-15EIT of MICRON company, monolithic memory capacity is 256Mbytes；First hard disk 14 can be SSD
Hard disk meets the specification of SATA 2.0, memory capacity 1Tbytes.
The numerical value of multiplexer channel of the fpga chip 11 for monitoring aircraft by multiple data collection terminal mouths respectively, and work as
When monitoring the numerical value change in any channel, change information is carried out according to the first protocol format between first processor 13
Primary group packet, and send the change information after primary group packet in synchronous DRAM group 12 and store.
It should be noted that the quantity in the channel specifically acquired can be arranged according to actual needs, for example, working as fpga chip
When the XC7K325T cake core of 11 use Xilinx companies, the data of 32 paths can be acquired simultaneously.
After the change information being stored in synchronous DRAM group 12 meets the first preset condition, the first processing
Device 13 sends change information in the first hard disk 14 and stores for taking out change information.
It should be noted that the first preset condition can be arranged according to actual needs, for example, the first preset condition can be
After the change information of synchronous DRAM group 12 writes full 1024 byte, fpga chip 11 is issued to first processor 13
It interrupts, processor initiates read operation to fpga chip 11, and fpga chip 11 will be cached in synchronous DRAM group 12
Data are read.
In another example the first preset condition can also be according to predetermined period, processor initiates read operation to fpga chip 11,
Fpga chip 11 reads the data for being cached in synchronous DRAM group 12.
It should be understood that the quantity of synchronous DRAM group 12 can be arranged according to actual needs, for example, may include
1 synchronous DRAM also may include 2 synchronous DRAMs, carry out read-write operation alternately, mention
High read-write efficiency.
After the change information that is stored in the first hard disk 14 meets the second preset condition, first processor 13 be also used to by
Change information takes out, and carries out secondary group of packet to change information according to the second protocol format between host computer 2, and by secondary group
Change information after packet is sent to second processor 21.
It should be noted that the second preset condition can be arranged according to actual needs, for example, the second preset condition can be
Preset threshold, when the data volume of the change information in the first hard disk 14 reaches the threshold value of setting, first processor 13 will change
Information is taken out.
In another example the second preset condition can also be for according to predetermined period, first processor 13 takes out change information.
Second processor 21 is for unpacking the change information after secondary group of packet, the change information that will be obtained after unpacking
It is shown by display 22.
Preferably, second processor 21 passes through the data processing software prestored and carries out solving Packet analyzing etc. to change information
Reason extracts the transformation period of each channel data of aircraft, the channel number of variation and three keys of digital quantity value for changing channel
After information, the real-time rendering waveform in the waveform display interface of display 22.Waveform display interface includes horizontal, vertical two coordinates
Axis, respectively indicates sampling time and each paths number, and the digital quantity in each channel passes through high and low level and reflects that it changed
Journey.The duration of high and low level can by way of adding gage automatic measurement, time precision it is settable.
Monitoring system provided in this embodiment is realized by the numerical value of the multiplexer channel of 11 sense aircraft of fpga chip
To the real-time monitoring of aircraft multi-channel data, the high-speed figure amount of 32 paths, frequency acquisition highest can be acquired simultaneously
Up to 400MB/s, and data are deposited by synchronous DRAM group 12, first processor 13 and the first hard disk 14
Storage and acquisition, are processed and displayed by the transformation of 22 logarithm of second processor 21 and display, are realized to data
The important informations such as change procedure, transformation period, pulse width are observed or measure, support to the signals of above-mentioned 32 paths into
Row real-time display can satisfy the data monitoring demand that strong real-time, data volume are big, data transfer rate is high, and storage equipment at different levels is equal
It is practical with good versatility and expansibility.
Below with reference to Fig. 2, some optional embodiments of the invention are illustrated.
Optionally, in some embodiments, fpga chip 11 is specifically used for when monitoring the numerical value change in any channel,
Obtain present system time, the channel number in any channel and the digital quantity value in any channel, according to first processor 13
Between the first protocol format primary group packet is carried out to present system time, channel number and digital quantity value.
Optionally, in some embodiments, second processor 21 is specifically used for carrying out the change information after secondary group of packet
It unpacks, obtains present system time, channel number and digital quantity value, and according to present system time, channel number and number
Word magnitude real-time rendering waveform shows the waveform of drafting by display 22.
Wherein, waveform display interface includes horizontal, vertical two reference axis, respectively indicates sampling time and each paths number, often
The digital quantity in a channel passes through high and low level and reflects its change procedure.The duration of high and low level can be by adding gage
Mode automatic measurement, time precision is settable.
Optionally, in some embodiments, synchronous DRAM group 12 includes: the storage of the first synchronous dynamic random
Device and the second synchronous DRAM, the first synchronous DRAM and the second synchronous DRAM are used for
Change information is written and is read by way of ping-pong operation.
Preferably, the first synchronous DRAM can be DDR3 SDRAM121, the storage of the second synchronous dynamic random
Device can be DDR3 SDRAM122.
It should be understood that, that is, in the odd buffer period, write operation is carried out to DDR3 SDRAM121 by way of ping-pong operation,
Read operation is carried out to DDR3 SDRAM122, in even number buffer circle, write operation is carried out to DDR3 SDRAM122, to DDR3
SDRAM121 carries out read operation.Use ping-pong operation that message transmission rate and storage efficiency inside fpga chip 11 are obtained
To significantly being promoted.
Optionally, in some embodiments, host computer 2 further include: the second hard disk 23, second processor 21 are also used to solve
The change information obtained after packet is sent in the second hard disk 23 and is stored.
Preferably, the second hard disk 23 can be solid state hard disk.
By increasing solid state hard disk, the application can also be made to realize wave shape playback, pass through the data in second processor 21
The time interval that processing software selection needs to observe, data processing software read corresponding data from solid state hard disk, and according to upper
The method stated in embodiment draws waveform.
Optionally, in some embodiments, data collecting plate card 1 further include: interchanger 15, at fpga chip 11 and first
It is connected between reason device 13 by interchanger 15.
Preferably, interchanger 15 can be PCIE interchanger 15.
For example, can be sent out by PCIE bus to fpga chip 11 when processor initiates read operation to fpga chip 11
Play read operation.
It should be understood that the data that the PCIE read operation that processor is initiated to FPGA can be read using dma mode, a DMA
Packet size is 128 bytes.
Optionally, in some embodiments, data collecting plate card 1 further include: connector 16, network interface card 17 and SATA interface
18, processor passes sequentially through interchanger 15, connector 16 and network interface card 17 and connect with second processor 21.
First processor 13 is connect by SATA interface 18 with the first hard disk 14.
Preferably, connector 16 can be XMC connector, and interchanger 17 can be PCIE interchanger, and network interface card 17 can be
Ten thousand mbit ethernet cards.
It should be understood that first processor 13 is configured with 1 PCIE x4 interface access PCIE interchanger；PCIE interchanger uses
16 mouthfuls of Gen2PCI-E exchange chip PEX8624 of PLX company, up going port is connected with the PCI-E x4 of processor, wherein 12
Eight connection standard x MC connectors of a down going port, then ten thousand mbit ethernet cards are connected to by XMC connector；Other four downlink
Mouth, which is connected to fpga chip 11, to carry out data transmission.
It is appreciated that in some embodiments, may include such as implementation optional some or all of in the various embodiments described above
Mode.
As shown in figure 3, the flow diagram that provides of embodiment of the monitoring method for multi channel signals of the present invention, this method
It is monitored by monitoring system, monitoring system includes: data collecting plate card and host computer, and data collecting plate card includes: FPGA
Chip, synchronous DRAM group, first processor and the first hard disk, fpga chip are provided with multiple data collection terminals
Mouthful, it connects one to one respectively with the multiplexer channel of aircraft, host computer includes: second processor and display, the monitoring side
Method includes:
S1, fpga chip monitor the numerical value of the multiplexer channel of aircraft by multiple data collection terminal mouths respectively, and when prison
When measuring the numerical value change in any channel, change information is carried out according to the first protocol format between first processor primary
Group packet, and send the change information after primary group packet in synchronous DRAM group and store；
S2, after the change information being stored in synchronous DRAM group meets the first preset condition, at first
Reason device takes out change information, sends change information in the first hard disk and stores；
S3, after the change information being stored in the first hard disk meets the second preset condition, first processor believes variation
Breath takes out, and carries out secondary group of packet to change information according to the second protocol format between host computer, and will be after secondary group of packet
Change information is sent to second processor；
S4, second processor unpack the change information after secondary group of packet, the change information obtained after unpacking are led to
Display is crossed to be shown.
Optionally, in some embodiments, when monitoring the numerical value change in any channel, according to first processor it
Between the first protocol format primary group packet is carried out to change information, specifically include:
When monitoring the numerical value change in any channel, obtain present system time, any channel channel number and
The digital quantity value in any channel；
According to the first protocol format between first processor to present system time, channel number and digital quantity value
Carry out primary group packet.
Optionally, in some embodiments, second processor unpacks the change information after secondary group of packet, will unpack
The change information obtained afterwards is shown by display, is specifically included:
Second processor unpacks the change information after secondary group of packet, obtain present system time, channel number with
And digital quantity value；
Second processor will be drawn according to present system time, channel number and digital quantity value real-time rendering waveform
Waveform shown by display.
Optionally, in some embodiments, synchronous DRAM group includes: the first synchronous DRAM
With the second synchronous DRAM, the first synchronous DRAM and the second synchronous DRAM pass through table tennis
The mode of pang operation is written and is read to change information.
It is appreciated that in some embodiments, may include such as implementation optional some or all of in the various embodiments described above
Mode.
It should be noted that the present embodiment is embodiment of the method corresponding with above-mentioned each product embodiments, for this implementation
In example the explanation of each optional embodiment can with reference in above-mentioned each product embodiments pair it should be noted that details are not described herein.
Reader should be understood that in the description of this specification reference term " one embodiment ", " is shown " some embodiments "
The description of example ", " specific example " or " some examples " etc. mean specific features described in conjunction with this embodiment or example, structure,
Material or feature are included at least one embodiment or example of the invention.In the present specification, above-mentioned term is shown
The statement of meaning property need not be directed to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described
It may be combined in any suitable manner in any one or more of the embodiments or examples.In addition, without conflicting with each other, this
The technical staff in field can be by the spy of different embodiments or examples described in this specification and different embodiments or examples
Sign is combined.
It is apparent to those skilled in the art that for convenience of description and succinctly, the dress of foregoing description
The specific work process with unit is set, can refer to corresponding processes in the foregoing method embodiment, details are not described herein.
In several embodiments provided herein, it should be understood that disclosed device and method can pass through it
Its mode is realized.For example, the apparatus embodiments described above are merely exemplary, for example, the division of unit, only
A kind of logical function partition, there may be another division manner in actual implementation, for example, multiple units or components can combine or
Person is desirably integrated into another system, or some features can be ignored or not executed.
More than, only a specific embodiment of the invention, but scope of protection of the present invention is not limited thereto, and it is any to be familiar with
Those skilled in the art in the technical scope disclosed by the present invention, can readily occur in various equivalent modifications or substitutions,
These modifications or substitutions should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be wanted with right
Subject to the protection scope asked.
Claims (10)
1. a kind of monitoring system of multi channel signals characterized by comprising data collecting plate card and host computer, the data
Analog input card includes: fpga chip, synchronous DRAM group, first processor and the first hard disk, the fpga chip
Multiple data collection terminal mouths are provided with, are connected one to one respectively with the multiplexer channel of aircraft, the host computer includes: second
Processor and display, in which:
The fpga chip is used to monitor the number of the multiplexer channel of the aircraft by multiple data collection terminal mouths respectively
Value, and when monitoring the numerical value change in any channel, according to the first protocol format between the first processor to change
Change information and carry out primary group packet, and sends the synchronous DRAM group for the change information after primary group packet
In stored；
After the change information being stored in the synchronous DRAM group meets the first preset condition, at described first
Reason device sends the change information in first hard disk and stores for taking out the change information；
After the change information that is stored in first hard disk meets the second preset condition, the first processor be also used to by
The change information takes out, and carries out secondary group to the change information according to the second protocol format between the host computer
Packet, and the change information after secondary group of packet is sent to the second processor；
The second processor is for unpacking the change information after secondary group of packet, the change that will be obtained after unpacking
Change information to be shown by the display.
2. monitoring system according to claim 1, which is characterized in that the fpga chip is specifically used for any when monitoring
When the numerical value change in channel, present system time, the channel number in any channel and the number in any channel are obtained
Word magnitude, according to the first protocol format between the first processor to the present system time, the channel number
And the digital quantity value carries out primary group packet.
3. monitoring system according to claim 2, which is characterized in that the second processor is specifically used for secondary group of packet
The change information afterwards is unpacked, and the present system time, the channel number and the digital quantity value are obtained, and
According to the present system time, the channel number and the digital quantity value real-time rendering waveform, the waveform of drafting is led to
The display is crossed to be shown.
4. monitoring system according to claim 1, which is characterized in that the synchronous DRAM group includes:
One synchronous DRAM and the second synchronous DRAM, first synchronous DRAM and described
Second synchronous DRAM is for being written and being read to the change information by way of ping-pong operation.
5. monitoring system according to claim 1, which is characterized in that the host computer further include: the second hard disk, described
The change information that two processors are also used to obtain after unpacking, which is sent in second hard disk, to be stored.
6. monitoring system according to any one of claim 1 to 5, which is characterized in that the data collecting plate card also wraps
Include: interchanger is connected between the fpga chip and the first processor by the interchanger.
7. monitoring system according to claim 6, which is characterized in that the data collecting plate card further include: connector and
Network interface card, the processor pass sequentially through the interchanger, the connector and the network interface card and connect with the second processor.
8. a kind of monitoring method of multi channel signals, which is characterized in that be monitored by monitoring system, the monitoring system packet
Include: data collecting plate card and host computer, the data collecting plate card include: fpga chip, synchronous DRAM group,
One processor and the first hard disk, the fpga chip are provided with multiple data collection terminal mouths, respectively with the multiplexer channel of aircraft
It connects one to one, the host computer includes: second processor and display, and the monitoring method includes:
The fpga chip monitors the numerical value of the multiplexer channel of the aircraft by multiple data collection terminal mouths respectively, and when prison
When measuring the numerical value change in any channel, change information is carried out according to the first protocol format between the first processor
Primary group packet, and send the change information after primary group packet in the synchronous DRAM group and deposit
Storage；
After the change information being stored in the synchronous DRAM group meets the first preset condition, at described first
Reason device takes out the change information, sends the change information in first hard disk and stores；
After the change information that is stored in first hard disk meets the second preset condition, the first processor is by the change
Change information to take out, secondary group of packet is carried out to the change information according to the second protocol format between the host computer, and will
The change information after secondary group of packet is sent to the second processor；
The second processor unpacks the change information after secondary group of packet, and the variation obtained after unpacking is believed
Breath is shown by the display.
9. monitoring method according to claim 8, which is characterized in that when monitoring the numerical value change in any channel, press
Primary group packet is carried out to change information according to the first protocol format between the first processor, is specifically included:
When monitoring the numerical value change in any channel, obtain present system time, any channel channel number and
The digital quantity value in any channel；
According to the first protocol format between the first processor to the present system time, the channel number and
The digital quantity value carries out primary group packet.
10. monitoring method according to claim 9, which is characterized in that the second processor is to the institute after secondary group of packet
It states change information to be unpacked, the change information obtained after unpacking is shown by the display, is specifically included:
The second processor unpacks the change information after secondary group of packet, obtains the present system time, institute
State channel number and the digital quantity value；
The second processor is according to the present system time, the channel number and the digital quantity value real-time rendering wave
Shape, and the waveform of drafting is shown by the display.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110727637A (en) * | 2019-12-18 | 2020-01-24 | 广东高云半导体科技股份有限公司 | FPGA chip and electronic equipment |
| CN111578780A (en) * | 2020-05-09 | 2020-08-25 | 北京深蓝航天科技有限公司 | Liquid rocket test launch control system time sequence monitoring method based on Qt |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070118864A1 (en) * | 2004-11-03 | 2007-05-24 | Sony Corporation | Method and system for processing wireless digital multimedia |
| CN202041643U (en) * | 2011-04-01 | 2011-11-16 | 北京遥测技术研究所 | Recording type satellite signal simulator |
| CN102279019A (en) * | 2011-06-28 | 2011-12-14 | 华南理工大学 | High-power intermediate frequency induction furnace data acquisition and monitoring device |
| CN107707294A (en) * | 2017-09-26 | 2018-02-16 | 徐跃登 | A kind of signal transmitting and receiving debugging system of satellite antenna |
-
2018
- 2018-12-29 CN CN201811633277.2A patent/CN109767519B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070118864A1 (en) * | 2004-11-03 | 2007-05-24 | Sony Corporation | Method and system for processing wireless digital multimedia |
| CN202041643U (en) * | 2011-04-01 | 2011-11-16 | 北京遥测技术研究所 | Recording type satellite signal simulator |
| CN102279019A (en) * | 2011-06-28 | 2011-12-14 | 华南理工大学 | High-power intermediate frequency induction furnace data acquisition and monitoring device |
| CN107707294A (en) * | 2017-09-26 | 2018-02-16 | 徐跃登 | A kind of signal transmitting and receiving debugging system of satellite antenna |
Non-Patent Citations (2)
| Title |
|---|
| LU PING ET AL.: "A Data Acquisition System for Methane Drainage Based on ARM and FPGA", 《2011 INTERNATIONAL CONFERENCE ON COMPUTER DISTRIBUTED CONTROL AND INTELLIGENT ENVIRONMENTAL MONITORING》 * |
| 赵华影: "基于FPGA的数据高速采集系统设计", 《中国优秀硕士学位论文全文数据库信息科技辑》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110727637A (en) * | 2019-12-18 | 2020-01-24 | 广东高云半导体科技股份有限公司 | FPGA chip and electronic equipment |
| CN110727637B (en) * | 2019-12-18 | 2020-11-20 | 广东高云半导体科技股份有限公司 | FPGA chip and electronic equipment |
| CN111578780A (en) * | 2020-05-09 | 2020-08-25 | 北京深蓝航天科技有限公司 | Liquid rocket test launch control system time sequence monitoring method based on Qt |
| CN111578780B (en) * | 2020-05-09 | 2022-06-28 | 江苏深蓝航天有限公司 | Qt-based liquid rocket test and launch control system time sequence monitoring method |
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| CN109767519B (en) | 2021-07-20 |
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