CN109753374B

CN109753374B - Memory bit level repair method

Info

Publication number: CN109753374B
Application number: CN201711059421.1A
Authority: CN
Inventors: 黄志仁
Original assignee: Zhuhai Xingxin Storage Technology Co ltd
Current assignee: Zhuhai Xingxin Storage Technology Co ltd
Priority date: 2017-11-01
Filing date: 2017-11-01
Publication date: 2022-05-03
Anticipated expiration: 2037-11-01
Also published as: CN109753374A

Abstract

The invention provides a memory bit-level repairing method, which comprises the following steps of firstly providing a memory with a plurality of memory bytes, wherein each memory byte contains M bits, M is a positive integer, and a repairing byte is added corresponding to the memory byte, wherein N repairing bits are contained for repairing, N is also a positive integer and is less than M, detecting whether all memory bytes and repairing bytes have bad bits, if not, finishing repairing the memory, if so, replacing all memory bytes and repairing bytes with the bad bits corresponding to the quantity of the bad bits of the memory byte by the non-bad bits with the same quantity as the self-repairing bytes, so as to finish repairing each memory byte and repairing byte in the memory. The invention provides a method for simply and quickly repairing memory bits, which can reduce the number of redundant memory bits for repairing.

Description

Memory bit level repair method

Technical Field

The present invention relates to a method for repairing defective memory devices, and more particularly to a method for repairing memory bit levels.

Background

In the chip design, the demand for various memories, such as Random Access Memory (RAM), Read-Only Memory (ROM), Non-Volatile Memory (NVRAM), Dynamic Random Access Memory (DRAM), Embedded Flash (Embedded Flash), or Embedded DRAM (Embedded DRAM), is increasing, and regardless of the product, the quality, reliability, or cost maintenance is an important study for the manufacturer, and repeated and reliable detection and repair must be performed on the Memory components in the chip Memory to improve the reliability of the product, and to improve the quality and competitiveness of the chip.

Conventional repair methods, such as Error-Correcting Code (ECC) or repair method (Redundancy), provide too many corrected Error bits or bits for replacement, such as Hamming Code (Hamming Code) in Error correction, which is one method at 2ⁿIn the memory bits, n +1 bits are needed for repairing one bit, and if the 128 bits are 7 powers of 2, 7+1 repair bits are needed, so that 128+8 bits are needed to be generated in total, and the repair method needs excessive bits, and the newly increased bits account for 6.25% of the original bits; in addition, another BCH repair method (Bose-Chaudhuri-Hocquenghem Code) is adopted at 2ⁿOf the memory bits, 2 × n +1 bits are needed for repairing two bits. BCH repair method increases the number of bits to be repairedBoth error correction methods require a large number of correction bits or bits to replace. In addition to the huge overhead of bits for repair, the repair method usually consumes a small number of bits because of the bit address for comparison with the address of the fuse array for storing the defect, but the repair method usually consumes too many bits because the bit density in the repair array is too high, which may cause a bit failure, and the bits of the whole array are all replaced.

Disclosure of Invention

The main objective of the present invention is to provide a memory bit-level repair method, which provides a simple repair method, and adds repair bits for repair when forming memory bytes, wherein the number of repair bits for repair is much simpler than that of the conventional repair method, and the number of repair bits added is also lower than that of the conventional repair method.

Another objective of the present invention is to provide a memory bit-level repair method, wherein a minimum number of repair bits are added to avoid some bad bits during the manufacturing of a memory byte, and when there is a bad bit, the repair bits can be used to replace the lack number of bad bits, so that the memory byte can operate smoothly.

In order to achieve the above-mentioned purpose, the bit line and word line repairing method can be used on the memory to repair the bit line and word line level defects and bit level defects that can not be burnt or written to the third state beyond the memory state 0 or 1, the invention provides a memory bit level repairing method, firstly providing all a plurality of memory bytes in the memory, each memory byte has M bits, and M is a positive integer, adding a repairing byte relative to the memory byte, it has N repair bits for repair, N is a positive integer and N is less than M, detects whether all memory bytes and repair bytes have bad bits, to end the repair of all memory bytes, or to put all memory bytes and repair bytes with bad bits, and replacing the non-excellent bits in the repair bytes by the number of the non-excellent bits of the corresponding memory bytes so as to complete the repair of all the memory bytes in the memory.

In the invention, before repairing bytes to replace bad bits of memory bytes, the bad bits of the memory bytes are burnt or written into a third state except the memory state 0 or 1, the bad bits in the repairing bytes are marked first, and the method is to burn the bad bits or write the bad bits into the third state except the memory state 0 or 1.

In the present invention, the number of bad bits of all memory bytes does not exceed N.

In the present invention, all memory bytes and repair bytes are read, written and disturbed (disturb) from the inside and disturbed by external temperature, magnetic field, electric field to detect if there are bad bits.

In the present invention, after all memory bytes are repaired, the bits in each repaired memory byte are rearranged.

In the present invention, the repaired memory byte and each repair byte are used for data bits and also for parity bits used by Error-Correction Code (ECC), so as to improve the reliability in use.

In the invention, each memory byte and each repair byte can be matched with a bit line and character line repair method to repair the memory byte and repair byte which contain bit line level and character line level defects and can not be burnt out or written into the bit level defects in the third state except the memory state 0 or 1, thereby achieving excellent repair efficiency.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.

FIG. 1 is a diagram illustrating an application architecture of a memory bit level repair method according to the present invention.

FIGS. 2 a-2 d are schematic diagrams illustrating steps of a method for performing memory bit level repair according to the present invention.

FIG. 3 is a flowchart illustrating the steps of a method for repairing a memory bit level according to the present invention.

Description of the symbols:

10. 10' memory byte

12 bit

14 repair site

16 poor position

20 repair bytes.

Detailed Description

The invention utilizes the extra additional repair bit to replace the burden of the extra repair bit brought by the known utilization algorithm, and does not need to replace the bits stored in the whole position because of bad bits, thereby being very convenient and simple, and also reducing the production cost of the memory byte.

First, referring to fig. 1 of the present invention, a memory byte 10 includes M bits 12 and a repair byte 20 includes N repair bits 14 for repair, where M and N are positive integers, and the number of N is less than M, for example, M is equal to 64 bits and N is equal to 8 bits. In addition, the repaired memory bytes and repair bytes can be used for parity bits (parity bits) used by Error-Correction Code (ECC) in addition to data bits, so as to improve the reliability in use.

Next, please refer to fig. 2a to fig. 2d and fig. 3 of the present invention, and refer to fig. 1 to describe in detail how the memory bit level repair method of the present invention is performed. First, in step S10, referring to fig. 2a, a memory byte 10 is provided, where the memory byte 10 has M bits. As shown in step S12, with reference to fig. 2b, the repair byte 20 is appended, and there are N repair bits 14 in the repair byte 20 for repair. As shown in step S14, referring to fig. 2c, it is detected whether there is an bad bit 16 in all the memory bytes 10 and the repair bytes 20, in this embodiment, internal read, write and disturb (disturb) and disturbance of external temperature, magnetic field and electric field are used to detect all the memory bytes 10 and the repair bytes 20, for example, the memory states 0 and 1 are detected for the memory bytes 10 and the repair bytes 20, and if there is a bad bit 16 detected in the memory bytes 10 and the repair bytes 20, the process proceeds to step S16. In step S16, after the detection, if Q bad bits 16 are found in M bits 12 of the memory byte 10, the Q bad bits 16 are burned or written to a third state other than the memory state 0 or 1 from the non-bad repair bits 14 in the repair byte 20 instead of the Q bad bits 16, and all the bad repair bits 14 in the repair byte 20 are marked first, so as to complete the repair of the memory byte 10. And repeating the repairing steps after detection to finish the repairing of the bad bits of all the memory bytes in the memory and the marking of the bad bits of the repaired bit bytes. Thereafter, as shown in step S18, with reference to fig. 2d, when the repair of the memory byte 10 is completed, the memory byte 10 starts to be rearranged to become the memory byte 10'. If no bad bit is found after the detection, the process proceeds to step S20. In step S20, the repair of memory byte 10 is ended.

In the present invention, the number of the bad bits is not limited, but is mainly the number of the bad bits, and mainly does not exceed N, which means that the number of the bad bits should be lower than the number of the repair bits in the memory byte, so that no matter which memory byte is in the memory byte, the simple and effective repair operation can be performed. The number of N disclosed in the present invention is also lower than the number of known repair bits, and the value of N determines the defect rate from the memory, for example, when M is 128, the defect rate is about 10%, N can be 13-16, and the number of bits of memory bytes is not exceeded. If a memory byte actually has too many bad bits, for example, the number of repair bits is exceeded, the memory byte is not easily repaired by the repair method of the present invention, and there are more production factors in the memory byte, and not general memory repair or compensation can be adjusted. Therefore, the repair method provided by the invention can be used under the general production condition, wherein only a few of memory bad bits exist, the repair bits can be effectively replaced, even the repair bits which are not replaced can be remained in the memory bytes, and the repair method can be used when bit loss occurs in the future. The bit line and character line repairing method can repair bit line and character line level defects and bit level defects which cannot be burnt or written into a third state except a memory state 0 or 1, so that when the bit line and character line repairing method is used, the bit line and character line repairing method can be matched to achieve excellent repairing efficiency.

The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.

The principles and embodiments of the present invention have been described herein using specific examples, which are provided only to help understand the method and the core concept of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, the specific embodiments and the application range may be changed. In view of the above, the present disclosure should not be construed as limiting the invention.

Claims

1. A method for repairing a memory bit level, comprising the steps of:

providing a memory, wherein the memory is provided with a plurality of memory bytes, each memory byte is provided with M bits, and M is a positive integer;

adding a repair byte to each memory byte, wherein N repair bits are provided for repair, N is a positive integer and is less than M; and

detecting whether each memory byte and each corresponding repair byte in the memory have bad bits:

if not, the repair of the memory is finished; and

if yes, the memory byte and the repair byte with any bad bit correspond to the quantity of the bad bits of the memory byte, and the equal quantity of the non-bad repair bits in the repair byte are replaced to all the bad bits of the memory byte, so that the repair of each memory byte in the memory and the marking of the bad bits in the repair byte are completed.

2. The method as claimed in claim 1, wherein before replacing the bad bits in the repair byte with the bad bits, the bad bits are first burned out or written to a third state other than memory state 0 or 1, and the bad bits in the repair byte are first marked by burning out or writing to the third state other than memory state 0 or 1.

3. The method of claim 1, wherein said number of said bad bits of said memory byte does not exceed N.

4. The method of claim 1 wherein each of said memory bytes and said repair bytes is read from, written to, and disturbed by internal temperature, magnetic field, and electric field to detect the presence of said bad bit.

5. The method of claim 1, wherein after all memory bytes have been repaired, the bits in each repaired memory byte are rearranged.

6. The method of claim 1, wherein the repaired memory byte and each of the repaired bytes are used for data bits and check bits used for correction bits to improve reliability during use.

7. The method as claimed in claim 1, wherein each of the memory bytes and each of the repair bytes are used in combination with bit line and word line repair methods to repair bit line level and word line level defects and memory bytes that cannot be burned out or written to bit level defects in a third state other than the memory state 0 or 1, thereby achieving excellent repair efficiency.