CN109743059A - A kind of number RC oscillator and automatic calibrating method - Google Patents
A kind of number RC oscillator and automatic calibrating method Download PDFInfo
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Abstract
The invention discloses a kind of number RC oscillator, including comparator circuit, capacitor charge and discharge circuit, reference voltage generation module, clock alignment module and digital signal processing modules；Clock alignment module includes zero crossing counter.The invention has the following advantages that 1, reduce circuit power consumption using digital processing module, reduce output frequency with the variation of process corner；2, a kind of Digital calibration algorithm is proposed, can be realized internal automatic calibration；3, the precision for generating clock is improved using automatic calibration.
Description
Technical field
The present invention relates to the clock source domain of integrated circuit more particularly to a kind of number RC oscillators and automatic calibration side
Method.
Background technique
For RC in piece (resistance capacitance) oscillator, due to CMOS (Complementary Metal-Oxide-
Semiconductor, complementary metal oxide semiconductor) in technique manufacturing process there are fabrication error, the capacitor made
With resistance and MOS (metal (metal), oxide (oxide), semiconductor (semiconductor)) pipe size and design value
Have error.Present CMOS technology usually can be by the precision controlling of gate oxide capacitance within ± 20%, and certain techniques can be with
It is maintained within ± 10%, the error of resistance is generally ± 20%.Due to the influence of fabrication error, lead to Embedded oscillator
Precision is lower.In addition, to also result in piece internal oscillator precision lower for the variation of supply voltage and temperature.
Traditional digital RC oscillator uses controllable current source array or capacitor array, realizes digital calibration.Circuit master
Wanting composition part includes: comparator reference voltage generating module and capacitor charging adjustable current generating module, comparator circuit,
RS shaping circuit, charge and discharge capacitance circuit.Comparator reference voltage generating module and capacitor charging adjustable current generating module
It is made of current source and current mirroring circuit and frequency calibration circuit.The basic functional principle of digital RC oscillator: pass through electric current
Source obtains charging voltage and reference voltage compares to capacitor charging, controls the charge and discharge of capacitor by the output of comparator to produce
Raw running clock.Traditional digital RC oscillator, digital calibration need external MCU control, can not realize automatic calibration, and
Using differential configuration, circuit power consumption is increased.
Therefore, those skilled in the art is dedicated to developing a kind of external MCU of digital processing module substitution
The digital RC oscillator and its automatic calibrating method of (Microcontroller Unit, micro-control unit).
Summary of the invention
In view of the above drawbacks of the prior art, the technical problem to be solved by the present invention is to how improve digital RC oscillation
The clock accuracy of device and the automatic calibration of realization.
To achieve the above object, inventor it has been investigated that, digital RC oscillator using digital processing module can be real
Now automatic calibration, and can reduce the power consumption of circuit.Thus, in one embodiment of the invention, provide a kind of number
RC oscillator, including comparator circuit, capacitor charge and discharge circuit, reference voltage generation module, clock alignment module and number letter
Number processing module；Clock alignment module includes zero crossing counter, and clock signal clk _ OUT and reference clock signal CLK_REF are
Output signal RC_calibration and the RC_success signal of the input of clock alignment module, clock alignment module is made respectively
The reference voltage generated for the input of reference voltage generation module and digital processing signal processing module, reference voltage generation module
Input voltage of the voltage Vc that Vref and capacitor charge and discharge circuit charging generate as the comparison amplifier both ends of comparator circuit,
Input of the output signal of RC_success signal and comparator OP circuit as digital processing signaling module, digital processing signal
Module output mos _ SW signal and clock signal clk _ OUT, MOS_SW signal control the capacitor charge and discharge circuit.
Optionally, in digital RC oscillator in the above-described embodiments, above-mentioned reference voltage generation module is using resistance point
Laminated structure, the size of access resistance is controlled according to above-mentioned RC_calibration, and dynamic controls the size of reference voltage Vref.
Optionally, in the digital RC oscillator in any of the above-described embodiment, above-mentioned clock alignment module is for judging
It states clock signal clk _ OUT and whether above-mentioned reference clock signal CLK_REF is synchronous.
Optionally, in the digital RC oscillator in any of the above-described embodiment, above-mentioned comparator circuit as Vref > Vc,
High level is exported, as Vref < Vc, exports low level.
Optionally, in the digital RC oscillator in any of the above-described embodiment, above-mentioned digital signal processing module is number
Logic circuit.
Optionally, in the digital RC oscillator in any of the above-described embodiment, above-mentioned digital signal processing module is removed comprising D
Musical instruments used in a Buddhist or Taoist mass and Digital Logic gate circuit.When signal RC_success signal is low, the periodical high-low signal of the output of comparator
It is wherein realized all the way as the sampling clock of d type flip flop and is converted to the CLK_OUT clock signal that duty ratio is 50% after removing 2；Separately
Output mos _ SW signal after Digital Logic is delayed Δ t circuit is needed all the way, as the switch of capacitor charge and discharge circuit, wherein
In the Δ t time, CLK_OUT signal changes RC_Calibration signal by clock alignment module, and then changes the defeated of amplifier
Enter the size of signal Vref.When signal RC_success signal is high, the output signal of comparator passes through d type flip flop use all the way
In generating CLK_OUT clock signal, another way needs not move through Digital Logic, can direct output mos _ SW signal.In conclusion
Generating CLK_OUT signal using d type flip flop reduces the power consumption close to half of circuit when obtaining identical frequency, and disappears
In addition to the mismatch of two-way current source.
It optionally, the use of current source is above-mentioned capacitor charge and discharge in the digital RC oscillator in any of the above-described embodiment
Circuit charges, the voltage Vc that above-mentioned capacitor charge and discharge circuit charging generates.
Optionally, in the digital RC oscillator in any of the above-described embodiment, above-mentioned RC_success signal is high level
When, show that calibration has been completed, signal Vref keeps constant voltage, the MOS_SW of above-mentioned digital processing DSP module output at this time
Signal is the low and high level of regular periodicity variation；When above-mentioned RC_success signal is low level, show that circuit is carrying out school
In standard, reference voltage Vref variation causes clock signal clk _ OUT frequency of output constantly to change.
Optionally, in the digital RC oscillator in any of the above-described embodiment, wherein above-mentioned capacitor charge and discharge circuit capacitor
The charge and discharge time be T=t+ Δ t, wherein t be output the clock cycle, Δ t be above-mentioned digital signal processing module caused by
Delay reduces output clock frequency with the variation of process corner, needs to meet Δ t < < t.
In another better embodiment of the invention, using any number RC oscillator in such as above-described embodiment,
Inventor designs a kind of automatic calibrating method, can be realized internal automatic calibration.The following steps are included:
S10, the reference clock signal for converting the fixed cycle, above-mentioned reference clock CLK_REF is in above-mentioned clock alignment module
The middle reference clock signal that the fixed cycle is converted to by internal logic；
S20, time window is calculated, takes above-mentioned fixed cycle half as a time window；
S30, recording clock signal number record above-mentioned clock signal clk _ OUT and pass through zero passage in above-mentioned time window
The number of counter；
S40, judge whether to meet calibration condition；
S50, when meeting calibration condition, calibration complete；
S60, when being unsatisfactory for calibration condition, by the variation of above-mentioned reference voltage Vref, change above-mentioned clock signal
CLK_OUT is returned and is executed S30.
Optionally, automatic calibrating method in the above-described embodiments, above-mentioned steps S60 further include:
S61, above-mentioned clock alignment module change above-mentioned output signal RC_calibration；
S62, in response to the variation of above-mentioned output signal RC_calibration, above-mentioned reference voltage generation module output
Above-mentioned reference voltage Vref changes；
S63, in response to the variation of the reference voltage Vref, the output of above-mentioned comparator circuit changes；
S64, the output variation in response to the comparator OP circuit, the frequency of above-mentioned clock signal clk _ OUT, which is sent, to be become
Change, re-execute the steps S30.
Optionally, the automatic calibrating method in any of the above-described embodiment, the calibration condition in S40 are above-mentioned clock signal
CLK_OUT is above-mentioned time window and running clock period by the number of above-mentioned zero crossing counter in above-mentioned time window
Ratio is two.
Optionally, the automatic calibrating method in any of the above-described embodiment, above-mentioned steps S50 export above-mentioned RC_
Success signal is high level, and above-mentioned clock signal clk _ OUT is desired frequency.
Optionally, the automatic calibrating method in any of the above-described embodiment, the frequency of above-mentioned reference clock CLK_REF
125KHz, above-mentioned fixed cycle are 128us, the frequency 31.25KHz of above-mentioned clock signal clk _ OUT.
A kind of number RC oscillator and automatic calibrating method provided by the invention are realized by a closed loop feedback system
Clock is calibrated automatically, exports stable clock signal.It has the advantage that 1, reduce circuit function using digital processing module
Consumption reduces output frequency with the variation of process corner；2, a kind of Digital calibration algorithm is proposed, can be realized internal automatic calibration；
3, the precision for generating clock is improved using automatic calibration.
It is described further below with reference to technical effect of the attached drawing to design of the invention, specific structure and generation, with
It is fully understood from the purpose of the present invention, feature and effect.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of conventional digital RC oscillator；
Fig. 2 is the structural schematic diagram of a preferred embodiment of the invention；
Fig. 3 is the flow chart of a preferred embodiment of the invention；
Fig. 4 is the step S60 flow chart of a preferred embodiment of the invention.
Specific embodiment
Multiple preferred embodiments of the invention are introduced below with reference to Figure of description, keep its technology contents more clear and just
In understanding.The present invention can be emerged from by many various forms of embodiments, and protection scope of the present invention not only limits
The embodiment that Yu Wenzhong is mentioned.
In the accompanying drawings, the identical component of structure is indicated with same numbers label, everywhere the similar component of structure or function with
Like numeral label indicates.The size and thickness of each component shown in the drawings are to be arbitrarily shown, and there is no limit by the present invention
The size and thickness of each component.Apparent in order to make to illustrate, some places suitably exaggerate the thickness of component in attached drawing.
As shown in Figure 1, using the conventional digital RC oscillator of controllable current source array, circuit main composition part includes:
Reference voltage generation module, adjustable current generating module, comparator circuit CMP1, comparator circuit CMP2, RS shaping circuit,
Charge and discharge capacitance circuit.Reference voltage generation module and adjustable current generating module are by current source and current mirroring circuit and frequency
Rate calibrates circuit composition, basic functional principle are as follows: by adjustable current generating module to capacitor charging, obtains charging electricity
Pressure, obtains reference voltage by reference to voltage generating module, charging voltage and reference voltage are input to comparator circuit, pass through ratio
Output compared with device circuit controls the charge and discharge of capacitor to generate running clock.The derivation that oscillator generates the frequency of clock is as follows:
Inventor's analysis, traditional digital RC oscillator, digital calibration need external MCU control, can not realize automatic
Calibration, and differential configuration is used, increase circuit power consumption.And then inventors have found that number is used in digital RC oscillator
Processing module may be implemented to calibrate automatically, and can reduce the power consumption of circuit.
As shown in Fig. 2, the digital RC oscillator of one embodiment of the invention, including comparator circuit, capacitor charge and discharge
Circuit (in dashed square frame), reference voltage generation module, clock alignment module and digital signal processing module；Clock school
Quasi-mode block includes zero crossing counter, and clock signal clk _ OUT and reference clock signal CLK_REF are the defeated of clock alignment module
Enter, output signal RC_calibration and the RC_success signal of clock alignment module generate mould respectively as reference voltage
The input of block and digital processing module, reference voltage Vref and capacitor charge and discharge circuit caused by reference voltage parameter module are filled
Input voltage of the voltage Vc that electricity generates as the comparison amplifier both ends of comparator OP circuit, RC_success signal and comparator
Input of the output signal of circuit as digital processing DSP module, digital signal processing module output mos _ SW signal and clock
Signal CLK_OUT, MOS_SW signal controls the capacitor charge and discharge circuit.
Reference voltage generation module realizes that dynamic controls the size of reference voltage Vref, can use electric resistance partial pressure structure,
The size of access resistance is controlled by RC_calibration to realize, can also can be realized dynamic control reference using other
The structure of the size of voltage Vref.
Whether clock alignment module is for judging above-mentioned clock signal clk _ OUT and above-mentioned reference clock signal CLK_REF
Synchronous, when the two is synchronous, signal Vref keeps constant voltage, and the MOS_SW signal of above-mentioned digital processing DSP module output is rule
Then periodically variable low and high level；Otherwise, RC_success signal is low level, and reference voltage Vref variation leads to output
Clock signal clk _ OUT frequency constantly changes.
Comparator circuit exports high level or low level according to Vref and Vc comparison result.For example, as Vref > Vc,
High level is exported, as Vref < Vc, exports low level；Also opposite rule can be used.
In digital RC oscillator in any of the above-described embodiment, above-mentioned digital signal processing module include D divider with
Digital Logic gate circuit.When signal RC_success signal is low, the periodical high-low signal of the output of comparator wherein one
Road is converted to the CLK_OUT clock signal that duty ratio is 50% after removing 2 as the sampling clock realization of d type flip flop；Another way needs
Will by Digital Logic be delayed Δ t circuit after output mos _ SW signal, as the switch of capacitor charge and discharge circuit, wherein when Δ t
In, CLK_OUT signal changes RC_Calibration signal by clock alignment module, and then changes the input signal of amplifier
The size of Vref.When signal RC_success signal is high, the output signal of comparator passes through d type flip flop for generating all the way
CLK_OUT clock signal, another way need not move through Digital Logic, can direct output mos _ SW signal.In conclusion using D
Trigger, which generates CLK_OUT signal, reduces the power consumption close to half of circuit when obtaining identical frequency, and eliminates
The mismatch of two-way current source.
The voltage Vc of capacitor charge and discharge circuit can choose but be not limited to using current source be capacitor charge and discharge circuit progress
Charging generates.
The digital RC oscillator of the present embodiment, automatic calibration need to set calibration condition, meet calibration condition then surface school
Standard is completed, and clock signal clk _ OUT of output meets required precision, and signal Vref keeps constant voltage at this time, at digital signal
The MOS_SW signal for managing module output is the low and high level of regular periodicity variation；When not meeting calibration condition, reference voltage
Vref variation causes clock signal clk _ OUT frequency of output constantly to change.Optionally, when RC_success signal is high level
Show circuit in being calibrated when RC_success signal is low level as calibration condition.
Optionally, the charge and discharge time of capacitor charge and discharge circuit capacitor is T=t+ Δ t, and wherein t is the output clock cycle,
Δ t is delay caused by above-mentioned digital signal processing module, reduces output clock frequency with the variation of process corner, needs to meet
Δt<<t。
As shown in figure 3, the automatic calibrating method of another embodiment of the invention, is shaken using the digital RC of above-described embodiment
Device is swung, by taking clock signal clk _ OUT frequency 31.25KHz as an example, is included the following steps:
S10, the reference clock signal for converting the fixed cycle, reference clock CLK_REF are passed through in above-mentioned clock alignment module
The reference clock signal that internal logic is converted to the fixed cycle, the frequency 125KHz of reference clock CLK_REF are crossed, the fixed cycle is
128us；
S20, time window is calculated, takes above-mentioned fixed cycle half i.e. 64us as a time window；
S30, recording clock signal number record above-mentioned clock signal clk _ OUT and pass through zero passage in above-mentioned time window
The number of counter；
S40, judge whether to meet calibration condition, can choose clock signal clk _ OUT and pass through in above-mentioned time window
The number of zero crossing counter is time window and the ratio in running clock period is two as calibration condition；
S50, when meeting calibration condition, calibration complete, at this time RC_success signal be high level, above-mentioned clock signal
CLK_OUT is desired frequency, is in the present embodiment 31.25KHz；
S60, when being unsatisfactory for calibration condition, by reference to the variation of voltage Vref, change above-mentioned clock signal clk _
OUT is returned and is executed S30.
As shown in figure 4, optionally, above-mentioned steps S60 further include:
S61, above-mentioned clock alignment module change above-mentioned output signal RC_calibration；
S62, in response to the variation of above-mentioned output signal RC_calibration, above-mentioned reference voltage RC_Vref module is defeated
Above-mentioned reference voltage Vref out changes；
S63, in response to the variation of the reference voltage Vref, the output of above-mentioned comparator circuit changes；
S64, the output variation in response to the comparator circuit, the frequency of above-mentioned clock signal clk _ OUT send variation,
It re-execute the steps S30.
The preferred embodiment of the present invention has been described in detail above.It should be appreciated that the ordinary skill of this field is without wound
The property made labour, which according to the present invention can conceive, makes many modifications and variations.Therefore, all technician in the art
Pass through the available technology of logical analysis, reasoning, or a limited experiment on the basis of existing technology under this invention's idea
Scheme, all should be within the scope of protection determined by the claims.
Claims (10)
1. a kind of number RC oscillator, which is characterized in that including comparator circuit, capacitor charge and discharge circuit, reference voltage is generated
Module, clock alignment module and digital signal processing module；The clock alignment module includes zero crossing counter, clock signal
CLK_OUT and reference clock signal CLK_REF is the input of the clock alignment module, the output letter of the clock alignment module
Number RC_calibration and RC_success signal respectively as the reference voltage generation module and the digital signal at
The input of module is managed, the reference voltage Vref and capacitor charge and discharge circuit charging that the reference voltage generation module generates produce
Input voltage of the raw voltage Vc as the comparison amplifier both ends of the comparator circuit, the RC_success signal and described
Input of the output signal of comparator circuit as the digital signal processing module, the digital signal processing module output
MOS_SW signal and clock signal clk _ OUT, the MOS_SW signal control the capacitor charge and discharge circuit.
2. number RC oscillator as described in claim 1, which is characterized in that the reference voltage generation module is using resistance point
Laminated structure controls the size of access resistance according to the RC_calibration, dynamically controls the big of the reference voltage Vref
It is small.
3. number RC oscillator as claimed in claim 2, which is characterized in that the clock alignment module is for when judging described
Whether clock signal CLK_OUT and the reference clock signal CLK_REF are synchronous.
4. number RC oscillator as claimed in claim 3, which is characterized in that the comparator circuit is as Vref > Vc, output
High level exports low level as Vref < Vc.
5. number RC oscillator as claimed in claim 4, which is characterized in that the digital signal processing module is Digital Logic
Circuit.
6. number RC oscillator as claimed in claim 5, which is characterized in that the digital processing DSP module is triggered comprising D
Device, the clock signal clk _ OUT are converted to the clock signal that duty ratio is 50% after the d type flip flop is divided by 2.
7. number RC oscillator as described in claim 1, which is characterized in that when the RC_success signal is high level,
Show that calibration has been completed, when the RC_success signal is low level, shows circuit in being calibrated.
8. a kind of automatic calibrating method using any number RC oscillator as described in claim 1-7, which is characterized in that described
Method the following steps are included:
S10, the reference clock signal for converting the fixed cycle, the reference clock CLK_REF are passed through in the clock alignment module
Cross the reference clock signal that internal logic is converted to the fixed cycle；
S20, time window is calculated, takes the fixed cycle half as a time window；
S30, recording clock signal number record the clock signal clk _ OUT and pass through over-zero counting in the time window
The number of device；
S40, judge whether to meet calibration condition；
S50, when meeting calibration condition, output RC_success signal be high level, calibration complete；
S60, when being unsatisfactory for calibration condition, by the variation of the reference voltage Vref, change the clock signal
CLK_OUT is returned and is executed S30.
9. automatic calibrating method as claimed in claim 8, which is characterized in that the step S60 further include:
S61, the clock alignment module change the output signal RC_calibration；
S62, in response to the variation of the output signal RC_calibration, the reference voltage generation module output it is described
Reference voltage Vref changes；
S63, in response to the variation of the reference voltage Vref, the output of the comparator circuit changes；
S64, the output variation in response to the comparator circuit, the frequency of the clock signal clk _ OUT send variation, again
Execute step S30.
10. automatic calibrating method as claimed in claim 8, which is characterized in that the frequency of the reference clock CLK_REF
125KHz, the fixed cycle are 128us, the frequency 31.25KHz of the clock signal clk _ OUT；The calibration condition is institute
It is the time window and oscillation by the number of the zero crossing counter that clock signal clk _ OUT, which is stated, in the time window
The ratio of clock cycle is 2.
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| CN110995204A (en) * | 2019-12-12 | 2020-04-10 | 思瑞浦微电子科技（苏州）股份有限公司 | Oscillator for outputting multiple duty ratio pulse signals |
| CN112953465A (en) * | 2021-03-09 | 2021-06-11 | 天津大学 | Configurable relaxation oscillator based on resistance-capacitance array |
| CN113037281A (en) * | 2021-02-23 | 2021-06-25 | 合肥宏晶微电子科技股份有限公司 | Clock signal generation device and clock signal generation method |
| CN113131930A (en) * | 2021-04-26 | 2021-07-16 | 广州鸿博微电子技术有限公司 | Frequency temperature compensation circuit for MCU high-frequency clock and implementation method thereof |
| CN113794446A (en) * | 2021-09-17 | 2021-12-14 | 上海磐启微电子有限公司 | RC oscillator with frequency not changing with temperature and power supply voltage |
| CN113922813A (en) * | 2021-10-18 | 2022-01-11 | 苏州聚元微电子股份有限公司 | Frequency calibration method of numerical control oscillator |
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| CN113922813A (en) * | 2021-10-18 | 2022-01-11 | 苏州聚元微电子股份有限公司 | Frequency calibration method of numerical control oscillator |
| CN113922813B (en) * | 2021-10-18 | 2023-03-10 | 苏州聚元微电子股份有限公司 | Frequency calibration method of numerical control oscillator |
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| CN109743059B (en) | 2023-03-24 |
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