CN109714224B - SRIO protocol fault injection and monitoring analysis system and method of VPX framework - Google Patents
SRIO protocol fault injection and monitoring analysis system and method of VPX framework Download PDFInfo
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Abstract
The invention relates to a system and a method for fault injection, monitoring and analysis of an SRIO protocol of a VPX framework, and belongs to the technical field of data storage. The invention can support the channel switching and function realization directly in the electric signal transmission channel under the condition that the SRIO protocol does not stipulate the connector interface, whether the fault injection and monitoring analysis mode works or not does not need the network transmission equipment of the VPX framework to carry out offline operation of power-off, and can carry out the fault injection and monitoring analysis in real time in the working process of the network transmission equipment of the VPX framework. This ensures the effectiveness of fault injection and monitoring analysis for network transmission equipment of the VPX architecture.
Description
Technical Field
The invention belongs to the technical field of data storage, and particularly relates to a system and a method for fault injection, monitoring and analysis of an SRIO protocol of a VPX framework.
Background
The network transmission equipment of the VPX framework mostly adopts an SRIO protocol exchange mode to perform system interconnection and data transmission, and in order to ensure the reliability of the SRIO interconnection transmission equipment of the VPX framework, fault injection and monitoring analysis of an SRIO protocol need to be performed for network transmission of the VPX framework. However, the SRIO protocol is different from protocols such as PCIE, SATA, ethernet, FC, etc., and there is no connector interface specified by the protocol, so the fault injection and monitoring analysis structure cannot be accessed to the VPX architecture network transmission device in the form of the connector interface specified by the protocol.
Disclosure of Invention
Technical problem to be solved
The technical problem to be solved by the invention is as follows: how to realize a system and a method for realizing SRIO protocol fault injection and monitoring analysis of a VPX framework for network transmission equipment of the VPX framework.
(II) technical scheme
In order to solve the technical problem, the invention provides an SRIO protocol fault injection and monitoring analysis system of a VPX architecture, which comprises an SRIO endpoint slot of an 8-path VPX interface, an SRIO exchange slot of a 1-path VPX interface, 16 Serdes chips with parallel data and serial data interconversion functions, 16 paths of 1-out-of-3 multiplexers, 8 fault injection modules and 16 monitoring analysis modules;
the SRIO endpoint slots of the 8-path VPX interface are respectively connected with the 8-path Serdes chips in a one-to-one manner, and the SRIO exchange slots of the 1-path VPX interface are respectively connected with the other 8-path Serdes chips; the Serdes chips connected with the SRIO endpoint slots are arranged in an inserting mode, namely, each Serdes chip connected with the SRIO endpoint slots is adjacent to one or two Serdes chips connected with the SRIO exchange slots; the 16 routes of Serdes chips are respectively connected with the output ends of the 16 routes of 1-from-3 multiplexers one by one, in the 16 routes of 1-from-3 multiplexers, two input ends of each 1-from-3 multiplexer can be respectively connected with a monitoring analysis module and the adjacent 1-from-3 multiplexers one by one, and the third input ends of the adjacent two 1-from-3 multiplexers can be commonly connected to the same fault injection module; the monitoring analysis module is used for completing the monitoring analysis process of data; and the fault injection module is used for completing the transmission of fault data.
The invention also provides a normal working method of the SRIO protocol of the VPX framework of the system, which comprises the following steps:
firstly, a 1-out-of-3 multiplexer is switched to a normal working state, and the 1-out-of-3 multiplexer is connected with an adjacent 1-out-of-3 multiplexer;
serial data of the SRIO terminal slot is transmitted to the Serdes chip to complete serial-parallel conversion and parallel output;
thirdly, parallel data are transmitted to a 1-from-3 multiplexer adjacent to the 1-from-3 multiplexer from the 1-from-3 multiplexer, and are subjected to parallel-serial conversion and serial output through a Serdes chip;
and fourthly, transmitting the serial data to an SRIO exchange slot to complete the normal working process.
The invention also provides a fault injection method of the SRIO protocol of the VPX framework of the system, which comprises the following steps:
firstly, a 1-out-of-3 multiplexer is switched to a fault injection state, and the 1-out-of-3 multiplexer is connected with a fault injection module;
serial data of the SRIO terminal slot is transmitted to the Serdes chip to complete serial-parallel conversion and parallel output;
thirdly, parallel data are transmitted to one port of a fault injection module to complete fault injection of the data;
fourthly, transmitting the parallel data after fault injection from the other port of the fault injection module to a 1-out-of-3 multiplexer, and finishing parallel-serial conversion and serial output through a Serdes chip;
and fifthly, transmitting the serial data to an SRIO switching slot to finish the fault injection process.
The invention also provides a method for monitoring and analyzing the SRIO protocol of the VPX framework of the system, which comprises the following steps:
firstly, a 1-out-of-3 multiplexer is switched to a monitoring analysis state, and the 1-out-of-3 multiplexer is connected with a monitoring analysis module;
serial data of the SRIO endpoint slot or the SRIO exchange slot is transmitted to the Serdes chip to complete serial-parallel conversion and parallel output;
and thirdly, transmitting the parallel data to a monitoring analysis module to complete the monitoring analysis process of the data.
(III) advantageous effects
The invention can support the channel switching and function realization directly in the electric signal transmission channel under the condition that the SRIO protocol does not stipulate the connector interface, whether the fault injection and monitoring analysis mode works or not does not need the network transmission equipment of the VPX framework to carry out offline operation of power-off, and can carry out the fault injection and monitoring analysis in real time in the working process of the network transmission equipment of the VPX framework. This ensures the effectiveness of fault injection and monitoring analysis for network transmission equipment of the VPX architecture.
Drawings
FIG. 1 is a schematic diagram of a network transmission device of VPX architecture;
FIG. 2 is a schematic structural diagram of an SRIO protocol fault injection and monitoring analysis implementation system of the VPX architecture of the present invention;
FIG. 3 is a flow chart of a method for implementing normal operation of the SRIO protocol of the VPX architecture of the present invention;
FIG. 4 is a flow chart of an SRIO protocol fault injection implementation method of the VPX architecture of the present invention;
fig. 5 is a flowchart of an SRIO protocol monitoring analysis implementation method of the VPX framework of the present invention.
Detailed Description
In order to make the objects, contents, and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.
Fig. 1 is a network transmission device structure of VPX architecture, which includes SRIO endpoint sockets of 8-way VPX interfaces and SRIO switch sockets of 1-way VPX interfaces. The normal work of data interconnection of 8-channel user SRIO endpoints through SRIO exchange can be supported.
The invention is a SRIO protocol fault injection and monitoring analysis implementation system of a VPX framework in figure 2, an SRIO endpoint slot of an 8-path VPX interface is respectively connected with 8 Serdes chips with parallel data and serial data mutual conversion functions in a one-to-one way, and an SRIO exchange slot of a 1-path VPX interface is respectively connected with the other 8 Serdes chips; the Serdes chips connected with the SRIO endpoint slots are arranged in an inserting mode, namely, each Serdes chip connected with the SRIO endpoint slots is adjacent to one or two Serdes chips connected with the SRIO exchange slots; the 16 routes of Serdes chips are respectively connected with the output ends of the 16 routes of 1-from-3 multiplexers one by one, in the 16 routes of 1-from-3 multiplexers, two input ends of each 1-from-3 multiplexer can be respectively connected with a monitoring analysis module, one and adjacent 1-from-3 multiplexers one by one, and third input ends of two adjacent 1-from-3 multiplexers can be commonly connected to the same fault injection module for 8 fault injection modules. The monitoring analysis module is used for completing the monitoring analysis process of the data. The fault injection module is used to complete the transmission of fault data (i.e., error data).
The normal operation of the invention is shown in fig. 3, and the implementation process is as follows:
the 1-from-3 multiplexer is switched to a normal working state, and the 1-from-3 multiplexer is connected with the adjacent 1-from-3 multiplexer.
And transmitting the serial data of the SRIO terminal slot to a Serdes chip to complete serial-to-parallel conversion and parallel output.
And thirdly, transmitting the parallel data from a 1-from-3 multiplexer to a 1-from-3 multiplexer adjacent to the parallel data, and finishing parallel-serial conversion and serial output through a Serdes chip.
And fourthly, transmitting the serial data to an SRIO exchange slot to complete the normal working process.
The fault injection of the invention is shown in fig. 4, and the implementation process is as follows:
the 1-out-of-3 multiplexer is switched to a fault injection state, and the 1-out-of-3 multiplexer is connected with the fault injection module.
And transmitting the serial data of the SRIO terminal slot to a Serdes chip to complete serial-to-parallel conversion and parallel output.
And thirdly, transmitting the parallel data to one port of the fault injection module to complete fault injection of the data.
Fourthly, the parallel data after the fault injection is transmitted to the 1-out-of-3 multiplexer from the other port of the fault injection module, and the parallel-serial conversion and serial output are completed through the Serdes chip.
And fifthly, transmitting the serial data to an SRIO switching slot to finish the fault injection process.
The monitoring and analysis of the invention is shown in fig. 5, and the implementation process is as follows:
the 1-out-of-3 multiplexer is switched to a monitoring analysis state, and the 1-out-of-3 multiplexer is connected with the monitoring analysis module.
And transmitting serial data of the SRIO endpoint slot or the SRIO exchange slot to the Serdes chip to complete serial-to-parallel conversion and parallel output.
And thirdly, transmitting the parallel data to a monitoring analysis module to complete the monitoring analysis process of the data.
It can be seen that the invention can switch the SRIO endpoint slot path of the 8-way VPX interface in real time by controlling the 1-out-of-3 multiplexer without affecting the operation of the network transmission device of the VPX architecture, thereby respectively realizing normal operation, fault injection and monitoring analysis.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (5)
1. An SRIO protocol fault injection and monitoring analysis system of a VPX framework is characterized by comprising an SRIO endpoint slot of an 8-path VPX interface, an SRIO exchange slot of a 1-path VPX interface, a 16-path Serdes chip with a parallel data and serial data mutual conversion function, a 16-path 1-by-3 multiplexer, 8 fault injection modules and 16 monitoring analysis modules;
the SRIO endpoint slots of the 8-path VPX interface are respectively connected with the 8-path Serdes chips in a one-to-one manner, and the SRIO exchange slots of the 1-path VPX interface are respectively connected with the other 8-path Serdes chips; the Serdes chips connected with the SRIO endpoint slots are arranged in an inserting mode, namely, each Serdes chip connected with the SRIO endpoint slots is adjacent to one or two Serdes chips connected with the SRIO exchange slots; the 16 routes of Serdes chips are respectively connected with the output ends of the 16 routes of 1-from-3 multiplexers one by one, in the 16 routes of 1-from-3 multiplexers, two input ends of each 1-from-3 multiplexer are respectively connected with a monitoring analysis module and the adjacent 1-from-3 multiplexers one by one, and the third input ends of the adjacent two 1-from-3 multiplexers are connected to the same fault injection module together; the monitoring analysis module is used for completing the monitoring analysis process of data; and the fault injection module is used for completing the transmission of fault data.
2. The system of claim 1, wherein the SRIO endpoint socket of the 8-way VPX interface and the SRIO switch socket of the 1-way VPX interface form a network transmission device of a VPX architecture, and are capable of supporting normal operation of data interconnection of the 8-way user SRIO endpoint through SRIO switching.
3. A method for normal operation of SRIO protocol of VPX architecture implemented by the system according to claim 1 or 2, comprising the steps of:
firstly, a 1-out-of-3 multiplexer is switched to a normal working state, and the 1-out-of-3 multiplexer is connected with an adjacent 1-out-of-3 multiplexer;
serial data of the SRIO terminal slot is transmitted to the Serdes chip to complete serial-parallel conversion and parallel output;
thirdly, parallel data are transmitted to a 1-from-3 multiplexer adjacent to the 1-from-3 multiplexer from the 1-from-3 multiplexer, and are subjected to parallel-serial conversion and serial output through a Serdes chip;
and fourthly, transmitting the serial data to an SRIO exchange slot to complete the normal working process.
4. A method for SRIO protocol fault injection for VPX architecture implemented with a system according to claim 1 or 2, comprising the steps of:
firstly, a 1-out-of-3 multiplexer is switched to a fault injection state, and the 1-out-of-3 multiplexer is connected with a fault injection module;
serial data of the SRIO terminal slot is transmitted to the Serdes chip to complete serial-parallel conversion and parallel output;
thirdly, parallel data are transmitted to one port of a fault injection module to complete fault injection of the data;
fourthly, transmitting the parallel data after fault injection from the other port of the fault injection module to a 1-out-of-3 multiplexer, and finishing parallel-serial conversion and serial output through a Serdes chip;
and fifthly, transmitting the serial data to an SRIO switching slot to finish the fault injection process.
5. A method for SRIO protocol monitoring analysis of VPX architecture implemented by a system according to claim 1 or 2, comprising the following steps:
firstly, a 1-out-of-3 multiplexer is switched to a monitoring analysis state, and the 1-out-of-3 multiplexer is connected with a monitoring analysis module;
serial data of the SRIO endpoint slot or the SRIO exchange slot is transmitted to the Serdes chip to complete serial-parallel conversion and parallel output;
and thirdly, transmitting the parallel data to a monitoring analysis module to complete the monitoring analysis process of the data.
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| WO2018081758A1 (en) * | 2015-10-28 | 2018-05-03 | Crosetto Dario | Method and apparatus for programmable, real-time, multi-domensional object pattern recognition algorithms (opra) |
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| CN104243174A (en) * | 2014-10-10 | 2014-12-24 | 沈辉 | Network and SRIO (serial rapid input/output) data exchanging plate based on VPX bus and control method for network and SRIO data exchanging plate |
| WO2018081758A1 (en) * | 2015-10-28 | 2018-05-03 | Crosetto Dario | Method and apparatus for programmable, real-time, multi-domensional object pattern recognition algorithms (opra) |
| CN106250334A (en) * | 2016-08-18 | 2016-12-21 | 四川赛狄信息技术有限公司 | A kind of information processing system monitored |
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