CN109713081A - The production method of integrated silicon-based visible light detector array device - Google Patents
The production method of integrated silicon-based visible light detector array device Download PDFInfo
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Abstract
The production method of integrated silicon-based visible light detector array device, belongs to field of photoelectric technology.Provide the process for making of connection type complicated between the high integration of silicon substrate visible light avalanche photodiode array and the probe unit of high integration.Production method of the invention, deposit epitaxial layers are as avalanche layer on first substrate material after the rinsing treatment, then field is deposited on avalanche layer control layer, then deposit absorbent layer on control layer on the scene, then non-depletion layer is deposited on absorbed layer, then isolated area is prepared, then anode and anode electrode lead are prepared, then photic zone is prepared, substrate thinning is then carried out, until exposing isolated area, form substrate layer, cathode and cathode electrode lead are finally prepared, substrate is removed, obtains integrated silicon-based visible light detector array device.The array device blue response degree of production method production is high, the full wave quantum efficiency of visible light is high.
Description
Technical field
The invention belongs to field of photoelectric technology, and in particular to a kind of production of integrated silicon-based visible light detector array device
Method.
Background technique
Avalanche photodide (APD) is a kind of light-sensitive element, is often used in optical communication field.Using silicon or germanium as material
Plus after reverse biased in the P-N junction of photodiode made of expecting, the light of injection will form photoelectric current after being absorbed by P-N junction,
The phenomenon that reverse biased can generate " snowslide " (i.e. photoelectric current exponentially increases sharply) is increased, this diode is referred to as " avalanche optoelectronic
Diode ".
The working principle of avalanche photodide is: generating snowslide using directed movement of the photo-generated carrier in strong electrical field
Effect, to obtain the gain of photoelectric current.In avalanche process, photo-generated carrier high speed directed movement under the action of strong electrical field,
Light induced electron or hole and lattice atoms with very kinetic energy collide, and lattice atoms ionization is made to generate secondary electron-hole pair；
Secondary electron and hole are to the electronics-sky for obtaining enough kinetic energy under the action of electric field, and keeping lattice atoms ionization generation new
Cave pair, this process are continued as " snowslide ".The carrier number that ionization generates is much larger than the photoproduction current-carrying that light excitation generates
Subnumber, at this moment the output electric current of avalanche photodide increases sharply.The electronics and lattice atoms of high-speed motion collide, and make crystalline substance
The ionization of lattice atom, generates new electron-hole pair.Newly generated secondary electron is again and atomic collision.Such multiple impacts produce
Raw chain reaction, causes carrier avalanche multiplication.
The prior art, the structure of traditional silicon substrate APD are successively inhaled by the non-depletion layer of N-shaped, p-type avalanche layer, p-type field control layer, p-type
It receives layer and p-substrate layer is constituted.Since silicon materials are high in the absorptivity of visible light wave range, it is seen that the photon of light is in silicon materials
Propagation distance is short, after photon is incident on APD photosurface, is completely absorbed substantially in non-depletion layer with avalanche layer, so tradition can
The quantum efficiency of light-exposed APD is low.Non- depletion layer of the blue photons of shortwave wavelength in APD is just almost absorbed, and causes to pass
The visible light APD blue response degree for structure of uniting is very low.In the systematic differences such as visible light communication, existing APD device is deposited
The bottleneck problems such as high blue sensitivity, broadband all standing and higher cutoff frequency can not met simultaneously, seriously constrained
The development in related application field.
Summary of the invention
In view of this, the present invention be solve in the prior art APD there is can not meet high blue sensitivity, width simultaneously
The technical issues of wave band all standing and higher cutoff frequency, provides a kind of production of integrated silicon-based visible light detector array device
Method.
It is as follows that the present invention solves the technical solution that above-mentioned technical problem is taken.
The present invention provides a kind of production method of integrated silicon-based visible light detector array device, which includes more
A probe unit, multiple isolated areas and multiple electrodes lead；Multiple probe units form array by regular array, and each detection is single
Member includes anode, non-depletion layer, absorbed layer, field control layer, avalanche layer, substrate layer, cathode and photic zone；Control layer, absorbed layer and
Non- depletion layer is successively set on from bottom to up on the upper surface of avalanche layer；Photic zone and anode are arranged at the upper table of non-depletion layer
On face, the lower surface of anode is contacted with the upper surface of non-depletion layer, euphotic lower surface all contacted with non-depletion layer or
A part of to contact with non-depletion layer, remainder is contacted with the upper surface of anode；Substrate layer is arranged on the lower surface of avalanche layer；
Cathode is arranged on the lower surface of substrate layer, the lower surface of cathode all standing or part covering substrate layer；Isolated area setting exists
Between two adjacent probe units, two adjacent probe units are isolated；Contact conductor setting isolated area upper surface, every
From area lower surface or run through isolated area, contact conductor connects the electrode between multiple probe units；
The connection type of the probe unit is parallel connection, and making step is as follows:
Step 1: choosing substrate material, cleaning treatment is carried out to substrate material；
Step 2: deposit epitaxial layers are as avalanche layer on substrate material after the cleaning process；
Step 3: controlling layer in avalanche layer upper surface deposition field；
Step 4: control layer upper surface on the scene deposit absorbent layer；
Step 5: depositing non-depletion layer in absorbed layer upper surface；
Step 6: preparing mask pattern in the non-layer surface that exhausts, area of isolation is prepared；
Step 7: removal mask material, then prepares the mask pattern of filling area of isolation, area of isolation, removal are filled
Mask material obtains isolated area；
Step 8: preparing anode and anode electrode lead mask pattern, anode and anode electrode lead are prepared, removes exposure mask
Material；
Step 9: preparing the mask pattern of anti-reflection film on the upper surface of non-depletion layer or non-depletion layer and anode, then
Anti-reflection film is prepared, mask material is removed, obtains photic zone；
Step 10: the front of epitaxial wafer is fixed in hard substrate, substrate thinning is then carried out, until exposing isolation
Area forms substrate layer；
Step 11: preparing the exposure mask of cathode and cathode electrode lead, cathode and cathode electrode lead are then prepared, is removed
Mask material；
Step 12: the hard substrate that removal epitaxial wafer front is fixed, completes encapsulation, obtains integrated silicon-based visible optical detection
Device array device；
The connection type of the probe unit is series connection, and step 7 to step 12 is replaced are as follows:
Step 7: preparing mask pattern on the epitaxial wafer surface with area of isolation, production insulation film is single as detection
First side insulation layer removes mask material；
Step 8: preparing the mask pattern of anode and the anode electrode lead coplanar with anode, anode and anode electricity are prepared
Pole lead removes mask material；
Step 9: filling area of isolation using isolated material, isolated area is formed；
Step 10: preparing anti-reflection film as photic zone in the upper surface of non-depletion layer or non-depletion layer and anode；
Step 11: the front of epitaxial wafer is fixed in hard substrate, substrate thinning is then carried out, until exposing isolation
Area lower surface forms substrate layer；
Step 12: preparing the mask pattern of cathode and cathode electrode lead at the back side of epitaxial wafer, cathode and yin are made
Pole contact conductor removes mask material；
Step 13: the hard substrate that removal epitaxial wafer front is fixed, completes encapsulation, obtains integrated silicon-based visible optical detection
Device array device.
Further, the connection type of the probe unit be it is first in parallel after series hybrid electrode structure, after step 6
The step of replace are as follows:
In electrode fabrication, first press the corresponding making step of parallel-connection structure, complete to need the isolated area of probe unit in parallel,
Then the production of anode and anode electrode lead is completed to need concatenated probe unit using the corresponding making step of cascaded structure
The contact conductor of anode and cathode between anode, connection probe unit and the production of isolated area, then use cascaded structure phase
It answers making step to complete the euphotic production of whole probe units, and substrate thinning is carried out to whole probe units, finally press
The cathode and the cathode electrode coplanar with cathode of whole probe units are made according to parallel-connection structure or the corresponding making step of cascaded structure
Lead.
Further, the connection type of the probe unit is mixed electrode structure in parallel after first connecting, after step 6
The step of replace are as follows:
In electrode fabrication, first use the corresponding making step of cascaded structure, complete to need the anode of concatenated probe unit,
The contact conductor of anode and cathode between connection series connection probe unit and the production of whole probe unit isolated areas, then use
The corresponding making step of parallel-connection structure is completed to need the anode electrode between the anode of probe unit in parallel and probe unit in parallel
The production of lead, then according to the euphotic production of the corresponding whole probe units of making step completion of cascaded structure and to whole
Probe unit carries out substrate thinning, then completes whole probe units using parallel-connection structure or the corresponding making step of cascaded structure
The production of cathode and the cathode electrode lead coplanar with cathode.
Further, the substrate material is silicon wafer.
Further, the shape of the probe unit be square, polygon, rectangle or circle.
Further, the shape of the anode and cathode is respectively outer ring, single shape, a plurality of shape, circle, interior annular
The combination of one or more of shape, inner polygon.
Further, the material of the anode, cathode and contact conductor is respectively in Au, Ag, Cu, Al, Cr, Ni, Ti
One or more of alloys.
Further, the non-depletion layer is highly doped p+ type silicon, with a thickness of 0.01-0.5 microns, doping concentration 1017-
1019cm-3；Absorbed layer is p-type silicon, with a thickness of 1-10 microns, doping concentration 1015-1016cm-3；Field control layer is p-type silicon, thickness
It is 0.1-1.0 microns, doping concentration 1016-1018cm-3；Avalanche layer is p-type silicon, with a thickness of 0.1-0.5 microns, doping concentration
It is 1015-1017cm-3；Substrate layer is highly doped n+ type silicon, with a thickness of 5-100 microns, doping concentration 1018-1020cm-3。
The p-type silicon Doped ions are B3+, n-type silicon Doped ions are P5+Or As5+。
Further, the photic zone is by two kinds in high refractive index film, middle index film and low refractive index film
Or three kinds be alternately arranged composition, totally two to nine layers；Wherein, high refractive index, thin film materials CeO2、ZrO2、TiO2、Ta2O5、
ZnS、ThO2One or more of combination, middle index film material be MgO, ThO2H2、InO2、MgO-Al2O3In one
Kind or several combinations, low refractive index film material are MgF2、SiO2、ThF4、LaF2、NdF3、BeO、Na3(AlF4)、Al2O3、
CeF3、LaF3, one or more of LiF combination.
Further, the material of the isolated area be polyimides, polymethyl methacrylate (PMMA), epoxy resin or
SiO2。
The working principle of integrated silicon-based visible light detector array device provided by the invention is:
Apply reverse biased between the cathode and anode of array device of the invention, when light is radiated at the photosensitive of array device
When face, photon reaches absorbed layer by non-depletion layer, it is seen that the photon of optical band is absorbed, and the light of long wave spectral coverage will transmit through absorption
Layer is propagated downwards, and absorbed photon generates nonequilibrium carrier in absorbed layer, and electronics accelerates to n-type substrate layer and reaches yin
Pole, hole moves to anode to the non-depletion layer of p-type, to form electric current in external circuit, realizes photoelectric conversion, when reversed inclined
Carrier will be caused in the effect of avalanche layer generation avalanche multiplication when pressing sufficiently large, increases reverse current, so that array device
To the quantum efficiency of light can be increased.
Compared with prior art, the invention has the benefit that
The production method of integrated silicon-based visible light detector array device provided by the invention is using with higher
Integrated level and the MOEMS technology of mass are combined with semiconductor material growth technology.On device quality, array device is realized
The segmentation in situ of probe unit, ensure that the uniformity and consistency of cell distribution on part epitaxial wafer；On fabrication cycle, use
Integrated preparation process, improve work efficiency, and be suitble to the batch making of big array；In the light-receiving side of probe unit
Face reduces the reflection of light, improves the acceptance rate of light due to preparing anti-reflection film on array device surface.
The integrated silicon-based visible light detector array device of production method production of the invention, passes through absorbed layer and avalanche layer
Raising of the array device to blue response degree may be implemented in location swap, while improving the full wave quantum efficiency of visible light.
The integrated silicon-based visible light detector array device of production method production of the invention, using double-face electrode structure,
Electrode can make the field distribution of device more uniform using polygon, the electrode shape of circle or annular, and protection device is not easy
It is breakdown, and the quantum efficiency of device can be improved.
The integrated silicon-based visible light detector array device of production method production of the invention, probe unit is regularly arranged
Array device is formed, since cutoff frequency and the photosurface area of array device are inversely proportional, sensitivity and photosurface area are at just
Than array device of the invention reduces the photosensitive area of each probe unit, and junction capacity becomes smaller, so that the cut-off of device
Frequency is improved, and the photosensitive area of device entirety and is had not been changed, so not influencing the sensitivity of device after array.
Detailed description of the invention
It, below will be in specific embodiment in order to illustrate more clearly of the technical solution in the specific embodiment of the invention
Required attached drawing is briefly described, it should be apparent that, the accompanying drawings in the following description is only some tools of the invention
Body embodiment for those of ordinary skill in the art without creative efforts, can also be according to this
A little attached drawings obtain other attached drawings.
Fig. 1 a is the parallel-connection structure longitudinal sectional drawing of array device of the invention, and Fig. 1 b is the string of array device of the invention
It is coupled structure longitudinal sectional drawing, Fig. 1 c-1 and Fig. 1 c-2 are respectively that the cascaded structure left view again first in parallel of array device of the invention is vertical
To sectional view and main view longitudinal sectional drawing, Fig. 1 d-1, Fig. 1 d-2 and Fig. 1 d-3 are respectively that array device of the invention is first connected again
Parallel-connection structure main view longitudinal sectional drawing, left view longitudinal sectional drawing and right view longitudinal sectional drawing.In figure, 1 is anode, and 2 exhaust to be non-
Layer, 3 be absorbed layer, and 4 control layer for field, and 5 be avalanche layer, and 6 be substrate layer, and 7 be cathode, and 8 be photic zone, and 9 be isolated area, and 10 be electricity
Pole lead.
In Fig. 2, a-d is several typical geometries of the probe unit of array device of the invention.
In Fig. 3, a-i is several typical electrode shapes of the anode and cathode of the probe unit of array device of the invention；
Wherein, a, b are outer ring electrode, and c is single strip electrode, and d is more strip electrodes, and e is that strip electrode is combined with circular electrode,
F is that annular electrode is combined with strip electrode, and g is that polygon annular is combined with strip electrode, and h is polygon annular, three
Strip electrode and polygon outer ring electrode combine, and i is that polygon annular, double bar shapeds and polygon outer ring electrode combine.
Fig. 4 a, Fig. 4 b and Fig. 4 c are several Typical arrangements of the probe unit of array device of the invention.
Fig. 5 a is the structural schematic diagram that the probe unit of array device of the invention is connected with parallel, and Fig. 5 b is
The structural schematic diagram that the probe unit of array device of the invention is connected in a manner of being connected in series, Fig. 5 c are array device of the invention
For the probe unit of part with the structural schematic diagram of connection type connection concatenated again first in parallel, Fig. 5 d is array device of the invention
Probe unit is with the structural schematic diagram for parallel connection of first connecting again.
Fig. 6 is process flow chart prepared by parallel connected array device of the invention, and in figure, (1)-(18) respectively correspond step 1
To step 10 eight；(1)-(18) represent main view sectional view.
Fig. 7 is process flow chart prepared by serial array device of the invention, and in figure, (1)-(17) respectively correspond step 1
To step 10 seven；(1)-(17) represent main view sectional view.
Fig. 8 be it is of the invention it is first in parallel after the process flow chart for preparing of serial array device, in figure, (1)-(20) are right respectively
Answer step 1 to step 2 ten；(1)-(11) represent main view longitudinal sectional drawing；(13), (14), (15), (16) represent left view
Sectional view；(12), in (17), (18), (19) and (20), left figure represents left view sectional view, and right figure represents main view sectional view.
Fig. 9 be it is of the invention first connect after the process flow chart for preparing of parallel connected array device, in figure, (1)-(19) are right respectively
Answer step 1 to step 10 nine；(1)-(11) represent main view longitudinal sectional drawing；(12) left figure represents main view sectional view, right figure generation
Table left view sectional view；(13), (14), (15) represent left view sectional view；(16), in (17) and (18), left figure represents main view and cuts open
Face figure, right figure represent right pseudosection；(19) main view sectional view, left view sectional view, right pseudosection are successively represented from top to bottom.
Specific embodiment
Specific embodiment one illustrates present embodiment in conjunction with Fig. 1 to Fig. 5, and the integrated silicon-based of present embodiment offer can
Light-exposed detector array device, including multiple probe units, multiple isolated areas 9 and multiple electrodes lead 10.
Wherein, multiple probe units by regular array formed array, each probe unit include anode 1, non-depletion layer 2,
Absorbed layer 3, field control layer 4, avalanche layer 5, substrate layer 6, cathode 7 and photic zone 8.Field control layer 4, absorbed layer 3 and non-depletion layer 2 are under
On the supreme upper surface for being successively set on avalanche layer 5.Photic zone 8 and anode 1 are arranged on the upper surface of non-depletion layer 2, sun
The lower surface of pole 1 is contacted with the upper surface of non-depletion layer 2；The lower surface of photic zone 8 can all be contacted with non-depletion layer 2, i.e.,
Photic zone 8 and anode 1 are respectively positioned on same plane；It a part of can also be contacted with non-depletion layer 2, remainder is upper with anode 1
The upper surface that surface contact, i.e. photic zone 8 cover anode 1.Substrate layer 6 is arranged on the lower surface of avalanche layer 5.Cathode 7 is arranged
On the lower surface of substrate layer 6, the lower surface of 7 all standing of cathode or part covering substrate layer 6.The detection list of present embodiment
The shape of member can be circle, square, rectangle, polygon or other shapes.The shape of anode 1 and cathode 7 can it is identical or
Person is different, all can be outer ring, single shape, a plurality of shape, circle, inner circle annular, inner polygon or other shapes (such as ten thousand words
Type), or in which one or more of shapes combination.
Isolated area 9 is arranged between two adjacent probe units, and two adjacent probe units are completely isolated；Isolation
The effect in area 9 is to prevent leakage current and support for contact conductor.
The setting of contact conductor 10 is in isolated area upper surface, isolated area lower surface or runs through isolated area, and contact conductor connection is more
Electrode between a probe unit is connected after connection type is in parallel after being series, parallel, first connecting or first in parallel.
Non- depletion layer 2, absorbed layer 3, field control layer 4, avalanche layer 5, the substrate layer 6 of present embodiment pass through semiconductor growing
Technology is prepared.Non- depletion layer 2 is highly doped p+ type silicon, with a thickness of 0.01-0.5 microns, doping concentration 1017-1019cm-3；Absorbed layer 3 is p-type silicon, with a thickness of 1-10 microns, doping concentration 1015-1016cm-3；Field control layer 4 is p-type silicon, with a thickness of
0.1-1.0 microns, doping concentration 1016-1018cm-3；Avalanche layer 5 is p-type silicon, and with a thickness of 0.1-0.5 microns, doping concentration is
1015-1017cm-3；Substrate layer 6 is highly doped n+ type silicon, with a thickness of 5-100 microns, doping concentration 1018-1020cm-3.Wherein,
P-type silicon Doped ions are three valence state B ions, and n-type silicon Doped ions are five valence state P ions or five valence state As ions.
The material of anode 1, cathode 7 on probe unit and the contact conductor 10 outside probe unit all can be Au, Ag,
One or several kinds of alloy in Cu, Al, Cr, Ni, Ti etc..Photic zone 8 is by high refractive index film, middle index film and low folding
Two kinds penetrated in rate film or three kinds are alternately arranged composition, and totally two to nine layers；Wherein high refractive index, thin film materials can be
CeO2、ZrO2、TiO2、Ta2O5、ZnS、ThO2One or more of combination, middle index film material can for MgO,
ThO2H2、InO2、MgO-Al2O3One or more of combination, low refractive index film material can be MgF2、SiO2、ThF4、
LaF2、NdF3、BeO、Na3(AlF4)、Al2O3、CeF3、LaF3, one or more of LiF combination.The isolation of present embodiment
The material in area 9 can be polyimides, PMMA, epoxy resin, SiO2Or other materials.
The anode 1 of present embodiment, non-depletion layer 2, absorbed layer 3, field control layer 4, avalanche layer 5, substrate layer 6, cathode 7 and thoroughly
The thickness of photosphere 8 is not particularly limited, and selects according to actual needs or field usual thickness all may be used；The vertical of isolated area 10 cuts
Face can be rectangle or inverted trapezoidal.
Specific embodiment two to eight is the system of the integrated silicon-based visible light detector array device of specific embodiment one
Make method.
Specific embodiment two, be directed to shunt electrodes array of structures device, and photic zone 8 be respectively positioned on anode 1 it is same
The structure of plane, embodiment is described with reference to Fig.6, and basic process steps are as follows:
Step 1: choosing substrate material of the highly doped n+ type silicon wafer as array device, cleaning treatment is carried out；Impurity is
P, five valency element such as As.
Step 2: depositing silicon epitaxy on substrate material by the technologies such as vapour phase epitaxy (VPE) or molecular beam epitaxy (MBE)
Layer, the avalanche layer 5 as array device；The epitaxial material of growth is the silicon of low doping concentration and low defect.
Step 3: Si control layers 4 of one layer of p-type are grown on avalanche layer 5 using vapour phase epitaxy or the method for molecular beam epitaxy.
Step 4: after the completion of prepared by field control layer 4, using being grown on vapour phase epitaxy or molecular beam epitaxial method control layer 4 on the scene
One layer of p-type Si base absorbed layer 3.
Step 5: on the surface of absorbed layer 3, using vapour phase epitaxy or the method for molecular beam epitaxy absorbed layer 3 upper table
One layer of non-depletion layer 2 of p+ type Si base of length of looking unfamiliar.
Step 6: by the method for heat treatment, reactive ion beam method, optics cleaning treatment or chemically cleaning processing to life
Epitaxial wafer after long non-depletion layer 2 carries out cleaning treatment, then prepares SiO in the upper surface of non-depletion layer 22Layer.
Step 7: preparing mask pattern in epitaxial wafer surface spin coating photoresist by photoetching process, utilizing chemical attack
Or dry etching method removes extra SiO2。
Step 8: forming area of isolation, the depth of area of isolation by wet etching, dry etching or mechanical means etc.
It is 1 μm -20 μm, width is 1 μm of -1mm.
Step 9: removing photoresist using glue-dispenser, SiO then is removed using wet etching or dry etching2Mask layer.
Step 10: filling area of isolation using isolated material, isolated area 9, detailed process are formed are as follows:
A) using light-sensitive polyimide as isolated area material, photosensitive polyamides is coated on the epitaxial wafer surface with area of isolation
Imines uses vacuum coat method to ensure then to carry out precuring full of light-sensitive polyimide in area of isolation；
B) by uv-exposure and development, the isolated material other than area of isolation is removed, it is fully cured in heating, completes
The preparation of polyimides isolated area.
Step 11: carrying out cleaning treatment, drying to the upper surface of epitaxial wafer, then in upper surface spin coating photoresist, lead to
Cross anode 1 and anode electrode lead mask pattern that photoetching process prepares device.
Step 12: preparing anode 1 and anode electrode lead, material by the methods of evaporation coating, magnetron sputtering and electroforming
Material is one or several kinds of alloy such as Au, Ag, Cu, Al, Cr, Ni, Ti, removes photoresist.
Step 13: the upper surface to epitaxial wafer carries out cleaning treatment, then pass through photoetching in surface spin coating photoresist again
Technique prepares the mask pattern of anti-reflection film.
Step 14: preparing the increasing that a layer thickness is about 0.1-5 μm by low temperature vapour deposition method in the upper surface of non-depletion layer 2
Then photic zone 8 of the permeable membrane as array device removes photomask surface glue.
Step 15: the front of epitaxial wafer is fixed in hard substrate, mechanical reduction or chemical reduction, throwing are then utilized
Light forms substrate layer 6 until exposing isolated area 9.
Step 16: carry out cleaning treatment to the back side of epitaxial wafer, drying, then overleaf spin coating photoresist, passes through light
Carving technology prepares the mask pattern of cathode 7 and cathode electrode lead.
Step 17: preparing cathode 7 and cathode electrode lead, material by the methods of evaporation coating, magnetron sputtering and electroforming
Material is one or several kinds of alloy such as Au, Ag, Cu, Al, Cr, Ni, Ti, then removes photoresist.
Step 18: the hard substrate that removal epitaxial wafer front is fixed, completes encapsulation.
Specific embodiment three, the lower surface a part for the photic zone 8 for being directed to array device are contacted with non-depletion layer 2,
The manufacture craft for the case where upper surface of remainder and anode 1 contacts: being by step 13 and step in specific embodiment two
Rapid 14 merge, change are as follows: preparing a layer thickness by low temperature vapour deposition method in the upper surface of non-depletion layer 2 and anode 1 is about
Photic zone 8 of 0.1-5 μm of the anti-reflection film as array device.
Isolated material in specific embodiment two is replaced with PMMA or epoxy resin, step by specific embodiment four
11 fill the process change of area of isolation using isolated material are as follows:
A) isolated material is coated on the epitaxial wafer surface with area of isolation, uses vacuum coat method to ensure area of isolation
It is interior to be full of isolated material, then carry out precuring；
B) mask pattern is then prepared by uv-exposure and development in the upper surface of epitaxial wafer coating photoresist,
The isolated material other than area of isolation is removed under the protection of exposure mask, then removes photoresist, and heating makes the isolated material of area of isolation
It is fully cured, completes the preparation of isolated area 9.
Isolated material in specific embodiment two is replaced with SiO by specific embodiment five2, step 11 use every
Process change from material filling area of isolation are as follows: mask material is covered on the part outside area of isolation, epitaxial growth SiO2
The filling for carrying out area of isolation, removes mask material later.
Specific embodiment six, embodiment is described with reference to Fig.7, for series connection electrode array of structures device production side
Method, the vertical section of probe unit be it is trapezoidal, the vertical section of isolated area 9 is inverted trapezoidal.Step ten in specific embodiment two to
Step 10 eight is changed are as follows:
Step 10: preparing mask pattern on the epitaxial wafer surface with area of isolation, by epitaxial growth or evaporation or splash
Penetrate SiO2Film removes mask material as probe unit side (right side of each probe unit) insulating layer.
Step 11: the mask pattern of anode 1 and anode electrode lead is made by photoetching process, by evaporating or sputtering
And the techniques such as electroforming make anode 1 and anode electrode lead, the one or several kinds such as material Au, Ag, Cu, Al, Cr, Ni, Ti
Alloy, remove mask material.
Step 12: filling area of isolation using isolated material, isolated area 9, detailed process are prepared are as follows:
A) using light-sensitive polyimide as isolated area material, photosensitive polyamides is coated on the epitaxial wafer surface with area of isolation
Imines uses vacuum coat method to ensure then to carry out precuring full of light-sensitive polyimide in area of isolation；
B) by uv-exposure and development, the isolated material other than area of isolation is removed, heating makes to be fully cured, and completes poly-
The preparation of acid imide isolated area.
Step 13: preparing a layer thickness by low temperature vapour deposition method in the upper surface of non-depletion layer 2 and anode 1 is about 0.1-
Photic zone 8 of 5 μm of anti-reflection films as array device.
Step 14: the front of epitaxial wafer is fixed in hard substrate, mechanical reduction or chemical reduction, throwing are then utilized
Light forms substrate layer 6 until exposing the anode electrode lead of 9 lower surface of isolated area.
Step 15: carry out cleaning treatment to the back side of epitaxial wafer, drying, then overleaf spin coating photoresist, passes through light
Carving technology prepares the mask pattern of cathode 7 and the cathode electrode lead coplanar with cathode, and the cathode electrode coplanar with cathode 7 draws
Line is contacted with anode electrode lead in 9 bottom part of isolated area.
Step 16: preparing cathode 7 and cathode electrode lead, material by the methods of evaporation coating, magnetron sputtering and electroforming
Material is one or several kinds of alloy such as Au, Ag, Cu, Al, Cr, Ni, Ti, then removes mask material.
Step 17: the hard substrate that the front of removal epitaxial wafer is fixed, completes encapsulation.
Isolated material also can choose PMMA, epoxy resin, SiO in specific embodiment six2Or other materials, technique
Method uses specific embodiment four and the corresponding step of specific embodiment five.
Specific embodiment seven, embodiment is described with reference to Fig.8, is directed to array device using concatenated after first in parallel
Mixed electrode structure is connected, in electrode fabrication, first using in parallel in specific embodiment two between row as in parallel between column
The corresponding steps of structure complete that the isolated area 9 of probe unit in parallel, anode 1 and anode electrode lead is needed (to be located at isolated area
Upper surface) production, then complete to need concatenated probe unit using cascaded structure corresponding steps in specific embodiment six
(electrode through isolated area draws the contact conductor of anode 1 and cathode 7 between the anode 1 of upper surface, connection series connection probe unit
Line) and isolated area 9 production, then complete whole probe units using cascaded structure corresponding steps in specific embodiment six
The production of photic zone 8, and substrate thinning is carried out, finally according to the cascaded structure or specific embodiment in specific embodiment six
In two parallel-connection structure corresponding steps make whole probe units cathode 7 and the cathode electrode lead coplanar with cathode (be located at every
From area lower surface) production, the cathode 7 of parallel-connection structure in the cascaded structure and specific embodiment two in specific embodiment six
And the production method of cathode electrode lead is identical, be all first to do mask pattern, then passes through evaporation or sputtering and electroforming
Method makes electrode, and first in parallel cascaded structure and pure cascaded structure/pure parallel-connection structure are that mask pattern is not identical again.Specifically such as
Under:
Step 1 to step 9 be identical with embodiment two (vertical section of the isolated area 9 in step 8 be fall ladder
Shape)；
Step 10: the area of isolation of the probe unit using isolated material filling parallel connection part, forms isolated area 9；
A) using light-sensitive polyimide as isolated area material, photosensitive polyamides is coated on the epitaxial wafer surface with area of isolation
Imines uses vacuum coat method to ensure then to carry out precuring full of light-sensitive polyimide in area of isolation；
B) by uv-exposure and development, removal probe unit surface, the column of the array leftmost side one and the rightmost side one arrange every
It is fully cured in isolated material from region, heating, completes the preparation of polyimides isolated area.
Step 11: carrying out cleaning treatment, drying to the upper surface of epitaxial wafer, then in upper surface spin coating photoresist, lead to
Cross anode 1 and anode electrode lead mask pattern that photoetching process prepares the probe unit of parallel connection part.
Step 12: preparing the sun of the probe unit of parallel connection part by the methods of evaporation coating, magnetron sputtering and electroforming
Pole 1 and anode electrode lead, the alloy of the one or several kinds such as material Au, Ag, Cu, Al, Cr, Ni, Ti remove photoresist；
Step 13: preparing mask pattern on the epitaxial wafer surface with isolated area 9, by epitaxial growth or evaporation or splash
Penetrate SiO2Side (right side of each probe unit) insulating layer of film as the probe unit of part in series removes exposure mask material
Material.
Step 14: the anode 1 and jointed anode 1 and cathode 7 that pass through the probe unit of photoetching process production part in series
Contact conductor (through the contact conductor of isolated area 9) mask pattern, by evaporate or sputter and the techniques such as electroforming production string
Join part probe unit anode 1 and jointed anode 1 and cathode 7 contact conductor, material Au, Ag, Cu, Al, Cr, Ni,
The alloy of the one or several kinds such as Ti removes mask material.
Step 15: the area of isolation of the probe unit using isolated material filling part in series, prepares isolated area 9, tool
Body process are as follows:
A) using light-sensitive polyimide as isolated area material, photosensitive polyamides is coated on the epitaxial wafer surface with area of isolation
Imines uses vacuum coat method to ensure then to carry out precuring full of light-sensitive polyimide in area of isolation；
B) by uv-exposure and development, the isolated material other than the column of the array leftmost side one and the column of the rightmost side one is removed, is added
Temperature makes to be fully cured, and completes the preparation of polyimides isolated area.
Step 16: preparing a layer thickness by low temperature vapour deposition method in the non-depletion layer 2 of epitaxial wafer and the upper surface of anode 1
Photic zone 8 of the about 0.1-5 μm of anti-reflection film as array device.
Step 17: the front of epitaxial wafer is fixed in hard substrate, mechanical reduction or chemical reduction, throwing are then utilized
Light, until the probe unit of part in series exposes the anode electrode lead of 9 lower surface of isolated area, the probe unit dew of parallel connection part
Isolated area 9 out obtain substrate layer 6.
Step 18: carry out cleaning treatment to the back side of epitaxial wafer, drying, then overleaf spin coating photoresist, passes through light
Carving technology prepares the cathode 7 of whole probe units and the mask pattern of the cathode electrode lead coplanar with cathode 7, part in series
The cathode electrode lead coplanar with cathode 7 of probe unit is contacted with anode electrode lead in 9 bottom part of isolated area.
Step 19: preparing cathode 7 and cathode connection lead, material by the methods of evaporation coating, magnetron sputtering and electroforming
Material is one or several kinds of alloy such as Au, Ag, Cu, Al, Cr, Ni, Ti, then removes mask material.
Step 20: the hard substrate that the front of removal epitaxial wafer is fixed, completes encapsulation.
Specific embodiment eight, embodiment is described with reference to Fig.9, is directed to array device using in parallel mixed after first connecting
Composite electrode structure, it is in parallel between row as connected between column, in electrode fabrication, first using the series connection in specific embodiment six
Structure corresponding steps complete the isolated area 9 of whole probe units, the anode 1 of concatenated probe unit upper surface and connection are needed to visit
The production of the contact conductor (through the contact conductor of isolated area 9) of anode 1 and cathode 7 between unit is surveyed, then using specific real
Applying the parallel-connection structure corresponding steps in mode two completes to need anode 1 between the probe unit of parallel connection to join (detection list i.e. in parallel altogether
Anode tap between member) and probe unit upper surface anode 1 production, then according still further to the string in specific embodiment six
It is coupled production of the structure corresponding steps to the photic zone 8 of whole probe units, and carries out substrate thinning, finally according to specific embodiment party
In cascaded structure or specific embodiment two in formula six parallel-connection structure corresponding steps make whole probe units cathode 7 and with
The production of the coplanar cathode electrode lead of cathode (be located at isolated area lower surface), cascaded structure and tool in specific embodiment six
The cathode 7 of parallel-connection structure and the production method of cathode electrode lead are identical in body embodiment two, are all first to do exposure mask figure
Then shape makes electrode by the method for evaporation or sputtering and electroforming, and first connect again parallel-connection structure and pure cascaded structure/pure in parallel
Structure is that mask pattern is not identical.It is specific as follows:
Step 1 is identical with specific embodiment seven to step 9；
Step 10: preparing mask pattern on the epitaxial wafer surface with isolated area 9, pass through epitaxial growth or evaporation or sputtering
SiO2Probe unit side (right side of each probe unit) insulating layer of film as part in series removes mask material.
Step 11: making anode 1 and the connection series connection of the upper surface of the probe unit of part in series by photoetching process
The mask pattern of the contact conductor (through the contact conductor of isolated area 9) of anode 1 and cathode 7, passes through evaporation between probe unit
Or the contact conductor of sputtering and the techniques such as electroforming production anode 1 and jointed anode 1 and cathode 7, material Au, Ag, Cu, Al, Cr,
The alloy of the one or several kinds such as Ni, Ti removes mask material.
Step 12: filling the area of isolation of whole probe units using isolated material, isolated area 9, detailed process are prepared
Are as follows:
A) using light-sensitive polyimide as isolated area material, photosensitive polyamides is coated on the epitaxial wafer surface with area of isolation
Imines uses vacuum coat method to ensure then to carry out precuring full of light-sensitive polyimide in area of isolation；
B) by uv-exposure and development, the isolated material other than area of isolation is removed, heating makes to be fully cured, and completes poly-
The preparation of acid imide isolated area.
Step 13: carrying out cleaning treatment, drying to the upper surface of epitaxial wafer, then in upper surface spin coating photoresist, lead to
Cross anode 1 and anode electrode lead mask pattern that photoetching process prepares the probe unit of parallel connection part.
Step 14: preparing the probe unit anode 1 of parallel connection part by the methods of evaporation coating, magnetron sputtering and electroforming
And anode electrode lead, the alloy of the one or several kinds such as material Au, Ag, Cu, Al, Cr, Ni, Ti remove photoresist.
Step 15: preparing a layer thickness by low temperature vapour deposition method in the non-depletion layer 2 of epitaxial wafer and the upper surface of anode 1
Photic zone 8 of about 0.1-5 μm of the anti-reflection film as array device.
Step 16: the front of epitaxial wafer is fixed in hard substrate, mechanical reduction or chemical reduction, throwing are then utilized
Light, until series connection probe unit exposes the anode electrode lead of 9 lower surface of isolated area, probe unit in parallel exposes isolated area 9, obtains
To substrate layer 6.
Step 17: carry out cleaning treatment to the back side of epitaxial wafer, drying, then overleaf spin coating photoresist, passes through light
Carving technology prepares the cathode 7 of whole probe units and the mask pattern of the cathode electrode lead coplanar with cathode 7, part in series
The cathode electrode lead coplanar with cathode 7 of probe unit is contacted with anode electrode lead in 9 bottom part of isolated area.
Step 18: preparing the (yin of whole probe units of cathode 7 by the methods of evaporation coating, magnetron sputtering and electroforming
Pole) and cathode electrode lead, the alloy of the one or several kinds such as material Au, Ag, Cu, Al, Cr, Ni, Ti then remove exposure mask
Material.
Step 19: the hard substrate that the front of removal epitaxial wafer is fixed, completes encapsulation.
Each processing step, material therefor and planform in each specific embodiment can be interchanged.
Obviously, above embodiment is only intended to clearly illustrate example, and does not limit the embodiments.
For those of ordinary skill in the art, other various forms of variations can also be made on the basis of the above description
Or it changes.There is no necessity and possibility to exhaust all the enbodiments.And obvious variation extended from this
Or it changes still within the protection scope of the invention.
Claims (10)
1. the production method of integrated silicon-based visible light detector array device, which is characterized in that the array device includes multiple spies
Survey unit, multiple isolated areas (9) and multiple electrodes lead (10)；Multiple probe units form array, each spy by regular array
Surveying unit includes anode (1), non-depletion layer (2), absorbed layer (3), field control layer (4), avalanche layer (5), substrate layer (6), cathode (7)
With photic zone (8)；Field control layer (4), absorbed layer (3) and non-depletion layer (2) are successively set on the upper table of avalanche layer (5) from bottom to up
On face；Photic zone (8) and anode (1) are arranged on the upper surface of non-depletion layer (2), and the lower surface of anode (1) is exhausted with non-
The upper surface contact of layer (2), the lower surface of photic zone (8) is all contacted with non-depletion layer (2) or a part of and non-depletion layer
(2) it contacts, remainder is contacted with the upper surface of anode (1)；Substrate layer (6) is arranged on the lower surface of avalanche layer (5)；Cathode
(7) it is arranged on the lower surface of substrate layer (6), the lower surface of cathode (7) all standing or part covering substrate layer (7)；Isolation
Area (9) is arranged between two adjacent probe units, and two adjacent probe units are isolated；Contact conductor (10) setting exists
Isolated area (9) are run through in isolated area (9) upper surface, isolated area (9) lower surface, contact conductor (10) connect multiple probe units it
Between electrode；
The connection type of the probe unit is parallel connection, and making step is as follows:
Step 1: choosing substrate material, cleaning treatment is carried out to substrate material；
Step 2: deposit epitaxial layers are as avalanche layer (5) on substrate material after the cleaning process；
Step 3: in avalanche layer (5) upper surface deposition field control layer (4)；
Step 4: control layer (4) upper surface deposit absorbent layer (3) on the scene；
Step 5: depositing non-depletion layer (2) in absorbed layer (3) upper surface；
Step 6: preparing mask pattern on non-depletion layer (2) surface, area of isolation is prepared；
Step 7: removal mask material, then prepares the mask pattern of filling area of isolation, area of isolation is filled, removes exposure mask
Material obtains isolated area (9)；
Step 8: preparing anode (1) and anode electrode lead mask pattern, prepares anode (1) and anode electrode lead, removal are covered
Membrane material；
Step 9: the mask pattern of anti-reflection film is prepared on the upper surface of non-depletion layer (2) or non-depletion layer (2) and anode (1),
Then anti-reflection film is prepared, mask material is removed, obtains photic zone (8)；
Step 10: the front of epitaxial wafer is fixed in hard substrate, substrate thinning is then carried out, until expose isolated area (9),
It is formed substrate layer (6)；
Step 11: preparing the exposure mask of cathode (7) and cathode electrode lead, cathode (7) and cathode electrode lead are then prepared, is gone
Except mask material；
Step 12: the hard substrate that removal epitaxial wafer front is fixed, completes encapsulation, obtains integrated silicon-based visible-light detector battle array
Column device；
The connection type of the probe unit is series connection, and step 7 to step 12 is replaced are as follows:
Step 7: preparing mask pattern on the epitaxial wafer surface with area of isolation, insulation film is made as probe unit side
Face insulating layer removes mask material；
Step 8: preparing the mask pattern of anode (1) and the anode electrode lead coplanar with anode (1), anode (1) and sun are prepared
Pole contact conductor removes mask material；
Step 9: filling area of isolation using isolated material, formed isolated area (9)；
Step 10: preparing anti-reflection film as photic zone in the upper surface of non-depletion layer (2) or non-depletion layer (2) and anode (1)
(8)；
Step 11: the front of epitaxial wafer is fixed in hard substrate, substrate thinning is then carried out, until exposing isolated area
(9) lower surface is formed substrate layer (6)；
Step 12: prepare the mask pattern of cathode (7) and cathode electrode lead at the back side of epitaxial wafer, make cathode (7) and
Cathode electrode lead removes mask material；
Step 13: the hard substrate that removal epitaxial wafer front is fixed, completes encapsulation, obtains integrated silicon-based visible-light detector battle array
Column device.
2. the production method of integrated silicon-based visible light detector array device according to claim 1, which is characterized in that institute
State the connection type of probe unit be it is first in parallel after series hybrid electrode structure, after step 6 the step of replaces are as follows:
In electrode fabrication, first press the corresponding making step of parallel-connection structure, complete the isolated area (9) for needing probe unit in parallel and
Then the production of anode (1) and anode electrode lead is completed to need concatenated detection single using the corresponding making step of cascaded structure
The contact conductor and isolated area of anode (1) and cathode (7) between the anode (1) of first upper surface, the concatenated probe unit of connection
(9) then the production of the photic zone (8) of whole probe units is completed in production using the corresponding making step of cascaded structure, and right
Whole probe units carry out substrate thinning, and finally according to parallel-connection structure or the corresponding making step production of cascaded structure, all detection is single
The cathode (7) of member and the cathode electrode lead coplanar with cathode (7).
3. according to right want 1 described in integrated silicon-based visible light detector array device production method, which is characterized in that it is described
The connection type of probe unit is mixed electrode structure in parallel after first connecting, and after step 6 the step of replaces are as follows:
In electrode fabrication, the corresponding making step of cascaded structure is first used, completes the sun for needing concatenated probe unit upper surface
The contact conductor of anode (1) and cathode (7) between pole (1), connection series connection probe unit and whole probe unit isolated areas (9)
Production, then using the corresponding making step of parallel-connection structure complete to need probe unit in parallel anode (1) and detection in parallel
Then the production of anode electrode lead between unit completes the saturating of whole probe units according to the corresponding making step of cascaded structure
The production of photosphere (9) simultaneously carries out substrate thinning to whole probe units, is then accordingly made of parallel-connection structure or cascaded structure
Step completes whole cathodes (7) of probe unit and the production of the cathode electrode lead coplanar with cathode (7).
4. the production method of -3 any integrated silicon-based visible light detector array devices according to claim 1, feature
It is, the substrate material is silicon wafer.
5. the production method of integrated silicon-based visible light detector array device described in -3 any one according to claim 1,
It is characterized in that, the shape of the probe unit is square, polygon, rectangle or circle.
6. the production method of integrated silicon-based visible light detector array device described in -3 any one according to claim 1,
Be characterized in that, the shape of the anode (1) and cathode (7) be respectively outer ring, single shape, a plurality of shape, circle, inner circle annular,
The combination of one or more of inner polygon.
7. the production method of integrated silicon-based visible light detector array device described in -3 any one according to claim 1,
It is characterized in that, the material of the anode (1), cathode (7) and contact conductor (10) is respectively in Au, Ag, Cu, Al, Cr, Ni, Ti
One or more of alloys.
8. the production method of integrated silicon-based visible light detector array device described in -3 any one according to claim 1,
It being characterized in that, the non-depletion layer (2) is highly doped p+ type silicon, with a thickness of 0.01-0.5 microns, doping concentration 1017-
1019cm-3；Absorbed layer (3) is p-type silicon, with a thickness of 1-10 microns, doping concentration 1015-1016cm-3；Field control layer (4) is p-type
Silicon, with a thickness of 0.1-1.0 microns, doping concentration 1016-1018cm-3；Avalanche layer (5) is p-type silicon, micro- with a thickness of 0.1-0.5
Rice, doping concentration 1015-1017cm-3；Substrate layer (6) is highly doped n+ type silicon, and with a thickness of 5-100 microns, doping concentration is
1018-1020cm-3。
The p-type silicon Doped ions are B3+, n-type silicon Doped ions are P5+Or As5+。
9. the production method of integrated silicon-based visible light detector array device described in -3 any one according to claim 1,
It is characterized in that, the photic zone (8) is by two kinds or three in high refractive index film, middle index film and low refractive index film
Kind is alternately arranged composition, and totally two to nine layers；Wherein, high refractive index, thin film materials CeO2、ZrO2、TiO2、Ta2O5、ZnS、ThO2
One or more of combination, middle index film material be MgO, ThO2H2、InO2、MgO-Al2O3One or more of
Combination, low refractive index film material be MgF2、SiO2、ThF4、LaF2、NdF3、BeO、Na3(AlF4)、Al2O3、CeF3、LaF3、
The combination of one or more of LiF.
10. the production method of integrated silicon-based visible light detector array device described in -3 any one according to claim 1,
It is characterized in that, the material of the isolated area (9) is polyimides, polymethyl methacrylate, epoxy resin or SiO2。
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