CN109690951A - Gate driving circuit for power conversion device - Google Patents

Gate driving circuit for power conversion device Download PDF

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Publication number
CN109690951A
CN109690951A CN201780045108.4A CN201780045108A CN109690951A CN 109690951 A CN109690951 A CN 109690951A CN 201780045108 A CN201780045108 A CN 201780045108A CN 109690951 A CN109690951 A CN 109690951A
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China
Prior art keywords
transistor
gate driving
resistor
driving circuit
grid
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Granted
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CN201780045108.4A
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CN109690951B (en
Inventor
卢俊诚
H.白
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Heila GmbH and Co KG
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Heila GmbH and Co KG
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28—Modifications for introducing a time delay before switching
    • H03K17/284—Modifications for introducing a time delay before switching in field effect transistor switches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0635—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors and diodes, or resistors, or capacitors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
    • H01L29/7804—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode
    • H01L29/7805—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode in antiparallel, e.g. freewheel diode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/337—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in push-pull configuration
    • H02M3/3376—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only in push-pull configuration with automatic control of output voltage or current
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/04—Modifications for accelerating switching
    • H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
    • H03K17/0412—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit
    • H03K17/04123—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/12—Modifications for increasing the maximum permissible switched current
    • H03K17/122—Modifications for increasing the maximum permissible switched current in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H03K17/161—Modifications for eliminating interference voltages or currents in field-effect transistor switches
    • H03K17/162—Modifications for eliminating interference voltages or currents in field-effect transistor switches without feedback from the output circuit to the control circuit
    • H03K17/163—Soft switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/602—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Power Conversion In General (AREA)
  • Electronic Switches (AREA)

Abstract

A kind of device includes gate driving circuit and GaN HEMT switch, and wherein gate driving circuit there is gate driving to export to generate gate drive signal in response to grid control signal.The switch has the grid that gate driving circuit is connected to by gate drive resistor.The gate driving circuit includes NPN(or NMOS) connect transistor and PNP(or PMOS) shutdown transistor.The gate driving circuit include be coupled to connect transistor, connections resistor with first resistor and being coupled to turn off transistor, shutdown resistor with second resistance.It is described to turn on and off transistor, gate drive resistor, switching device, but be not to turn on and turn off resistor and be arranged in integrated circuits to reduce gate driving loop inductance.First and second resistance can be different, and turn on and off speed with adjust the switching device.

Description

Gate driving circuit for power conversion device
Cross reference to related applications
This application claims the U.S. Provisional Application No. no. 62/365,157(' 157 submitted on July 21st, 2016 applications) power ' 157 applications are incorporated herein, as recording herein completely by benefit by reference.
Technical field
Present disclose relates generally to power electronics (power electronics) systems, and relate more particularly to be used for The gate driving circuit of power conversion device.
Background technique
Background technique description is described below for the purpose for only providing context.Therefore, which describes Any aspect its do not have degree of other qualifications as the prior art on, both ambiguously or be not impliedly recognized as It is the prior art for the disclosure.
In power electronic circuit, cause due to controlling theme switching device by drive circuit during switching process Electric stress (electrical stress), so-called gate driver circuit be important and for design for have Challenge.For example, voltage stress influences theme switching device during turn off process, and current stress is sent out during connection process It is raw.In some applications, it may be desirable that and/or realize for connecting the different switching speeds of (ON) relative to shutdown (OFF). Particularly, switching speed usually determines switching loss.Switching speed is faster, and switching loss is lower, so that switching frequency is higher.? On the other hand, it means that at identical loss level, faster the semiconductor of switching speed generates higher switching frequency, this Smaller passive component is resulted in, so as to cause higher power density.For conventional Si IGBT, for example, switching speed It can be and about > 100 nanosecond (ns) carry out ON/OFF, and for GaN device, such value can drop to~10 ns, this meaning Switching loss be conventional device~1/10 Si.This will generate much higher efficiency or 10 times of higher power density.
It is related to controlling the input capacitance to switching device by the mechanism that gate driver circuit is realizedCarry out charging and Electric discharge.In theory, different switching speeds and ON/OFF time mean the different impedances of gate driving loop.
In addition, the broad-band gap (wide-bandgap) (WBG) of such as silicon carbide (SiC) and gallium nitride (GaN) device etc Device is becoming more popular, this is attributed to their switching frequency capabilities more higher than conventional silicon (Si) device, lower opens Close loss and higher thermal energy power.In the case where enhancement mode GaN HEMT, it can be appreciated that parasitic capacitance ratio is for tradition Silicon device is much smaller (for example,~pF is horizontal).The level of the reduction allows faster switching speed；However, the characteristic is also required to Increased concern is to control and reduce gate driving loop inductance, to minimize the induction ring of such as grid voltage The undesirable side effect of (induced ringing) etc.
Accordingly, there exist overcome the problems, such as needs one or more in this field.
Discussion above is intended only to illustrate this field and is not construed as the negative to scope of the claims.
Summary of the invention
It instructs consistent embodiment to realize with this and reduces the integrated gate drive circuitry of gate driving loop inductance and all Such as the device for power switching of WBG switching device (for example, GaN HEMT) etc.The reduction has many advantages, including at least subtracts Few ring in switching device gate terminal.It is for example adapted in addition, being provided with the consistent embodiment of this introduction in power It is improved used in conversion equipment, in adjustment switching speed (for example, being adjusted by allowing individually to turn on and off timing) Flexibility.
A kind of device according to the disclosure includes gate driving circuit and such as GaN HEMT device etc in embodiment Broad-band gap switching device.Gate driving circuit has the grid for the input for being configured to respond to be applied to gate driving circuit At least one gate driving that pole controls signal and generates gate drive signal exports.Broad-band gap (WBG) switching device has grid Pole, drain electrode and source electrode, wherein the grid is electrically connected to gate driving circuit by gate drive resistor.Drain electrode and source electrode Can be configured as be electrically coupled to load (for example, and/or source electrode and/or load or other external circuits, in this field As known).
Gate driving circuit includes driving field-effect to (ii) CMOS gate from (i) bipolar junction transistor (BJT) The connection transistor and shutdown transistor of one selection of the centering of transistor.Gate driving circuit further includes being coupled to connection Transistor, connection resistor with first resistor and be coupled to shutdown transistor, shutdown electricity with second resistance Hinder device.In embodiment, it connects transistor to be disposed in current path, for connecting process, and turns off resistor and be arranged In current path, it to be used for turn off process.In embodiment, first resistor can be different from second resistance, with adjustment switch speed Degree.
According to reading following description and claims and according to review attached drawing, the above-mentioned and other side of the disclosure Face, feature, details, utilization and advantage will be apparent.
Detailed description of the invention
Fig. 1 is the schematic diagram and block diagram of the AC/DC electric power transducer of isolation, wherein grid according to this teaching can be used Pole driving circuit embodiment.
Fig. 2 is the schematic diagram and block diagram of the AC/DC electric power transducer of isolation, wherein can be used according to this teaching Gate driving circuit embodiment.
Fig. 3 shows the first set of switch control signal associated with the AC/DC rectifier based on full-bridge of Fig. 2 Simplified timing diagram.
Fig. 4 shows power grid (grid) side DC/AC converter and battery side AC/DC rectifier (H- for control figure 2 Bridge) operation switch control signal second set simplification timing diagram.
Fig. 5 is the timing diagram for determining the parameter of the switching sequence in Fig. 4.
Fig. 6 A-6B is to respectively illustrate the gate driving electricity of the electric current flowing during connection process and during turn off process The equivalent schematic circuit of the simplification on road.
Fig. 7 is the rough schematic view of gate driving circuit embodiment according to this teaching.
Fig. 8 A-8B is to respectively illustrate to use other of bipolar junction transistor (BJT) and CMOS gate driving transistor Gate driving circuit embodiment rough schematic view.
Fig. 9 is the rough schematic view and diagram view of the another gate driving circuit embodiment as realized in integrated circuits Figure.
Figure 10-11 is to respectively illustrate the grid control signal gone in gate driving circuit and gained gate drive signal Timing diagram.
Specific embodiment
Various embodiments are described as various devices, system and or method herein.Many details are described to mention For overall structure, function, manufacture and the use to the embodiment for being such as described and being illustrated in the accompanying drawings in the description Thorough understanding.However, skilled persons will understand that: it can be practiced in the case where not having such detail Embodiment.In other instances, well known operation, component and element is not described in detail to describe in the description so as not to fuzzy Embodiment.Those skilled in the art will be appreciated that embodiment described and shown herein is non-limited example, And it will therefore be appreciated that the details of specific structure disclosed herein and function can be it is representational, and not necessarily The range of embodiment is limited, range is only limited by the claims that follow.
Throughout specification to " various embodiments ", " some embodiments ", " one embodiment " or " embodiment " or all such The reference of class means that the specific feature, the structure or characteristic that describe in conjunction with the embodiments are included at least one embodiment. Therefore, throughout specification position in phrase " in various embodiments ", " in some embodiments ", " one implement In example " or the appearance of " in embodiment " or the like be not necessarily all referring to identical embodiment.Moreover, specific feature, Structure or characteristic can be combined in any suitable manner in one or more embodiments.It therefore, can be without limitation The specific feature that one embodiment will be combined to illustrate or describe, structure or characteristic in whole or in part with it is one or more other The feature of embodiment, structure or characteristic combination, as long as this combination is not illogical or inoperative.
This introduction is related to usefully being applied to the improved gate driving circuit of diversified application, including only For example, such as by reference to entitled " ELECTRIC POWER CONVERSION APPARATUS HAVING SINGLE-PHASE The U. S. application no.15/198,887 that the 30 days June in 2016 of AND MULTI-PHASE OPERATION MODES " submits High-frequency power converter seen in (' 887 application) is incorporated herein by reference ' 887 applications by described in, is such as documented in completely It is the same herein.
Before the detailed description of the gate driving circuit improved in conjunction with Fig. 6-Figure 10, exemplary function will be recorded first The brief description of rate conversion equipment, wherein the embodiment of this gate driving circuit can be used.
Referring now to the drawings, wherein identical appended drawing reference be used to identify the same or similar portion in various views Part, Fig. 1 be isolation AC/DC device for electric power conversion 20(below is " conversion equipments ") rough schematic view and block diagram. As being described in detail in Fig. 6-Figure 10, the conversion equipment 20 of Fig. 1-Fig. 2 can using improved gate driving circuit and/ Or integrated gate drive circuitry/switch.The embodiment of this gate driving circuit can be provided about switching speed flexibility Improved flexibility.In other examples, the increase of gate driving circuit and WBG switching device (for example, GaN HEMT) Integrated horizontal can reduce gate driving loop inductance, this can then reduce ring in gate terminal and its is relevant Side effect.
In the illustrated embodiment, conversion equipment 20 is coupled to AC input power source 22 and has and is configured as making electricity The smooth input inductor 24 of current on line side.Conversion equipment 20, which is additionally configured on output node 26 output, can be used for for can The DC voltage signal that storage battery 27 charges, the rechargeable battery 27 only such as such as electric vehicle (EV) battery.Battery 27 are shown as including that battery voltage source part 28(is herein referred to as sometimesOr) and cell resistance 30(have When be herein referred to as).The source AC 22(AC power source) it is configured as providing AC input with specified AC input voltage level Electric current.The source AC 22 can be for the main AC power supplies or electric system of building or in whole biggish AC electrical power power grid It is provided within (being hereinafter sometimes referred to as grid power, network voltage, grid side etc.) such.The source AC 22 can be Single-phase or multiphase (for example, 3- phase).Depending on position, the source AC 22 can export 120 volts or 240 volts, with 60 Hz with 50 Hz exports 110 volts or 220 volts or exports 380-480 volts (3- phase power) with 50 Hz.The electricity of rechargeable battery 27 PressureIt can be nominally between about 200-500 VDC.In embodiment, conversion equipment 20 can have the defeated of about 360 V Voltage out.
Conversion equipment 20 includes two main grades, and wherein the first order 32 includes AC/AC converter 34 and the second level 36 is wrapped Include AC/DC rectifier 38.The grade is electrically isolated from each other but by 40 coupling of transformer with armature winding 42 and secondary windings 44 It closes.
The first order 32 may include the indirect matrix converter (MC) as AC/AC converter 34, and may include using In the conventional method of building matrix converter (MC) indirectly as known in the art.It will be appreciated, however, that converter 34 can be with Including real matrix converter.The AC/AC converter 34 of indirect matrix converter type has least energy memory requirement, Such as by by three grades (referring to background technique) downstairs merger as known in the art be two grades, and such as by reference to The U.S. Patent application no.14/789,412(that on July 01st, 2016 submits are entitled below is ' 412 applications " ELECTRIC POWER CONVERSION APPARATUS ") seen in as, eliminate (bulky) big for volume and longevity It orders the needs of limited energy-storage capacitor and presents improved efficiency, be incorporated herein by reference ' 412 applications by described in, As recording herein completely.The power density of single unit system can also be increased by eliminating DC bus capacitor.
Fig. 2 shows the device for electric power conversion for being designated as 20a of the indirect matrix converter of characterization.Conversion equipment 20a Including two main grades, that is, the first order 32 of the AC/AC converter including indirect matrix converter form and whole including AC/DC Flow the second level 36 of device part 36.
In input (power grid) side, Fig. 2 shows AC(power grids) source 22, the AC(power grid) source 22 can be it is single-phase, 60 Hz, 120 volt ACs (AC) voltage signal are alternatively single-phase 50 Hz AC signal or multiphase (for example, 3- phase) exchange (AC) source.In output (battery) side, Fig. 2 shows have cell resistanceRechargeable battery
The first order 32 include input inductor 24(be sometimes referred to as " L "), indirect matrix converter, coupling inductorAnd Transformer 40 including armature winding 42 and secondary windings 44.
Input inductor 24 and the source AC 22 are electrically coupled in series and are configured as making the grid side electric current about the source AC 22 Smoothly.The size of inductor 24 will depend on smooth degree and switching frequency.In embodiment, inductor 24 can be about 10 microhenrys。
In embodiment, indirect matrix converter includes full-bridge rectifier 66(AC/DC converter), be designated as's Filter condenser and DC/AC full-bridge converters 68.Indirect matrix converter be configured for AC/AC convert and further include by It is configured to receive the input interface of the first AC signal from the source AC 22 and is configured as generating the output interface of the 2nd AC signal.Such as figure Shown in 2, the input interface of indirect matrix converter is coupled to the two sides in the source AC 22 by inductor 24.Indirect matrix converter Output interface pass through coupling inductorIt is coupled to the both ends of armature winding 42.
Full-bridge rectifier 66 is constituted for rectifying first exchange (AC) input signal at node 74 (that is, it is with for example The first mains frequency of 60Hz is presented) and generate at node 76 first rectification output signal device.First rectification Signal includes the first direct current (DC) component.Rectifier 66 be may include with full bridge configuration arrangement and be operated with mains frequency It is designated as M1、M2、M3、M4Four semiconductor switch.Switch M1、M2、M3、M4It may include such as MOSFET or IGBT device Etc conventional semiconductor as known in the art switch.In embodiment, switch M1、M2、M3、M4It may include coming from It is mentioned under the trade names and/or dash number STY139N65M5 of STMicroelectronics, Coppell, Texas, USA The N- channel power MOS FET of confession.
CapacitorOutput across rectifier 66 is connected between node 76 and ground nodes 78.CapacitorAccording to big The small signal for being configured as filtering the rectification at node 76 high-frequency harmonic (for example, relatively small:It is horizontal).It should manage Solution,Energy stores are not used for, but are used for filtering purpose, and be not therefore big, the big DC- bus of volume Capacitor, because can be in millifarad rank for DC- bus capacitorConventional 3- grade converter for be typical case 's.The size of this reduction can increase power density and extend the service life of conversion equipment 20a.
DC/AC converter 68 is electrically connected to the output (that is, cross-node 76,78 connects) of rectifier 66.DC/AC converter 68 are configured as the first DC(rectification on node 76) signal is converted into the 2nd AC signal.As illustrated, DC/AC turns Parallel operation 68 may include being designated as S1、S2、S3、S4And with full bridge configuration arrangement, with second frequency, that is, switching frequency Four semiconductor switch of operation.Second switch frequencyIt is general more much higher than the first mains frequency.In embodiment, it second opens Closing frequency can be in the range between about 135 kHz to 500 kHz, and the first mains frequency can be 60 Hz(or 50 Hz).Semiconductor switch S1、S2、S3、S4It may include commercial parts as known in the art, only for example, GaN high electron mobility Transistor (HEMT) device, such as in the trade name for coming from GaN Systems Corp., Ann Arbor, Michigan, USA Claim and/or dash number GS66516T under the enhancement mode GaN transistor that provides.
InductorIt is electrically connected in series between DC/AC converter 68 and armature winding 42.
Transformer 40 constitutes electrical isolation device and including armature winding 42 and electric isolution and magnetic-coupled secondary windings 44.As it is known, characterizing transformer 40 by the turn ratio (turn ratio) between secondary windings and armature winding.
The second level 36 of conversion equipment 20a includes AC/DC converter 70 and is designated asOutput capacitor.
AC/DC converter 70 is electrically connected to the second winding 44 of transformer 40 and be configured as will be on secondary windings 44 The output signal of the second rectification on output node 80 is converted or be rectified into the AC signal of induction.From single phase converter part 20a's The output signal generated on output node 80 has DC component and at least one AC component, and wherein at least one AC component includes The second harmonic (for example, the 120 Hz components for being directed to 60 Hz mains frequencies) of mains frequency.
In the illustrated embodiment, AC/DC converter 70 may include with active H- bridge (full-bridge) switch arrangement 70 arrangement , be designated as S5、S6、S7、S8Four semiconductor switch.In embodiment, control H- bridge switch arrangement 70 is with above-mentioned switch FrequencyOperation is (that is, control switch S1~S8With identical switching frequencyOperation).Semiconductor switch S5、S6、S7、S8It can wrap Commercial parts are included, for example, GaN high electron mobility transistor (HEMT) device, is such as coming from GaN Systems Corp., The enhancement mode GaN provided under the trade names and/or dash number GS66516T of Ann Arbor, Michigan, USA is brilliant Body pipe.
Output capacitorOutput node 80 with output ground nodes 82 span H bridge 70 output connect and according to Size be configured as filtering the output signal at node 80 high-frequency harmonic (for example, relatively small:It is horizontal).Implementing In example, capacitorIt can be about 100。
Conversion equipment 20a further includes the desired control strategy for being configured as realizing the operation for conversion equipment 20a Below is controllers 46 by electronic control unit 46().Controller 46 includes processor 48 and memory 50.Processor 48 can To include processing capacity and input/output (I/O) interface, by the input/output (I/O) interface, processor 48 can be with It receives multiple input signals and generates multiple output signals (for example, for switch M1~M4And S1~S8Gate driving letter Number).Memory 50 is provided for data and the storage of instruction or code (for example, software) for processor 48.Memory 50 may include various forms of non-volatile (that is, non-transitory) memories and/or volatile memory, described non-volatile Memory includes flash memory or including the read-only of various forms of programmable read only memory (for example, PROM, EPROM, EEPROM) Memory (ROM)；The volatile memory includes comprising Static Random Access Memory (SRAM), dynamic random access memory The random-access memory (ram) of device (DRAM) and Synchronous Dynamic Random Access Memory (SDRAM).
Although being not shown in Fig. 2, conversion equipment 20a can also include drive circuit in the defeated of controller 46 It is docked between the gate terminal of semiconductor switch out.In embodiment, such gate driving device/circuit may include commercialization Component, all commercial chips as known in the art, for example, coming from IXYS Corporation, Milpitas, Available grid drive chip under the dash number IXD_614 of California, USA.However, consistent being instructed with this In other embodiments, can be used in conjunction with Fig. 6-Figure 10, be particularly described below in conjunction with above-mentioned GaN switching device it is improved Gate driving circuit.
Memory 50 stores executable code in the form of main control logic 51, and the main control logic 51 is configured as root The operation of conversion equipment 20a is controlled according to desired control strategy.Main control logic 51 is configured when being executed by processor 48 To generate in response to one or more input signals for switch M1~M4And S1~S8Various gate drive signals.Main control Logic 51 may include that the logical block of programming to realize concrete function, the concrete function includes but is not limited to rectifier logic 58, power factor correcting (PFC) logic 60, zero voltage switch (ZVS) logic 62 and optionally active filter duty ratio (duty cycle) control logic 64, such as by reference to entitled " ELECTRIC POWER CONVERSION APPARATUS The U.S. submitted in 30 days June in 2016 of HAVING SINGLE-PHASE AND MULTI-PHASE OPERATION MODES " Apply no. 15/198,887(' 887 apply) seen in as, by reference will described in ' 887 application be incorporated herein, such as completely It records the same herein.
Power grid rectifier logic 58 is configurable to generate the switch M for rectifier 661~M4Gate drive signal.For This is completed, conversion equipment 20a may include being configured as the instruction network voltage that output includes polarity (that is, positive or negative) The grid voltage sensor 52(of signal be shown in the form of frame).Voltage sensor 52 can be disposed in grid side (that is, It is electrically connected to the source AC 22), to monitor network voltage.In embodiment, grid voltage sensor 52 may include in this field The conventional components known.
Fig. 3 shows the gate drive signal generated by the power grid rectifier logic 58 of controller 46 (that is, switch control is believed Number) timing diagram.Based on M1~M4H- bridge rectifier 66 by power grid AC voltage commutation at D/C voltage.M1~M4Switching frequency (for example, 50~60Hz) identical as network voltage.It is noted that controlling M by the polarity for detecting network voltage1~M4.Therefore, When network voltage is positive, M1And M4It is switched on (that is, M1And M4'sIt is high).When network voltage is negative, then M2 And M3It is switched on.For switch M1And M4Gate drive signal consistently operate, and switch M2And M3Consistently operate.In addition, M1M4Combination and M2M3Composition complementary.In short, switch M1~M4It is all to become according to the zero-turn that grid voltage sensor 52 exports The active switch to be worked with the mains frequency of such as 60Hz.
Referring again to FIGS. 2, power factor correcting (PFC) control logic 60 is configured generally to manage out in this way Close S1~S8Operation (that is, conduction (conduction) or non-conductive), thus transient current of the control from the source AC 22, so as to With the same phase of instantaneous voltage in the source AC 22.In order to realize consistent (unity) or close to consistent power factor (that is, grid side voltage And the case where current in phase), conversion equipment 20a includes power network current sensor 54.In embodiment, current sensor 54 is matched It is set to and determines the electric current by inductor 24 and the horizontal signal for indicating to draw electric current from the source AC 22 is provided to controller 46. Therefore, which is power network current indication signal.In embodiment, controller 46 is directed to by control by PFC logic 60 and is opened Close S1~S8Gate drive signal realize power factor correcting.This will be described in greater detail below.Power network current sensor 54 may include conventional components as known in the art.
Zero voltage switch (ZVS) logic 62 is configured generally to management switch S in this way1~S8, so that they are excellent Selection of land is switched on and off with zero or near zero voltage.In general, in order to maintain the zero voltage switch for switch connection, Before ON Action, electric current should be from source electrode reverse flow to drain electrode, this makes switching voltage drop to zero.Therefore, it is connect in switch During logical, switch only undertakes electric current change, and the voltage of the drain-to-source of (then-prevailing) across switch is always at that time Close to zero, this then eliminates connection loss, to reach ZVS connection.For more information, can make for 2015 Below is ' 988 applications, entitled " GATE DRIVE by the U. S. application no. 14/744 that June 19 submitted, 988( CIRCUIT ") reference, by reference will described in ' 988 applications be incorporated herein, as record completely it is herein.
Fig. 4 shows the control switch S in single switch frequency embodiment1~S8Operation gate drive signal (that is, The second set of switch control signal) timing diagram.It in the illustrated embodiment, will be to have the identical of 50% duty ratio to open Close frequencyOperate S1~S8.In order to realize high system power-density, switching frequencyIt is high as far as possible.For S1And S2、 S3And S4、S5And S6And S7And S8Gate drive signal be complementary.Main control logic 51 is configured as S5And S7's Phase shift is introduced between gate drive signal.Including switching frequencyAnd in S5And S7Between determination phase shift Multiple factors Together define the power that primary side is transferred to from the primary side of transformer 40.In other words, above-mentioned factor provides two (2) Freedom degree controls the power of transfer.Meanwhile in order to realize ZVS, S5To S7Phase shift must fall into switching frequency alsoLimitation Into some range of some value.In Fig. 4, also with switch S1~S8State sequential relationship show pass through inductance DeviceElectric current.
The main control logic 51 met with PFC logic 60 and ZVS logic 62 has been determined to be designated as in Fig. 4-Fig. 5WithAt least two parameters.Parameter corresponds to S2And S8Time delay between failing edge, andParameter corresponds to S1And S6Time delay between failing edge.Illustrated by being patterned as in Fig. 4, S5To S7 Phase shift be limited atWithBetween.
Fig. 5 be show it is above-mentionedWithThe timing diagram of the waveform of parameter, it is describedWithParameter It is by controller 46 for determining S5And S7Between phase shift two parameters.ParameterCorresponding to switching frequency。
In embodiment, controller 46 executes main control logic 51, wherein realizing rectifier logic 58 simultaneously, PFC is patrolled Collect the function of 60 and ZVS logic 62.In this regard, it can be determined by controller 46 according to equation (1)Ginseng Number:
Equation (1)
WhereinIt is the voltage of the measurement of the grid side (that is, 74-Fig. 2 of input node) of converter 20a,It is node 80 The output voltage of the measurement of the converter at place, andBe transformer 40 turn ratio (that is,, whereinIt is time Grade the number of turns quantity andIt is the quantity of primary turns).Parameter in equation (1)It is determined by system designer with reality Existing ZVS switch.In embodiment,, whereinWithFunction be documented in it is following Equation (2) and equation (3) in:
Equation (2)
Equation (3)
WhereinBy minimum quadergy (reactive energy) determination to realize zero voltage switch (ZVS) simultaneously AndIt is the minimum current for realizing ZVS,It is that (it is represented as in Fig. 2 in the series inductance of primary side), AndIt is system maximum switching frequency.Variable has been defined aboveWith。
In addition, by control variable (relative toThe power that instantaneously shifts) monotony interval determine parameter。
In operation, controller 64 changes switching frequency in real time during operation.In other words, main control logic is executed 51(and above-mentioned subordinate logical module) controller 64 change the Operation switch frequency of S1~S8 during real-time operation.It is first First, the switching frequency of switch S1~S8 (that is,Or it is herein referred to as sometimes) and parameterIt determines together Instantaneous power.In addition, by as described aboveCarry out defined parameters.Therefore, such as under In the equation (4) in face, by instantaneous power andDetermine switching frequency:
In addition, it will be appreciated that ZVS realization can be with limit switch frequency.In this regard,WithParameter one It rises and the power of transfer has been determined.It is determined by ZVSParameter, and by need transfer power andParameter (or ZVS) determines switching frequency.In addition, power factor correcting (PFC) needs: being transferred to transformation from the primary side of transformer The power and input AC arc in phase of the primary side of device, pass through as described aboveWithWhat parameter determined together Like that.
Gate driving circuit.Fig. 6 A-6B is the electric current flowing respectively illustrated during connection process and turn off process The equivalent circuit diagram of the simplification of gate driving circuit.The fundamental mechanism of driving power switch is using corresponding driver capacitor For the input capacitance of switching deviceCharge or discharge (that is, as power source).
Fig. 6 A shows device for power switching 84, has grid 86 associated with it, drain electrode 88 and source electrode 90.Capacitor、AndIt is also shown as and is associated with device 84；However, these not individual components, the spy of device itself Property-it is partly due to its construction.It uses with the connection transistor of push-pull type (push-pull) arrangement connectionIt is brilliant with shutdown Body pipeGate driving circuit is modeled, the push-pull arrangement is controlled by gate drive signal 92.Fig. 6 A also shows electricity ContainerWith, the capacitorWithIt is charged by individual power source (not shown) and in gate driving mechanism In be utilized for grid input capacitance charging and discharging.Finally, Fig. 6 A show gate driving circuit output (that is,WithEmitter between common node) and the grid 86 of switching device 84 between the gate drive resistor that couples.Figure 6A shows the current path during turn off process with heavy line.As can be seen, which includes grid resistor, device, shutdown transistorAnd shutdown source.In addition to the diagram for the current path during connection process Except, which is substantially replicated in fig. 6b.As can be seen, which also includes grid resistorWith Device, the differ in that it alternatively includes connecting transistorAnd connect source.Due to different electric currents Path, there may be (one or more) different switching speed in theory, this in turn means that (one of gate driving loop Or multiple) different impedance.
Fig. 7 is the rough schematic view of embodiment according to this teaching.This embodiment offers changing for turning off and connecing By the flexibility in terms of the different loops of journey, this then has changed timing, switching speed etc..Provide a kind of device 100a is suitable for power switch application and including gate driving circuit 102a.Gate driving circuit 102a is configured as leading to Cross the connection resistor including arranging in the corresponding charging and discharging current path described above in conjunction with Fig. 6 A-6B With individual, the potential shutdown resistor with different valueOutput timing (speed is individually turned on and off to provide Degree).
With continued reference to Fig. 7, device 100a includes gate driving circuit 102a and broad-band gap (WBG) switching device 104a, institute The all GaN HEMT devices as mentioned above of broad-band gap (WBG) switching device 104a are stated (for example, may include for example coming from Under the trade names and/or dash number GS66516T of GaN Systems Corp., Ann Arbor, Michigan, USA The commercial parts of the enhancement mode GaN transistor of offer).
Gate driving circuit 102a includes the grid for being configured to respond to be applied to the input node of gate driving circuit Pole control signal 108 generates at least one gate driving output 106 of at least one corresponding gate drive signal on it (that is, be shown in FIG. 7, be designated as 1061With 1062Two).Gate driving circuit 102a can also include power source It is right, such as it is designated asWithCapacitor pair.It is this that individual circuit (not shown), which can be provided, A little gate drivers capacitors 110,112 charge.CapacitorWithIt is configured as the polarity according to diagram It provides and turns on and off voltage accordingly.
Switching device 104a includes grid 114, drain electrode 116 and source electrode 118, and wherein grid 114 is in the illustrated embodiment Pass through pair of gate drive resistor, that is, connect resistor 112(and be also designated as) and it is individual, potential with difference The shutdown resistor 112(of value is also designated as) it is electrically connected to gate driving circuit 102a.Drain electrode 116 and source electrode 118 can To be configured as being electrically coupled to the one or more external circuits for being for simplicity shown as load 124 in block diagram form (for example, one or more sources, one or more loads).It should be understood, however, that load 124 can be with as known in the art Various ways is coupled to device 100a comprising is integrated into the content being such as shown and described in conjunction with Fig. 1-Fig. 5 Etc power conversion device.
Gate driving circuit 102a may include push pull transistor circuit 126, the push pull transistor circuit 126 to It less include one to the centering with (ii) CMOS gate driving field effect transistor from (i) bipolar junction transistor (BJT) The connection transistor 128 of selectionWith shutdown transistor 130.In the illustrated embodiment, transistor 128 is connectedIt may include the bipolar junction transistor of NPN type, and turn off transistor 130It may include for example with transmitting The bipolar junction transistor of the PNP type of pole follower (emitter follower) arrangement electrical connection.Alternatively, crystal is connected Pipe 128It may include the transistor of NMOS type, and turn off transistor 130It may include the crystalline substance of PMOS type Body pipe.
In the illustrated embodiment, resistor 122 is connectedIt can have first resistor and be shown as being coupled in It connects between transistor 128 and grid 114, and turns off resistor 122It can have second resistance and be shown as It is coupled between shutdown transistor 130 and grid 114.The value of first resistor can be different from second resistance, so that switching device Connection (rising) time of 104a can be different from shutdown (whereabouts) time of switching device 104a.It should be noted that connection process Current path include Ron(but be not Roff),(being not shown in Fig. 7),With.It shall also be noted that turn off process Current path includes Roff(but be not Ron),(being not shown in Fig. 7),With.Above-mentioned arrangement, which provides, to be used (one or more) is turned on and off into speed control into different improved flexibilities.
However, when by the gate driving circuit of Fig. 7 with for example WBG switching device (for example, GaN HEMT) is applied in combination when, ON/OFF resistor 120,122 will be typically arranged (one or more) BJT transistor circuit and GaN HEMT it Between, this typically can separate from GaN HEMT or increase the physical separation (physical separation) of BJT circuit.It is right In conventional transwitch, such separation will not usually influence switch performance.However, for the very fast of such as GaN HEMT etc Fast switching device, it is expected that gate driving loop is retracted to possible utmostly (for example, utmostly being reduced with possible Gate driving loop inductance).
Fig. 8 A-8B is to turn on and off to show above-mentioned flexibility in speed accordingly in setting, but in addition open power It closes device 104 and gate driving circuit 12 is integrated to reduce gate driving loop, thus reduce gate driving loop inductance The rough schematic view of other embodiments.
Fig. 8 A shows the device 100b identical with the device 100a of Fig. 7 other than as described below.Make in Fig. 8 A With the similar appended drawing reference being such as employed in Fig. 7, but it has been attached to suffix " b " rather than suffix " a ".Fig. 8 A shows GaN switching device 104b is gone out, the GaN switching device 104b can be identical as described in above figure 7 and additionally shows Go out and the associated capacitor of device 104b itself、And；However, these not individual components, device The characteristic-of itself is partially due to it is constructed.In addition, turning on and off transistor is shown as BJT device 128b, 130b, Middle device 128b is that the BJT and device 130b of NPN type are the BJT of PNP type.
It is provided between the grid 114 of the output node 106b and GaN device 104b of gate driving circuit 102b single Gate drive resistor 132.Provide each connection resistor 134 with corresponding first and second resistance valueWith Individually shutdown resistor 136.Connect resistor 134It is disposed in the collector and grid for connecting transistor 128b Between the positive terminal of driver capacitor (power source) 110.Turn off resistor 136It is disposed in shutdown transistor Between the collector of 130b and the negative terminal of driver capacitor (power source) 112.It should be appreciated that just as in fig. 7, connecting The current path of process includes Ron(but be not Roff), Rg、(being not shown in Fig. 7),With.It shall also be noted that closing The current path of disconnected process includes Roff(but be not Ron), Rg、(being not shown in Fig. 7),With.Above-mentioned arrangement provides It can be employed and (one or more) is turned on and off into speed control into different improved flexibilities.
However, being different from the embodiment of Fig. 7, transistor 128b, 130b, switching device 104b and grid are turned on and off Drive resistor 132It is all integrated within only for example identical integrated circuit (IC), this can be by least needing Electrical interconnection distance reduction come reduce gate driving loop inductance significantly.In other words, the embodiment of Fig. 8 A is by Qon、Qoff、 RgAnd GaN HEMT integrates to realize the IC on chip, has shunk gate driving loop inductance significantly.
It should be appreciated that integrated circuit/encapsulation outside can be placed on by turning on and off resistor 134,136, with from And allow desired value of the system designer selection for resistor 134,136, to adjust (one as described above It is a or multiple) switching speed.The effect realized in this embodiment is similar with Fig. 7；However, the embodiment of Fig. 8 A realize it is higher The horizontal system integration.
In addition to the transistor of the CMOS gate driving type of such as field effect transistor of NMOS and PMOS type etc Except the use respectively of 128c, 130c, Fig. 8 B is identical as Fig. 8 A.In the context of the embodiment of Fig. 8 B, in addition to including subsidiary Suffix " c " rather than such as the attached drawing mark except those of subsidiary suffix " b " in Fig. 8 A appended drawing reference, in appended drawing reference and Fig. 8 A Remember identical.
Fig. 9 is the schematic diagram and diagrammatic view according to the device 100d of other embodiments.Device 100d can be in addition to as follows It is identical as device 100b and 100c except described.In this regard, the connection transistor 128d of device 100d, shutdown Transistor 130d(), switching device 104d(is for example, GaN HEMT) and gate drive resistor 138 be formed on half It is integrated on conductor tube core or substrate 140 and together in integrated circuit/encapsulation.As device 100b, 100c, Ke Yifen It Shi Yong not the (i) bipolar junction transistor of such as NPN BJT and PNP BJT etc or (ii) such as NMOS FET and PMOS FET Etc CMOS gate driving field effect transistor in one come realize connect transistor 128d and shutdown transistor 130d.And And it is shown that gate drive resistor 138 can be arranged, thus by the emitter of the connection of transistor 128d, 130d It is directly electrically connected to the grid 114 of switching device 104d.This arrangement reduces connection distance and also reduces and/or eliminate Metal connection amount therebetween, to reduce the inductance of gate driving loop.Fig. 9, which is additionally illustrated, to be illustrated as being applied to crystalline substance The commonly connected base terminal of body pipe 128d, 130d (for example, generated by 46-Fig. 2 of controller) such as pulse width tune Make the grid control signal 142 of (PWM) signal etc.This will be
Figure 10-Figure 11 is to show grid control signal and gained grid to source signalTiming diagram.Particularly, scheme 10 show including at least off state 144 and the grid control signal of on-state 146 142.In embodiment, on-state 146 when being identified, is configured as connecting the target switch of such as switching device 104d, and off state 144 is when being identified, It is configured to shutdown target switch 104d on the contrary.As shown in Figure 9, grid control signal 142 is applied to gate driving electricity The input of road 26d.
Figure 11 is aligned with Figure 10 along the time axis and shows gained switching device grid to source voltage.In grid The time and device input capacitance that pole control signal 142 is identifiedCharging start time between there are time delays 148.The delay can be at least partially attributed to connect transistor and conduct the lag before starting.Hereafter, grid arrives Source voltageIt is corresponding to the passWithFor input capacitanceThe period 150 of the time it takes that charges On experienced voltage rising.When grid control signal 142 is released from identification, there is also be at least partially attributed to for connecting Transistor 128d is to shutdown and turns off transistor 130d to the delay 152 for connecting and starting the time discharged.Hereafter, There are the periods 154, whereinIt is fallen on from the high level for being sufficient to make switching device 104d to conduct and is enough to turn off derailing switch The level of the reduction of part 104d.Period 154 corresponds to the passByWithIt willThe time of electric discharge.It should manage Solution, in the case where WBG switching device especially GaN HEMT device,NegativeGrid to source voltage can be preferably, with Just cutting (shut off) switch.Thus, for example, as shown in Figure 9, using negative polarity source 112(for example, capacitor) not only willElectric discharge, and preferably willNegative (negatively) charging, so thatBecome negative, so that it is guaranteed that GaN HEMT Reliable (solid) of device is cut off.
In embodiment, only for example,It can be 10 ohm,Can be 1 ohm andIt can be 1 ohm. It should be understood, however, that the advantage of this introduction is flexibility, and、WithActual value can depend on appoint Timing/speed objection (objection) of what specific application and change significantly.
With this instruct consistent embodiment realize reduce gate driving loop inductance integrated gate driving circuit and Such as device for power switching of WBG switching device (for example, GaN HEMT) etc.It includes at least reducing switching device grid that this, which has, Multiple benefits of ring in the terminal of pole.This will reduce gate loop inductance, and at the same time allowing user by freely changing RonAnd RoffValue adjusts switching speed, especially for the GaN device very sensitive for external loop-around inductance.Therefore, and originally Consistent embodiment is instructed for example to switch by allowing individually to turn on and off speed to provide in adjustment (one or more) Improved flexibility in speed.
It is understood that electronic control unit may include being able to carry out to be stored in associated storage as described in this article The conventional processing device as known in the art of preprogrammed instruction in device, all execution are according to functions described in this article. Degree in software is embodied as with regard to method described herein, obtained software can be stored in associated memory simultaneously And device for executing such method can also be constituted.In view of enabled description above, certain being completed so in software The realization of a little embodiments will need to be no more than is applied by the routine (routine) of the programming skill of those skilled in the art. This electronic control unit can also be the group with both ROM, RAM, non-volatile and volatibility (revisable) memory The type of conjunction stores any software and also allows the data of dynamic generation and/or the storage and processing of signal.
Although only some embodiments are described above with a degree of particularity, the technology in this field Personnel can make many changes to disclosed embodiment without departing from the scope of the disclosure.Be intended that: by comprising All things being shown in the above description or in the accompanying drawings should be construed as merely illustrative and not restrictive. The change of details or structure can be made in the case where not departing from the present invention as limited in appended claims.
It claims and all or part of any patent, publication or other public materials herein is incorporated in by reference Only be incorporated in this to combined material not with recorded in the disclosure existing definition, statement or other public materials it is conflicting Degree.In this way, and arrive necessary degree, the disclosure being such as expressly recited herein is incorporated into this instead of by reference Any conflict material in text.Claim by quote be incorporated in herein but with recorded in the disclosure existing definition, sound Bright or conflicting any material of other public materials or part thereof will be only integrated into combined material and existing disclosure Do not occur the degree to conflict between material.
Although one or more specific embodiments have been shown and described, those of skill in the art will be managed Solution, can make various changes and modifications in the case where not departing from the spirit and scope of this introduction.

Claims (20)

1. a kind of device, comprising:
Gate driving circuit has and is configured to respond to the grid control signal in its input in gate driving output Generate at least one described gate driving output of gate drive signal；
Broad-band gap (WBG) switching device, with grid, drain electrode and source electrode, wherein the grid of the WBG switching device is logical It crosses gate drive resistor and is electrically connected to the gate driving circuit, the drain electrode and the source electrode are configured as being electrically coupled to negative It carries；
Wherein, the gate driving circuit includes push pull transistor circuit, and the push pull transistor circuit includes from (i) double Pole junction transistor (BJT) to (ii) CMOS gate driving field effect transistor to one of selection at least switched on crystal Pipe and shutdown transistor, the gate driving circuit further include be coupled to it is described connect transistor, it is with first resistor It connects resistor and is coupled to the shutdown transistor, shutdown resistor with second resistance.
2. the apparatus according to claim 1, wherein the connection transistor and the shutdown transistor respectively include NPN crystalline substance Body pipe and PNP transistor, with NPN transistor described in emitter follower deployment arrangements and the PNP transistor, wherein described First emitter of NPN transistor is connected to the PNP transistor at the common node for limiting the gate driving output Second emitter.
3. the apparatus of claim 2, wherein common node is connected directly to the gate drive resistor.
4. device according to claim 3, wherein the gate drive resistor is connected directly to the WBG derailing switch The grid of part.
5. the apparatus of claim 2, wherein the collector connected resistor and be connected electrically in the NPN transistor Between terminal and power source.
6. device according to claim 5, wherein the power source includes positive polarity power source.
7. the apparatus of claim 2, wherein the shutdown resistor is connected electrically in the collector of the PNP transistor Between terminal and power source.
8. device according to claim 7, wherein the power source includes negative polarity power source.
9. the apparatus of claim 2, wherein the respective gates terminal of the NPN transistor and the PNP transistor It is connected electrically at input node, the input node applies the gate driving circuit on it to the grid control signal Input is defined.
10. the apparatus according to claim 1, wherein the WBG switching device includes high electron mobility transistor (HEMT).
11. device according to claim 10, wherein the HEMT includes GaN high electron mobility transistor (HEMT) device Part.
12. the apparatus according to claim 1, wherein the connection transistor, the shutdown transistor, the gate driving Resistor and the WBG switching device are formed on public substrate.
13. device according to claim 12, wherein the connection resistor and the shutdown resistor are not disposed in On the public substrate.
14. device according to claim 12, wherein the public substrate is disposed in integrated antenna package.
15. the apparatus according to claim 1, wherein the grid control signal includes pulse width modulation (PWM) signal.
16. the apparatus according to claim 1, wherein the connection transistor and the shutdown transistor respectively include NMOS And pmos fet.
17. the apparatus according to claim 1 further includes electronic control unit, the electronic control unit is configured as root The gate driving circuit is controlled according to zero voltage switch (ZVS) strategy.
18. device according to claim 17, wherein the electronic control unit is configured as working as the gate driving The gate driving circuit is controlled according to the ZVS strategy when signal is converted to the on-state from the off state.
19. the apparatus according to claim 1, wherein being opened in bridge circuit using the gate driving circuit and the WBG Close device.
20. the apparatus according to claim 1, wherein the first resistor is different from the second resistance, so that the WBG The closing speed of switching device is different from the turn-off speed of the WBG switching device.
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US9748949B1 (en) 2017-08-29
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DE112017003652T5 (en) 2019-04-04
WO2018015924A2 (en) 2018-01-25

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