CN109690502A - 使用硬件控制的分离监听目录的相干互连功率降低 - Google Patents

使用硬件控制的分离监听目录的相干互连功率降低 Download PDF

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Publication number
CN109690502A
CN109690502A CN201780054611.6A CN201780054611A CN109690502A CN 109690502 A CN109690502 A CN 109690502A CN 201780054611 A CN201780054611 A CN 201780054611A CN 109690502 A CN109690502 A CN 109690502A
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China
Prior art keywords
catalogue
separation
processor
state
power
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Pending
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CN201780054611.6A
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English (en)
Chinese (zh)
Inventor
C·阿瓦尼
L·蒙特佩吕
P·布卡尔
R·K·古普塔
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Qualcomm Inc
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Qualcomm Inc
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Publication of CN109690502A publication Critical patent/CN109690502A/zh
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3296—Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G06F12/0833—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means in combination with broadcast means (e.g. for invalidation or updating)
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1028—Power efficiency
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Power Sources (AREA)
CN201780054611.6A 2016-09-08 2017-09-07 使用硬件控制的分离监听目录的相干互连功率降低 Pending CN109690502A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/259,697 US10606339B2 (en) 2016-09-08 2016-09-08 Coherent interconnect power reduction using hardware controlled split snoop directories
US15/259,697 2016-09-08
PCT/US2017/050450 WO2018049010A1 (en) 2016-09-08 2017-09-07 Coherent interconnect power reduction using hardware controlled split snoop directories

Publications (1)

Publication Number Publication Date
CN109690502A true CN109690502A (zh) 2019-04-26

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Family Applications (1)

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CN201780054611.6A Pending CN109690502A (zh) 2016-09-08 2017-09-07 使用硬件控制的分离监听目录的相干互连功率降低

Country Status (7)

Country Link
US (1) US10606339B2 (enExample)
EP (1) EP3510487B1 (enExample)
JP (1) JP6748298B2 (enExample)
KR (1) KR102132571B1 (enExample)
CN (1) CN109690502A (enExample)
BR (1) BR112019004001A8 (enExample)
WO (1) WO2018049010A1 (enExample)

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JP6772007B2 (ja) * 2016-09-12 2020-10-21 キヤノン株式会社 情報処理装置及びその制御方法、コンピュータプログラム
KR102659679B1 (ko) 2019-04-22 2024-04-19 주식회사 엘지에너지솔루션 배터리의 미분 전압 커브를 결정하기 위한 장치 및 방법과, 상기 장치를 포함하는 배터리 팩
US11354239B2 (en) * 2020-09-18 2022-06-07 Microsoft Technology Licensing, Llc Maintaining domain coherence states including domain state no-owned (DSN) in processor-based devices
US11703932B2 (en) * 2021-06-24 2023-07-18 Advanced Micro Devices, Inc. Demand based probe filter initialization after low power state
KR102864772B1 (ko) * 2022-11-21 2025-09-24 연세대학교 산학협력단 근접 데이터 처리를 이용한 이종 멀티 코어 프로세서 및 시스템
US20240219988A1 (en) * 2023-01-03 2024-07-04 Advanced Micro Devices, Inc. Chiplet interconnect power state management
US20250093937A1 (en) * 2023-09-14 2025-03-20 Apple Inc. Multi-Processor Power Management Circuit
CN117931529B (zh) * 2024-03-21 2024-08-27 上海励驰半导体有限公司 启动管理方法和设备、电子设备及存储介质
US20250307146A1 (en) * 2024-03-28 2025-10-02 Intel Corporation Coherent cache fabric with reduced power mode
US20250307153A1 (en) * 2024-03-29 2025-10-02 Intel Corporation Apparatus and Method for Performance and Energy Efficient Compute

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CN103119571A (zh) * 2010-09-25 2013-05-22 英特尔公司 用于竞争激烈的高速缓存行的无缝区域高效目录高速缓存的分配和写策略
US20140189411A1 (en) * 2013-01-03 2014-07-03 Apple Inc. Power control for cache structures
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CN103119571A (zh) * 2010-09-25 2013-05-22 英特尔公司 用于竞争激烈的高速缓存行的无缝区域高效目录高速缓存的分配和写策略
CN102567255A (zh) * 2010-10-29 2012-07-11 飞思卡尔半导体公司 具有监听请求选择性无效的数据处理系统和用于其的方法
CN104756090A (zh) * 2012-11-27 2015-07-01 英特尔公司 提供扩展的缓存替换状态信息
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CN105701030A (zh) * 2014-12-14 2016-06-22 上海兆芯集成电路有限公司 根据卷标比特的动态高速缓存置换路选择
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Also Published As

Publication number Publication date
EP3510487A1 (en) 2019-07-17
EP3510487B1 (en) 2023-02-22
BR112019004001A2 (pt) 2019-05-28
BR112019004001A8 (pt) 2023-02-14
KR102132571B1 (ko) 2020-07-09
JP2019534501A (ja) 2019-11-28
WO2018049010A1 (en) 2018-03-15
US10606339B2 (en) 2020-03-31
KR20190046840A (ko) 2019-05-07
JP6748298B2 (ja) 2020-08-26
US20180067542A1 (en) 2018-03-08

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