CN109685190B - Power-down protection method and device for IC card - Google Patents

Power-down protection method and device for IC card Download PDF

Info

Publication number
CN109685190B
CN109685190B CN201811621864.XA CN201811621864A CN109685190B CN 109685190 B CN109685190 B CN 109685190B CN 201811621864 A CN201811621864 A CN 201811621864A CN 109685190 B CN109685190 B CN 109685190B
Authority
CN
China
Prior art keywords
data
backup
original
area
storage address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201811621864.XA
Other languages
Chinese (zh)
Other versions
CN109685190A (en
Inventor
杨华威
曹炜
陆道如
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangsu Hengbao Intelligent System Technology Co Ltd
Original Assignee
Jiangsu Hengbao Intelligent System Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Hengbao Intelligent System Technology Co Ltd filed Critical Jiangsu Hengbao Intelligent System Technology Co Ltd
Priority to CN201811621864.XA priority Critical patent/CN109685190B/en
Publication of CN109685190A publication Critical patent/CN109685190A/en
Application granted granted Critical
Publication of CN109685190B publication Critical patent/CN109685190B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309Means for preventing undesired reading or writing from or onto record carriers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077Constructional details, e.g. mounting of circuits in the carrier

Abstract

The application provides a power-down protection method and a power-down protection device for an IC card, wherein the method is applied to a microprocessor in the IC card; the method comprises the following steps: after receiving a service request sent by terminal equipment, acquiring a plurality of storage addresses corresponding to data identifiers in the service request; reading original data corresponding to a plurality of storage addresses from a data area of a memory; selecting a storage address to be processed from the plurality of storage addresses, and writing page information of a storage page where the storage address to be processed is located into a pulling-proof area in the backup area; if the microprocessor is powered off when responding to any original data corresponding to the memory address to be processed, after the microprocessor is powered on again, the microprocessor covers page information of a memory page where the original data is located in the data area based on page information corresponding to the original data in the anti-pulling area. According to the embodiment of the application, the anti-pulling area is divided in the memory of the IC card, so that the effect of preventing data loss in the updating process is achieved.

Description

Power-down protection method and device for IC card
Technical Field
The application relates to the technical field of integrated circuit cards, in particular to a power-down protection method and device for an IC card.
Background
An IC card is a card having a chip as a medium. The chip card has large capacity, can store various information such as a secret key, a digital certificate, a fingerprint and the like, has a working principle similar to a microcomputer, can simultaneously process various functions, and provides convenience for multiple purposes of one card for a card holder.
At present, the most basic IC card is a contact IC card, which is an integrated circuit chip, and the general structure includes a nonvolatile memory, a protection logic circuit, and a microprocessor CPU. The memory of the IC card is divided into EEPROM, ROM and Flash, Flash is selected as the storage medium (also called Flash memory) by more and more IC card chips at present, because the Flash memory can keep the stored information for a long time under the condition of not connecting with electricity, the Flash memory not only has the characteristics of ROM, but also has high storage speed, is easy to erase and rewrite and has the characteristics of small power consumption; compared with EEPROM, the Flash memory has low cost and high density.
Although Flash memories have many advantages, the problem of power loss during erasing still exists. When data in a target area of a Flash memory needs to be updated, the data in the target area needs to be erased and written, and because the minimum unit of erasing of the Flash memory is one page, if power is lost in the updating process, the data in the whole page is lost, so that in the updating process, not only a plurality of bytes to be updated are protected, but also the whole page needs to be protected. Therefore, the power-off protection of the Flash memory is particularly important.
Content of application
In view of this, embodiments of the present application provide a power-down protection method and device for an IC card, so as to reduce the probability of data loss of a whole page due to power failure in the use process of the IC card.
In a first aspect, an embodiment of the present application provides a power-down protection method for an IC card, where the power-down protection method is applied to a microprocessor in the IC card, the IC card further includes a memory connected to the microprocessor, and the memory includes a data area and a backup area; the method comprises the following steps:
after receiving a service request sent by terminal equipment, acquiring a plurality of storage addresses corresponding to data identifiers in the service request; reading original data corresponding to the plurality of storage addresses from a data area of the memory;
selecting a storage address to be processed from a plurality of storage addresses, and writing page information of a storage page where the storage address to be processed is located into a pulling-proof area in the backup area; the page information comprises page data;
if the microprocessor is powered off when responding to any original data corresponding to the to-be-processed storage address, after the microprocessor is powered on again, the microprocessor covers page information of a storage page where the original data is located in the data area based on the page information corresponding to the original data in the anti-pulling area.
With reference to the first aspect, an embodiment of the present application provides a first possible implementation manner of the first aspect, where after the original data corresponding to the plurality of storage addresses is read from the data area of the memory, the method further includes:
writing each storage address and the original data corresponding to each storage address, and the original associated data corresponding to each original data and the storage address of the original associated data into a backup stack of the backup area;
if the microprocessor loses power when responding to any original data corresponding to the to-be-processed memory address, after the microprocessor is powered on again and page information corresponding to the original data in the anti-pulling area covers the page information of the memory page where the original data is located in the data area, the method further comprises the following steps:
acquiring original associated data corresponding to the original data and a storage address corresponding to the original associated data from a backup stack of the backup area;
and covering the current associated data corresponding to the storage address acquired in the data area by using the acquired original associated data.
With reference to the first aspect, an embodiment of the present application provides a second possible implementation manner of the first aspect, where after the selecting a to-be-processed storage address from a plurality of storage addresses, and writing page information of a storage page where the to-be-processed storage address is located in an anti-pulling area in the backup area, the method further includes:
setting effective identification for the page information of the memory page where the to-be-processed memory address stored in the anti-pulling area is located;
and when the microprocessor does not power down in response to the original data corresponding to the to-be-processed storage address, setting a failure identifier for the page information of the storage page where the to-be-processed storage address is stored in the anti-pulling area.
With reference to the second possible implementation manner of the first aspect, an embodiment of the present application provides a third possible implementation manner of the first aspect, where if a power failure occurs to a microprocessor in response to original data corresponding to any to-be-processed storage address, after the microprocessor is powered on again, the method further includes:
when the microprocessor detects that the page information of the storage page where the to-be-processed storage address is located in the anti-pulling area has no invalid identifier, detecting whether the effective identifier corresponding to the page information is complete, and when the microprocessor detects that the effective identifier corresponding to the page information is complete, covering the page information of the storage page where the original data is located in the data area by the microprocessor based on the page information corresponding to the original data in the anti-pulling area.
With reference to the first possible implementation manner of the first aspect, an embodiment of the present application provides a fourth possible implementation manner of the first aspect, where original data corresponding to each storage address and each storage address, and original associated data corresponding to each original data and the storage address of the original associated data are both written into a backup stack of the backup area, and the method includes:
writing each storage address and the original data corresponding to each storage address into a backup stack of the backup area;
the microprocessor allocates a first check identifier for each storage address in the backup stack and the original data corresponding to each storage address, generates a first backup record, and stores the first check identifier;
writing the original associated data corresponding to each target data and the storage address of the original associated data into a backup stack of the backup area;
and the microprocessor allocates a second check identifier for the original associated data corresponding to each original data in the backup stack and the storage address of the original associated data, generates a second backup record, and stores the second check identifier.
With reference to the fourth possible implementation manner of the first aspect, an embodiment of the present application provides a fifth possible implementation manner of the first aspect, where if a power failure occurs in a microprocessor when responding to any original data corresponding to a to-be-processed storage address, and after the microprocessor is powered on again, the microprocessor covers page information of a storage page in the data area where the original data is located based on page information corresponding to the original data in the anti-unplugging area, the method further includes:
the microprocessor checks the first check identifier in the first backup record, and when the check is passed, the microprocessor checks the second check identifier in the second backup record;
after the verification is passed, acquiring original associated data in the second backup record corresponding to the original data and a storage address corresponding to the original associated data from a backup stack of the backup area;
covering the current associated data corresponding to the storage address acquired in the data area by using the acquired original associated data;
acquiring the original data in the first backup record and the storage address of the original data from the backup stack of the backup area;
and covering the current data corresponding to the storage address acquired in the data area by using the acquired original data.
With reference to the first possible implementation manner of the first aspect, an embodiment of the present application provides a sixth possible implementation manner of the first aspect, where a backup stack of the backup area includes a plurality of backup blocks, and the method further includes:
selecting a target starting storage block in the plurality of backup blocks;
the microprocessor writes a current storage address to be processed and original data corresponding to the current storage address to be processed, and original associated data corresponding to the original data and a storage address of the original associated data into the target initial storage block;
and when the usage times of the target initial storage blocks are monitored to reach a preset threshold value, selecting backup blocks except the target initial storage blocks from the plurality of backup blocks as next target initial storage blocks according to a preset sequence.
With reference to the sixth possible implementation manner of the first aspect, an embodiment of the present application provides a seventh possible implementation manner of the first aspect, where after selecting a backup block other than the target starting storage block from the multiple backup blocks as a next target starting storage block, the method further includes:
when the microprocessor monitors that no optional backup block exists in the backup stack, a target initial storage block is selected from the backup blocks again, and the process of writing the current storage address to be processed and the original data corresponding to the current storage address to be processed, and the original associated data corresponding to the original data and the storage address of the original associated data into the target initial storage block is repeated until the use times of the backup stack reach a preset threshold value.
With reference to the sixth possible implementation manner of the first aspect, an embodiment of the present application provides an eighth possible implementation manner of the first aspect, where the method further includes:
if the plurality of backup blocks are not monitored to be in the storage range of the backup stack, resetting a target starting backup block of the backup blocks so as to enable the plurality of backup blocks to be in the storage range of the backup stack.
In a second aspect, an embodiment of the present application further provides an IC card power-down protection device, where the device includes a microprocessor, a memory connected to the microprocessor, and the memory further includes a data area and a backup area;
the microprocessor is used for acquiring a plurality of storage addresses corresponding to the data identification in the service request after receiving the service request sent by the terminal equipment; reading original data corresponding to the plurality of storage addresses from a data area of the memory; selecting a storage address to be processed from a plurality of storage addresses, and writing page information of a storage page where the storage address to be processed is located into a pulling-proof area in the backup area; the page information comprises page data;
if the microprocessor is powered off when responding to any original data corresponding to the to-be-processed storage address, after the microprocessor is powered on again, the microprocessor covers page information of a storage page where the original data is located in the data area based on the page information corresponding to the original data in the anti-pulling area.
According to the power-down protection method and device for the IC card, the anti-pulling area is divided in the memory of the IC card, when the IC card is powered down in the using process and powered up again, the microprocessor in the IC card controls the anti-pulling area to recover all data of the storage page where the current operation data is located, the problem that the whole page of data of the storage page where the current operation data is located is lost when the IC card is powered down in the prior art is solved, and the effect of preventing data loss in the updating process is achieved.
Further, according to the power-down protection method and device for the IC card provided by the embodiment of the present invention, the backup stack is further divided in the memory of the IC card, and when the power is lost during the use of the IC card and the power is re-turned on, the microprocessor in the IC card controls the backup stack to restore the data associated with the current operation data, so that the effect of keeping consistency before and after data update during the update process is achieved.
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, preferred embodiments accompanied with figures are described in detail below.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
Fig. 1 shows a schematic flowchart of a power-down protection method for an IC card according to an embodiment of the present application;
FIG. 2 is a schematic flow chart illustrating another power-down protection method for an IC card according to an embodiment of the present disclosure;
FIG. 3 is a schematic flow chart illustrating another power-down protection method for an IC card according to an embodiment of the present disclosure;
fig. 4 shows a schematic structural diagram of an IC card power-down protection device provided in an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.
Fig. 1 is a schematic flow chart of a power-down protection method for an IC card according to an embodiment of the present disclosure, where as shown in fig. 1, the method is applied to a microprocessor in the IC card, the IC card further includes a memory connected to the microprocessor, and the memory includes a data area and a backup area; the method comprises the following steps:
s101, after receiving a service request sent by terminal equipment, acquiring a plurality of storage addresses corresponding to data identifiers in the service request; reading original data corresponding to the plurality of storage addresses from a data area of the memory;
the above-described IC cards can be classified into contact and noncontact cards (i.e., supporting both contact and noncontact operation modes), contact cards (i.e., supporting only contact operation use), and noncontact cards (i.e., supporting only noncontact operation use).
The structure of the above IC card generally includes: microprocessor, memory connected to microprocessor and protection logic circuit. The memory is a Flash memory (i.e., a Flash memory). Take financial IC card as an example: the memory comprises a data area and a backup area, and is used for storing the data information of the IC card; the data information is generally stored in the data area and includes user information (user name, user telephone number and user identification number), amount information, transaction flow information, and the like. The backup area comprises a backup stack and a pull-out prevention area and is used for storing original data information of the current processing data so as to backup the current processing information.
The terminal device is a device responding to the IC card (for example, if the IC card is a financial IC card, the terminal device is an ATM).
The service request is a request with corresponding execution operation input by a user and is used for requesting the content in the IC card and enabling the IC card to complete the corresponding operation. The service request comprises a data identifier of data which a user wants to operate; the data identifier is used to distinguish different data in a service request.
For example: the IC card is a financial IC card, a user inserts the IC card into an ATM, the ATM reads information of the IC card, an input password instruction is displayed on an interface to prompt the user to input a password of the IC card, after the user inputs the password, the ATM compares the read password stored in a memory of the IC card with the obtained password input by the user, after the comparison is consistent, the ATM displays an interface for carrying out next operation (the operation interface generally comprises corresponding operation selection keys such as deposit, withdrawal, transfer and card withdrawal), when the user presses a 'withdrawal' key, the ATM inputs a withdrawal amount, the AIM sends the withdrawal service request to the IC card (the withdrawal service request in the IC card comprises withdrawal operation which the user wants to carry out on the IC card, the amount of the withdrawal operation which the user wants to carry out and some bottom layer data related to the completion of the withdrawal operation), and a microprocessor of the IC card is used for distinguishing the withdrawal service request according to data identification (the data identification in the withdrawal service request is used for distinguishing the withdrawal amount Operation, amount information and some underlying data involved in completing the withdrawal operation) to obtain corresponding original data in the multiple storage addresses in the data area of the IC card.
S103, selecting a storage address to be processed from the plurality of storage addresses, and writing page information of a storage page where the storage address to be processed is located into a pulling-proof area in the backup area; the page information comprises page data;
the plurality of memory addresses are memory addresses for all data involved in an operation that a user wants to realize. For example: when a user wants to withdraw money from the IC card, money amount information, transaction flow record information and some bottom data are involved if the user wants to realize the withdrawal operation.
The memory address to be processed is the memory address where the data to be processed is located. For example: if the operation of withdrawing money from the IC card by the user is realized, the data in the withdrawal service request need to be processed one by one, and the storage address of the data needing to be processed at the current moment is the storage address to be processed.
Since the Flash memory of the IC card is erased as a whole page, the page information of the whole page corresponding to the to-be-processed storage address needs to be written into the anti-pulling area of the backup area, and the page information generally includes the data of the whole page, the address of the page, the valid flag and the check byte, and the invalid flag and the check byte.
For example: in the process of operating the financial IC card by a user, after the IC card receives a withdrawal service request, corresponding amount data needs to be modified, and since the minimum unit of the Flash memory of the IC card which is erased is one page, before the modified amount data is written into the IC card, the whole page of data of the page where the storage address of the currently operated amount data is located is stored in the anti-pulling area of the Flash memory of the IC card according to the storage address of the currently operated amount data, and then the microprocessor of the IC card erases the page where the amount data is located in the data area and writes the modified amount data.
And S104, if the microprocessor loses power when responding to any original data corresponding to the storage address to be processed, after the microprocessor is powered on again, the microprocessor covers the page information of the storage page where the original data is located in the data area based on the page information corresponding to the original data in the anti-pulling area.
The power failure generally means that an internal circuit of the IC card cannot be connected, and a microprocessor of the IC card is in an inoperable state.
The above-mentioned re-power-up generally means that the internal circuit of the IC card is connected and the microprocessor of the IC card is in a working state.
For example: when a user withdraws a money from a financial IC card inserted in an ATM, the corresponding amount data needs to be modified after the IC card receives a money withdrawal service request, because the minimum unit erased by an IC card Flash memory is one page, before the modified amount data is written into the IC card, the whole page data of the page where the storage address of the currently operated amount data is located is stored in the anti-pulling area of the IC card Flash memory according to the storage address of the currently operated amount data, then the microprocessor of the IC card erases the page where the amount data is located in the data area, the modified amount data is written, when the writing operation is not completed in the writing process, the user pulls out the financial IC card, the IC card is powered off, when the user inserts the IC card again, the microprocessor of the IC card can read the original whole page data of the page where the storage address of the currently operated amount data is located, stored in the anti-pulling area, and rewriting the original whole page of data into the currently erased page of the data area.
According to the power-down protection method for the IC card, the mode of dividing the anti-pulling area into the Flash memory of the IC card is adopted, in the process of operating the IC card by a user, the microprocessor of the IC card firstly writes the whole page of original data information of the page where the currently operated data is located into the anti-pulling area, then the whole page of the currently operated data is erased and the modified data is written, if the power failure occurs in the process of updating the currently operated data of the IC card, the whole page of the original data of the erased page is recovered after the IC card is powered on again through the mode of storing the whole page of the page where the currently operated data is located in the anti-pulling area, and the loss of the whole page of data in the process of updating the data of the IC card is avoided.
Further, in the power down protection method for an IC card provided in this embodiment of the present application, after the original data corresponding to the plurality of storage addresses is read from the data area of the memory, the method further includes:
s102, writing each storage address and the original data corresponding to each storage address, and the original associated data corresponding to each original data and the storage address of the original associated data into a backup stack of the backup area;
the original associated data is related data which needs to be updated correspondingly in the process of operating the original data. I.e. the data that needs to be involved in the process of updating the original data, where the original associated data is 0, 1 or more.
For example: the user carries out the withdrawal operation on the IC card, the AIM sends the withdrawal service request to the IC card (the withdrawal service request comprises the withdrawal operation which the user wants to carry out on the IC card, the amount of money which the user wants to carry out the withdrawal operation and some bottom data related to the completion of the withdrawal operation), the storage addresses of a plurality of data in the withdrawal service request and the original data in the storage addresses, and the storage address of the data related to each original data and the original related data in the storage address (such as the storage address of the amount data and the original amount data in the storage address, the storage address of the data related to the modified amount data and the original related data in the storage address) are written into the backup stack of the backup area, so that the consistency of all data involved in the withdrawal operation is maintained after the IC card is powered down and powered up again in the operation process.
If the microprocessor loses power when responding to any original data corresponding to the to-be-processed memory address, after the microprocessor is powered on again and page information corresponding to the original data in the anti-pulling area covers the page information of the memory page where the original data is located in the data area, the method further comprises the following steps:
s105, acquiring original associated data corresponding to the original data and a storage address corresponding to the original associated data from a backup stack of the backup area;
when the microprocessor is powered off and powered on again when responding to any original data corresponding to the storage address to be processed, the microprocessor of the IC card firstly restores the page where the erased storage address to be processed is located according to the whole page of original data of the interface where the storage address to be processed is stored in the anti-pulling area, and then obtains the original associated data of the original data and the storage address corresponding to the original associated data according to the original data corresponding to the storage address to be processed stored in the backup stack.
And S106, covering the current associated data corresponding to the storage address acquired in the data area by using the acquired original associated data.
For example: when a user withdraws a financial IC card inserted in an ATM, firstly, the storage addresses of a plurality of data in a withdrawal service request and the original data in the storage addresses, and the storage addresses of the data related to each original data and the original related data in the storage addresses (such as the storage addresses of the amount data and the original amount data in the storage addresses, the storage addresses of the data related to the modified amount data and the original related data in the storage addresses) are written into a standby stack of a standby area, if the amount data are modified at the moment, the whole page data of the page where the storage address of the amount data operated at present is located is stored in a pulling-out prevention area of a Flash memory of the IC card according to the storage address of the amount data operated at present, a microprocessor of the IC card erases the page where the amount data in the data area, and then writes the modified amount data, when the writing operation is not finished in the writing process, the user pulls out the financial IC card, the IC card is powered off at the moment, when the user inserts the IC card again, a microprocessor of the IC card reads original whole page data of a page where a storage address of currently operated amount data stored in the pulling-out prevention area is located, the original whole page data is rewritten into a page where the data area is erased currently, then original associated data (namely other associated data involved in the amount modification process) of the original data and storage addresses (namely storage addresses where other associated data involved in the amount modification process are located) corresponding to the original data (namely amount data) according to a to-be-processed storage address (namely storage address where the amount data is located) stored in a backup stack are obtained, and the current associated data in the storage address where the original associated data are located in the data area is covered according to the obtained original associated data, therefore, after the IC is powered off and powered on again in the updating process, the consistency of the current updating data and the data associated with the current updating data is kept, if the current updating data is the updated value, the data associated with the current updating data are the updated value, and if the current updating data is the value before updating, the data associated with the current updating data are the value before updating.
According to the power-down protection method for the IC card, through the mode of dividing the backup stack into the Flash memory of the IC card, in the process of operating the IC card by a user, the microprocessor of the IC card firstly writes related data of a corresponding operation request and a storage address where the related data are located into the backup stack, and after the IC card is powered down and powered up again in the process of updating the current operation data, the microprocessor of the IC card covers the current related data in the storage address where the original related data are located in the data area according to the acquired original related data in the backup stack, so that the consistency of the current updated data and the data related to the current updated data is maintained.
Further, as shown in fig. 2, in the power down protection method for an IC card provided in this embodiment of the present application, after selecting a to-be-processed memory address from a plurality of memory addresses and writing page information of a memory page where the to-be-processed memory address is located in a pull-out prevention area in the backup area, the method further includes the following steps:
s201, setting effective identification for page information of a storage page where the to-be-processed storage address stored in the anti-pulling area is located;
s202, when the microprocessor does not power down in response to the original data corresponding to the to-be-processed storage address, setting a failure identifier for the page information of the storage page where the to-be-processed storage address is stored in the anti-pulling area.
In combination with the above step 201 and step 202, the anti-unplugging area is used for protecting the page where the current to-be-processed storage address is located. The whole page data of the page to be updated is stored in an available page of the anti-pulling area, and then the effective mark is written in the anti-pulling mark area corresponding to the page. At this time, the protection work on the page where the current to-be-processed storage address is located is completed, the data in the to-be-processed storage address can be updated, and after the page where the to-be-processed storage address is located is updated, the invalid identifier is written after the valid identifier of the page, the fact that the anti-pulling page has completed the task is indicated, and the data information of the anti-pulling page is no longer valid.
Further, in the power-down protection method for an IC card provided in the embodiment of the present application, if a microprocessor loses power in response to original data corresponding to any to-be-processed memory address, after the microprocessor is powered on again, the method further includes:
when the microprocessor detects that the page information of the storage page where the to-be-processed storage address is located in the anti-pulling area has no invalid identifier, detecting whether the effective identifier corresponding to the page information is complete, and when the microprocessor detects that the effective identifier corresponding to the page information is complete, covering the page information of the storage page where the original data is located in the data area by the microprocessor based on the page information corresponding to the original data in the anti-pulling area.
When the IC card is powered down when responding to original data corresponding to a to-be-processed storage address, after the IC card is powered on again, the microprocessor firstly detects whether page information of a storage page where the to-be-processed storage address is located in an anti-pulling area has a failure identifier, when the IC card does not have the failure identifier, the microprocessor detects whether effective identifiers of the page information of the storage page where the to-be-processed storage address is located are complete, and after the effective identifiers are detected to be complete, the microprocessor covers the page information of the storage page where the original data is located in the data area based on the page information corresponding to the original data in the anti-pulling area.
Further, in combination with the above step 201 and step 202, the anti-unplugging region is only used to ensure the integrity of the current updated page where the to-be-processed storage address is located, and has no direct relationship with the Transaction flow. And the anti-pulling page can be invalid after being used once, so that the anti-pulling page can be repeatedly used. Therefore, the number limitation of the anti-pulling pages is flexible, at least one anti-pulling page and the corresponding identification page can be set, but generally, in order to guarantee the service life of the anti-pulling area, a plurality of anti-pulling pages can be correspondingly set.
Further, as shown in fig. 3, in the power down protection method for an IC card provided in this embodiment of the present application, each storage address and original data corresponding to each storage address, and each original associated data corresponding to each original data and the storage address of the original associated data are written into a backup stack of the backup area, where the method includes the following steps:
s301, writing each storage address and the original data corresponding to each storage address into a backup stack of the backup area;
s302, the microprocessor allocates a first check identifier for each storage address in the backup stack and the original data corresponding to each storage address, generates a first backup record, and stores the first check identifier;
the first check mark is a Cyclic Redundancy Check (CRC) code and is used for checking the accuracy of the first backup record in the power-on recovery process.
S303, writing the original associated data corresponding to each target data and the storage address of the original associated data into a backup stack of the backup area;
s304, the microprocessor allocates a second check mark to the original associated data corresponding to each original data in the backup stack and the storage address of the original associated data, generates a second backup record, and stores the second check mark.
The second check identifier is a Cyclic Redundancy Check (CRC) code, and is used for checking the accuracy of the second backup record in the power-on recovery process.
The second backup record includes original associated data corresponding to each original data, a storage address of the original associated data, and a second check identifier allocated to the original associated data, and the second backup record is 0, 1 or more.
Each backup record includes a storage address (the storage address may be a storage address of the to-be-processed data or a storage address of data associated with the to-be-processed data), a length (the length may be a length of the to-be-processed data or a length of data associated with the to-be-processed data), raw data (the raw data may be the to-be-processed data or the data associated with the to-be-processed data), and check bytes (the check bytes are the first check identifier and the second check identifier).
Further, in the power-down protection method for the IC card provided in the embodiment of the present application, if the microprocessor loses power in response to any original data corresponding to a to-be-processed memory address, after the microprocessor is powered on again, the microprocessor covers page information of a memory page in the data area where the original data is located based on page information corresponding to the original data in the anti-pulling area, and the method further includes the following steps:
the microprocessor checks the first check identifier in the first backup record, and when the check is passed, the microprocessor checks the second check identifier in the second backup record;
after the verification is passed, acquiring original associated data in the second backup record corresponding to the original data and a storage address corresponding to the original associated data from a backup stack of the backup area;
covering the current associated data corresponding to the storage address acquired in the data area by using the acquired original associated data;
acquiring the original data in the first backup record and the storage address of the original data from the backup stack of the backup area;
and covering the current data corresponding to the storage address acquired in the data area by using the acquired original data.
The first backup record refers to a first backup record which is stored by a backup stack and consists of a current storage address to be processed, original data in the storage address and a check identifier; the second backup record refers to other original associated data, the storage address of the original associated data and the check mark involved in the process of processing the original data in the storage address to be processed, and the second backup record is 0, 1 or more.
When the microprocessor is powered down in response to any original data corresponding to the storage address to be processed, after the microprocessor is powered on again, the microprocessor covers the page information of the storage page where the original data is located in the data area according to the page information corresponding to the original data in the anti-pulling area, the microprocessor verifies a first verification identifier in a first backup record (wherein the first backup record refers to the storage address to be processed, the original data in the storage address, the original data length and the first verification identifier), and when the verification is passed, the microprocessor verifies a second verification identifier in a second backup record (wherein the second backup record refers to the original related data of the data corresponding to the storage address to be processed, the storage address of the original related data, the length of the original related data and the second verification identifier of the original related data).
When the verification is passed, acquiring the second backup record, and covering the current associated data corresponding to the storage address acquired in the data area according to the original associated data in the second backup record; acquiring the first backup record, and covering the current data corresponding to the acquired storage address in the data area according to the original data in the first backup record; the backup records in the backup stack are restored from back to front in sequence, so that the integrity of the Flash memory under the condition of power failure is ensured.
Further, in the power down protection method for the IC card provided in the embodiment of the present application, the backup stack in the backup area includes a plurality of backup blocks, and the method further includes the following steps:
selecting a target starting storage block in the plurality of backup blocks;
the backup stack is generally divided into a plurality of backup blocks, one backup block is selected as a backup block (i.e., a target initial storage block) for storing currently operated data, and a first backup record generated by the currently operated data and a second backup record of data associated with the currently operated data are stored from the target initial storage block.
The microprocessor writes a current storage address to be processed and original data corresponding to the current storage address to be processed, and original associated data corresponding to the original data and a storage address of the original associated data into the target initial storage block;
and when the usage times of the target initial storage blocks are monitored to reach a preset threshold value, selecting backup blocks except the target initial storage blocks from the plurality of backup blocks as next target initial storage blocks according to a preset sequence.
The preset threshold is a reference value of the counter.
In this embodiment, in order to recycle the whole backup stack, the current use of the backup stack is also rotated after the transaction reaches a certain number of times, and a general flow is as follows: after the whole transaction is updated, the user confirms and submits according to the first page confirmation prompt information, the IC card microprocessor executes a submission process, the currently used target initial storage block pointed by the backup stack initial pointer is erased, the storage frequency identifier of the target initial storage block (the storage frequency identifier at the position is the last 5 bits of the transaction identifier TID) is added with 1, and when the storage frequency identifier of the target initial storage block is detected to reach a counter reference value (a corresponding standard is generally set according to the target initial storage block here, for example, the storage frequency of the target initial storage block is detected to reach 32 times), the backup block except the target initial storage block is selected from a plurality of backup blocks as a next target initial storage block, so that the next transaction data is stored from the target initial storage block.
Further, in the power down protection method for an IC card provided in this embodiment of the present application, after selecting a backup block other than the target starting storage block from the plurality of backup blocks as a next target starting storage block, the method further includes:
when the microprocessor monitors that no optional backup block exists in the backup stack, a target initial storage block is selected from the backup blocks again, and the process of writing the current storage address to be processed and the original data corresponding to the current storage address to be processed, and the original associated data corresponding to the original data and the storage address of the original associated data into the target initial storage block is repeated until the use times of the backup stack reach a preset threshold value.
When the microprocessor monitors that no optional backup block exists in the backup stack (namely the storage times of all backup blocks in the backup stack reach a preset threshold value, such as 32 times), returning to the step of selecting a target initial storage block from the plurality of backup blocks again; and repeating the following steps: the microprocessor writes a current storage address to be processed and original data corresponding to the current storage address to be processed, and original associated data corresponding to the original data and a storage address of the original associated data into the target initial storage block; when the usage times of the target initial storage blocks are monitored to reach a preset threshold, selecting backup blocks except the target initial storage blocks from the plurality of backup blocks as next target initial storage blocks according to a preset sequence until no selectable backup blocks exist in the backup stack (namely, the storage times of all backup blocks in the backup stack reach the preset threshold, such as 32 times); until the use times of the whole backup stack reach the preset times.
Further, in the embodiment of the present application, a power down protection method for an IC card is provided, where the method further includes:
if the plurality of backup blocks are not monitored to be in the storage range of the backup stack, resetting a target starting backup block of the backup blocks so as to enable the plurality of backup blocks to be in the storage range of the backup stack.
When the microprocessor monitors that the plurality of divided backup blocks are not in the range of the backup stack or have the problems of non-first page alignment and the like, the microprocessor needs to reset the target initial backup block of the backup blocks, so that the storage spaces of the plurality of backup blocks are all in the storage range of the backup stack.
Fig. 4 is a schematic structural diagram of an IC card power-down protection apparatus provided in an embodiment of the present application, where the apparatus includes a microprocessor 401, and a memory 402 connected to the microprocessor, where the memory further includes a data area and a backup area;
the microprocessor is used for acquiring a plurality of storage addresses corresponding to the data identification in the service request after receiving the service request sent by the terminal equipment; reading original data corresponding to the plurality of storage addresses from a data area of the memory; selecting a storage address to be processed from a plurality of storage addresses, and writing page information of a storage page where the storage address to be processed is located into a pulling-proof area in the backup area; the page information includes page data.
If the microprocessor is powered off when responding to any original data corresponding to the to-be-processed storage address, after the microprocessor is powered on again, the microprocessor covers page information of a storage page where the original data is located in the data area based on the page information corresponding to the original data in the anti-pulling area.
According to the power-down protection method for the IC card, the mode of dividing the anti-pulling area into the Flash memory of the IC card is adopted, in the process of operating the IC card by a user, the microprocessor of the IC card firstly writes the whole page of original data information of the page where the currently operated data is located into the anti-pulling area, then the whole page of the currently operated data is erased and the modified data is written, if the power failure occurs in the process of updating the currently operated data of the IC card, the whole page of the original data of the erased page is recovered after the IC card is powered on again through the mode of storing the whole page of the page where the currently operated data is located in the anti-pulling area, and the loss of the whole page of data in the process of updating the data of the IC card is avoided.
Further, in the power down protection device for an IC card provided in the embodiment of the present application, the microprocessor is further configured to: writing each storage address and the original data corresponding to each storage address, and the original associated data corresponding to each original data and the storage address of the original associated data into a backup stack of the backup area;
if the microprocessor loses power when responding to any original data corresponding to the to-be-processed memory address, after the microprocessor is powered on again and page information corresponding to the original data in the anti-pulling area covers the page information of the memory page where the original data is located in the data area, the method further comprises the following steps:
the microprocessor is further configured to obtain original associated data corresponding to the original data and a storage address corresponding to the original associated data from a backup stack in the backup area; and covering the current associated data corresponding to the storage address acquired in the data area by using the acquired original associated data.
According to the power-down protection method for the IC card, through the mode of dividing the backup stack into the Flash memory of the IC card, in the process of operating the IC card by a user, the microprocessor of the IC card firstly writes related data of a corresponding operation request and a storage address where the related data are located into the backup stack, and after the IC card is powered down and powered up again in the process of updating the current operation data, the microprocessor of the IC card covers the current related data in the storage address where the original related data are located in the data area according to the acquired original related data in the backup stack, so that the consistency of the current updated data and the data related to the current updated data is maintained.
Further, in the power down protection device for an IC card provided in the embodiment of the present application, the microprocessor is further configured to: setting effective identification for the page information of the memory page where the to-be-processed memory address stored in the anti-pulling area is located; and when the microprocessor does not power down in response to the original data corresponding to the to-be-processed storage address, setting a failure identifier for the page information of the storage page where the to-be-processed storage address is stored in the anti-pulling area.
Further, in the power down protection device for an IC card provided in the embodiment of the present application, the microprocessor is further configured to: when detecting that the page information of the storage page where the to-be-processed storage address is located in the anti-pulling area has no invalid identifier, detecting whether the effective identifier corresponding to the page information is complete, and when detecting that the effective identifier corresponding to the page information is complete, the microprocessor covers the page information of the storage page where the original data is located in the data area based on the page information corresponding to the original data in the anti-pulling area.
Further, in the power down protection device for an IC card provided in the embodiment of the present application, the microprocessor is further configured to: writing each storage address and the original data corresponding to each storage address into a backup stack of the backup area; allocating a first check identifier to each storage address in the backup stack and the original data corresponding to each storage address, generating a first backup record, and storing the first check identifier; writing the original associated data corresponding to each target data and the storage address of the original associated data into a backup stack of the backup area; and allocating a second check mark to the original associated data corresponding to each original data in the backup stack and the storage address of the original associated data, generating a second backup record, and storing the second check mark.
Further, in the power down protection device for an IC card provided in the embodiment of the present application, the microprocessor is further configured to:
checking the first check identifier in the first backup record, and when the first check identifier passes the checking, checking the second check identifier in the second backup record by the microprocessor;
after the verification is passed, acquiring original associated data in the second backup record corresponding to the original data and a storage address corresponding to the original associated data from a backup stack of the backup area;
covering the current associated data corresponding to the storage address acquired in the data area by using the acquired original associated data;
acquiring the original data in the first backup record and the storage address of the original data from the backup stack of the backup area;
and covering the current data corresponding to the storage address acquired in the data area by using the acquired original data.
Further, in the power down protection device for an IC card provided in this embodiment of the present application, the backup stack in the backup area includes a plurality of backup blocks, and the microprocessor is further configured to: selecting a target starting storage block in the plurality of backup blocks; writing the current storage address to be processed and the original data corresponding to the current storage address to be processed, and the original associated data corresponding to the original data and the storage address of the original associated data into the target initial storage block; and when the usage times of the target initial storage blocks are monitored to reach a preset threshold value, selecting backup blocks except the target initial storage blocks from the plurality of backup blocks as next target initial storage blocks according to a preset sequence.
Further, in the power down protection device for an IC card provided in the embodiment of the present application, the microprocessor is further configured to: when no optional backup block in the backup stack is monitored, a target initial storage block is selected from the backup blocks again, the current storage address to be processed and the original data corresponding to the current storage address to be processed are repeated, and the original associated data corresponding to the original data and the storage address of the original associated data are written into the target initial storage block until the use times of the backup stack reach a preset threshold value.
Further, in the power down protection device for an IC card provided in the embodiment of the present application, the microprocessor is further configured to: if the plurality of backup blocks are not monitored to be in the storage range of the backup stack, resetting a target starting backup block of the backup blocks so as to enable the plurality of backup blocks to be in the storage range of the backup stack.
The computer program product for performing the power-down protection method for the IC card provided in the embodiment of the present application includes a computer-readable storage medium storing a program code, where instructions included in the program code may be used to execute the method described in the foregoing method embodiment, and specific implementation may refer to the method embodiment, and is not described herein again.
The power-down protection device for the IC card provided by the embodiment of the application can be specific hardware on equipment or software or firmware installed on the equipment and the like. The device provided by the embodiment of the present application has the same implementation principle and technical effect as the foregoing method embodiments, and for the sake of brief description, reference may be made to the corresponding contents in the foregoing method embodiments where no part of the device embodiments is mentioned. It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the foregoing systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments provided in the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus once an item is defined in one figure, it need not be further defined and explained in subsequent figures, and moreover, the terms "first", "second", "third", etc. are used merely to distinguish one description from another and are not to be construed as indicating or implying relative importance.
Finally, it should be noted that: the above-mentioned embodiments are only specific embodiments of the present application, and are used for illustrating the technical solutions of the present application, but not limiting the same, and the scope of the present application is not limited thereto, and although the present application is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: any person skilled in the art can modify or easily conceive the technical solutions described in the foregoing embodiments or equivalent substitutes for some technical features within the technical scope disclosed in the present application; such modifications, changes or substitutions do not depart from the spirit and scope of the present disclosure, which should be construed in light of the above teachings. Are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (7)

1. A power-fail protection method for IC card is characterized in that the power-fail protection method is applied to a microprocessor in the IC card, the IC card also comprises a memory connected with the microprocessor, and the memory comprises a data area and a backup area; the method comprises the following steps:
after receiving a service request sent by terminal equipment, acquiring a plurality of storage addresses corresponding to data identifiers in the service request; reading original data corresponding to the plurality of storage addresses from a data area of the memory;
selecting a storage address to be processed from a plurality of storage addresses, and writing page information of a storage page where the storage address to be processed is located into a pulling-proof area in the backup area; the page information comprises page data;
if the microprocessor is powered off when responding to any original data corresponding to the memory address to be processed, after the microprocessor is powered on again, the microprocessor covers page information of a memory page where the original data is located in the data area based on page information corresponding to the original data in the anti-pulling area;
after the original data corresponding to the plurality of memory addresses is read from the data area of the memory, the method further includes:
writing each storage address and the original data corresponding to each storage address, and the original associated data corresponding to each original data and the storage address of the original associated data into a backup stack of the backup area;
if the microprocessor loses power when responding to any original data corresponding to the to-be-processed memory address, after the microprocessor is powered on again and page information corresponding to the original data in the anti-pulling area covers the page information of the memory page where the original data is located in the data area, the method further comprises the following steps:
acquiring original associated data corresponding to the original data and a storage address corresponding to the original associated data from a backup stack of the backup area;
covering the current associated data corresponding to the storage address acquired in the data area by using the acquired original associated data;
writing each storage address and the original data corresponding to each storage address, and the original associated data corresponding to each original data and the storage address of the original associated data into a backup stack of the backup area, wherein the method comprises the following steps:
writing each storage address and the original data corresponding to each storage address into a backup stack of the backup area;
the microprocessor allocates a first check identifier for each storage address in the backup stack and the original data corresponding to each storage address, generates a first backup record, and stores the first check identifier;
writing the original associated data corresponding to each original data and the storage address of the original associated data into a backup stack of the backup area;
the microprocessor allocates a second check mark to original associated data corresponding to each original data in the backup stack and a storage address of the original associated data, generates a second backup record, and stores the second check mark;
if the microprocessor loses power when responding to any original data corresponding to the to-be-processed memory address, after the microprocessor is powered on again and page information corresponding to the original data in the anti-pulling area covers the page information of the memory page where the original data is located in the data area, the method further comprises the following steps:
the microprocessor checks the first check identifier in the first backup record, and when the check is passed, the microprocessor checks the second check identifier in the second backup record;
after the verification is passed, acquiring original associated data in the second backup record corresponding to the original data and a storage address corresponding to the original associated data from a backup stack of the backup area;
covering the current associated data corresponding to the storage address acquired in the data area by using the acquired original associated data;
acquiring the original data in the first backup record and the storage address of the original data from the backup stack of the backup area;
and covering the current data corresponding to the storage address acquired in the data area by using the acquired original data.
2. The power-down protection method for the IC card according to claim 1, wherein after the step of selecting the memory address to be processed from the plurality of memory addresses and writing the page information of the memory page where the memory address to be processed is located in the anti-pulling area in the backup area, the power-down protection method further comprises the steps of:
setting effective identification for the page information of the memory page where the to-be-processed memory address stored in the anti-pulling area is located;
and when the microprocessor does not power down in response to the original data corresponding to the to-be-processed storage address, setting a failure identifier for the page information of the storage page where the to-be-processed storage address is stored in the anti-pulling area.
3. The power-down protection method for the IC card according to claim 2, wherein if the microprocessor is powered down in response to the original data corresponding to any one of the memory addresses to be processed, after the microprocessor is powered up again, the method further comprises:
when the microprocessor detects that the page information of the storage page where the to-be-processed storage address is located in the anti-pulling area has no invalid identifier, detecting whether the effective identifier corresponding to the page information is complete, and when the microprocessor detects that the effective identifier corresponding to the page information is complete, covering the page information of the storage page where the original data is located in the data area by the microprocessor based on the page information corresponding to the original data in the anti-pulling area.
4. The IC card power-down protection method of claim 1, wherein the backup stack of the backup area includes a plurality of backup blocks, the method further comprising:
selecting a target starting storage block in the plurality of backup blocks;
the microprocessor writes a current storage address to be processed and original data corresponding to the current storage address to be processed, and original associated data corresponding to the original data and a storage address of the original associated data into the target initial storage block;
and when the usage times of the target initial storage blocks are monitored to reach a preset threshold value, selecting backup blocks except the target initial storage blocks from the plurality of backup blocks as next target initial storage blocks according to a preset sequence.
5. The IC card power-down protection method according to claim 4, wherein after selecting the backup block other than the target starting memory block from the plurality of backup blocks as a next target starting memory block, the method further comprises:
when the microprocessor monitors that no optional backup block exists in the backup stack, a target initial storage block is selected from the backup blocks again, and the process of writing the current storage address to be processed and the original data corresponding to the current storage address to be processed, and the original associated data corresponding to the original data and the storage address of the original associated data into the target initial storage block is repeated until the use times of the backup stack reach a preset threshold value.
6. The IC card power-down protection method according to claim 4, further comprising:
if the plurality of backup blocks are not monitored to be in the storage range of the backup stack, resetting a target starting backup block of the backup blocks so as to enable the plurality of backup blocks to be in the storage range of the backup stack.
7. The power-fail protection device for the IC card is characterized by comprising a microprocessor and a memory connected with the microprocessor, wherein the memory further comprises a data area and a backup area;
the microprocessor is used for acquiring a plurality of storage addresses corresponding to the data identification in the service request after receiving the service request sent by the terminal equipment; reading original data corresponding to the plurality of storage addresses from a data area of the memory; selecting a storage address to be processed from a plurality of storage addresses, and writing page information of a storage page where the storage address to be processed is located into a pulling-proof area in the backup area; the page information comprises page data;
if the microprocessor is powered off when responding to any original data corresponding to the memory address to be processed, after the microprocessor is powered on again, the microprocessor covers page information of a memory page where the original data is located in the data area based on page information corresponding to the original data in the anti-pulling area;
the microprocessor is further configured to: writing each storage address and the original data corresponding to each storage address, and the original associated data corresponding to each original data and the storage address of the original associated data into a backup stack of the backup area;
if the microprocessor loses power when responding to any original data corresponding to the to-be-processed memory address, after the microprocessor is powered on again, the microprocessor covers page information of a memory page where the original data is located in the data area based on page information corresponding to the original data in the anti-pulling area, and the method further comprises the following steps:
the microprocessor is further configured to obtain original associated data corresponding to the original data and a storage address corresponding to the original associated data from a backup stack in the backup area; covering the current associated data corresponding to the storage address acquired in the data area by using the acquired original associated data;
the microprocessor is further configured to: writing each storage address and the original data corresponding to each storage address into a backup stack of the backup area; allocating a first check identifier to each storage address in the backup stack and the original data corresponding to each storage address, generating a first backup record, and storing the first check identifier; writing the original associated data corresponding to each original data and the storage address of the original associated data into a backup stack of the backup area; allocating a second check mark to the original associated data corresponding to each original data in the backup stack and the storage address of the original associated data, generating a second backup record, and storing the second check mark;
the microprocessor is further configured to:
checking the first check identifier in the first backup record, and when the first check identifier passes the checking, checking the second check identifier in the second backup record by the microprocessor;
after the verification is passed, acquiring original associated data in the second backup record corresponding to the original data and a storage address corresponding to the original associated data from a backup stack of the backup area;
covering the current associated data corresponding to the storage address acquired in the data area by using the acquired original associated data;
acquiring the original data in the first backup record and the storage address of the original data from the backup stack of the backup area;
and covering the current data corresponding to the storage address acquired in the data area by using the acquired original data.
CN201811621864.XA 2018-12-28 2018-12-28 Power-down protection method and device for IC card Active CN109685190B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811621864.XA CN109685190B (en) 2018-12-28 2018-12-28 Power-down protection method and device for IC card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811621864.XA CN109685190B (en) 2018-12-28 2018-12-28 Power-down protection method and device for IC card

Publications (2)

Publication Number Publication Date
CN109685190A CN109685190A (en) 2019-04-26
CN109685190B true CN109685190B (en) 2022-04-12

Family

ID=66190123

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811621864.XA Active CN109685190B (en) 2018-12-28 2018-12-28 Power-down protection method and device for IC card

Country Status (1)

Country Link
CN (1) CN109685190B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110597665A (en) * 2019-09-18 2019-12-20 普联技术有限公司 Power-down protection device
CN111104253B (en) * 2019-11-22 2023-06-06 江苏恒宝智能系统技术有限公司 Smart card for power failure protection and working method thereof
CN111105563B (en) * 2019-12-17 2021-08-24 厦门计讯物联科技有限公司 Water card data writing method, device, equipment and storage medium for preventing data loss
CN113785275B (en) * 2020-12-17 2024-03-05 深圳杰睿联科技有限公司 Flash data power-down protection method and device

Citations (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001022653A (en) * 1999-07-12 2001-01-26 Matsushita Electric Ind Co Ltd Non-volatile semiconductor storage device
JP2004234311A (en) * 2003-01-30 2004-08-19 Matsushita Electric Ind Co Ltd Ic card device and communication method therefor
CN101699476A (en) * 2009-10-29 2010-04-28 北京握奇数据系统有限公司 Data processing method and device of smart cards
CN101807320A (en) * 2010-04-12 2010-08-18 中兴通讯股份有限公司 Terminal aiming at non-contact intelligent card and method thereof for processing abnormality
CN102063384A (en) * 2009-11-13 2011-05-18 恒宝股份有限公司 Method for performing read-write operation on programmable read-only memory with cache by JAVA card
CN102073595A (en) * 2011-01-24 2011-05-25 华亚微电子(上海)有限公司 Power failure prevention loss balanced storage method
CN102254261A (en) * 2011-07-15 2011-11-23 武汉天喻信息产业股份有限公司 Instantaneous consumption application processing method and system for intelligent card
CN102929805A (en) * 2012-10-19 2013-02-13 浪潮电子信息产业股份有限公司 Power-down protection method for cache data in memory system
CN103150125A (en) * 2013-02-20 2013-06-12 郑州信大捷安信息技术股份有限公司 Method for prolonging service life of power-down protection date buffer memory and smart card
CN103914407A (en) * 2012-12-30 2014-07-09 航天信息股份有限公司 Secure digital memory (SD) card power down protection and restoring method and SD card with power down protection function
CN104461770A (en) * 2014-10-31 2015-03-25 上海动联信息技术股份有限公司 Power-off protection method of Flash chip
CN104536847A (en) * 2014-12-18 2015-04-22 飞天诚信科技股份有限公司 Method for improving data writing integrity
CN104615662A (en) * 2015-01-05 2015-05-13 宇龙计算机通信科技(深圳)有限公司 Data processing method and device and terminal device
CN104881334A (en) * 2015-02-06 2015-09-02 北京飞杰信息技术有限公司 Crash-proof cache data protection method and system
CN105138432A (en) * 2015-08-31 2015-12-09 深圳市瑞耐斯技术有限公司 Solid state disk data fast backup method and system used under abnormal power failure
CN105260270A (en) * 2015-11-11 2016-01-20 恒宝股份有限公司 Flash storage space dynamic recovery method and device
CN106227680A (en) * 2016-07-26 2016-12-14 成都三零嘉微电子有限公司 A kind of data process and power fail preventing data guard method
CN106598484A (en) * 2016-11-17 2017-04-26 华为技术有限公司 Data storage method, flash memory chip and storage device

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7257714B1 (en) * 1999-10-19 2007-08-14 Super Talent Electronics, Inc. Electronic data storage medium with fingerprint verification capability
US20070005874A1 (en) * 2005-07-01 2007-01-04 Dan Dodge File system storing transaction records in flash-like media
JP4420351B2 (en) * 2005-09-30 2010-02-24 富士通株式会社 Hierarchical storage system, control method and program
TWI438632B (en) * 2011-04-14 2014-05-21 Mstar Semiconductor Inc Controlling method and controller for memory
CN107944532A (en) * 2017-11-28 2018-04-20 恒宝股份有限公司 A kind of smart card and the method and terminal for reading and writing smart card

Patent Citations (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001022653A (en) * 1999-07-12 2001-01-26 Matsushita Electric Ind Co Ltd Non-volatile semiconductor storage device
JP2004234311A (en) * 2003-01-30 2004-08-19 Matsushita Electric Ind Co Ltd Ic card device and communication method therefor
CN101699476A (en) * 2009-10-29 2010-04-28 北京握奇数据系统有限公司 Data processing method and device of smart cards
CN102063384A (en) * 2009-11-13 2011-05-18 恒宝股份有限公司 Method for performing read-write operation on programmable read-only memory with cache by JAVA card
CN101807320A (en) * 2010-04-12 2010-08-18 中兴通讯股份有限公司 Terminal aiming at non-contact intelligent card and method thereof for processing abnormality
CN102073595A (en) * 2011-01-24 2011-05-25 华亚微电子(上海)有限公司 Power failure prevention loss balanced storage method
CN102254261A (en) * 2011-07-15 2011-11-23 武汉天喻信息产业股份有限公司 Instantaneous consumption application processing method and system for intelligent card
CN102929805A (en) * 2012-10-19 2013-02-13 浪潮电子信息产业股份有限公司 Power-down protection method for cache data in memory system
CN103914407A (en) * 2012-12-30 2014-07-09 航天信息股份有限公司 Secure digital memory (SD) card power down protection and restoring method and SD card with power down protection function
CN103150125A (en) * 2013-02-20 2013-06-12 郑州信大捷安信息技术股份有限公司 Method for prolonging service life of power-down protection date buffer memory and smart card
CN104461770A (en) * 2014-10-31 2015-03-25 上海动联信息技术股份有限公司 Power-off protection method of Flash chip
CN104536847A (en) * 2014-12-18 2015-04-22 飞天诚信科技股份有限公司 Method for improving data writing integrity
CN104615662A (en) * 2015-01-05 2015-05-13 宇龙计算机通信科技(深圳)有限公司 Data processing method and device and terminal device
CN104881334A (en) * 2015-02-06 2015-09-02 北京飞杰信息技术有限公司 Crash-proof cache data protection method and system
CN105138432A (en) * 2015-08-31 2015-12-09 深圳市瑞耐斯技术有限公司 Solid state disk data fast backup method and system used under abnormal power failure
CN105260270A (en) * 2015-11-11 2016-01-20 恒宝股份有限公司 Flash storage space dynamic recovery method and device
CN106227680A (en) * 2016-07-26 2016-12-14 成都三零嘉微电子有限公司 A kind of data process and power fail preventing data guard method
CN106598484A (en) * 2016-11-17 2017-04-26 华为技术有限公司 Data storage method, flash memory chip and storage device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
基于FLASH的智能卡数据掉电保护机制设计;张金霞等;《电子技术与软件工程》;20150721(第14期);216-218 *

Also Published As

Publication number Publication date
CN109685190A (en) 2019-04-26

Similar Documents

Publication Publication Date Title
CN109685190B (en) Power-down protection method and device for IC card
CN107608908B (en) Wear leveling method for data storage device
TW392173B (en) Method for controlling non volatile semiconductor memory
JP4596715B2 (en) An array for storing various versions of a data set in separate memory areas and a method for updating a data set in memory
US20120331218A1 (en) Flash memory storage system, and controller and anti-falsifying method thereof
US9235534B2 (en) Data protecting method, memory controller and memory storage apparatus
US8250288B2 (en) Flash memory storage system and controller and data protection method thereof
US8954705B2 (en) Memory space management method and memory controller and memory storage device and memory storage using the same
US9772937B2 (en) Data processing method, memory controller and memory storage apparatus
US8417902B2 (en) One-time-programmable memory emulation
JP3576625B2 (en) Data management method for flash memory card and data processing device using the data management method
CN104978154A (en) Cache operation-based flash rapid read-write method and system
KR101783526B1 (en) Ic card, electronic device and portable electronic device
JP2003216511A (en) Non-volatile memory device, data updating method, data updating program and computer readable recording medium with recorded program
JP2008225672A (en) Semiconductor memory device
CN107257281B (en) Method, apparatus and computer readable storage medium for NOR F L ASH storage key record
CN111666574A (en) Method for binding BIOS (basic input output System), mainboard and hard disk mutually
US10146644B2 (en) Integrity of transactional memory of card computing devices in case of card tear events
US20070274302A1 (en) Data Storage Device, Memory Managing Method, and Program
CN103824101B (en) Logic card reading/writing method and system
JP7322923B2 (en) Secure element, transaction control method and device
US10223195B2 (en) Counter in a flash memory
JP7438432B1 (en) Electronic information storage medium, IC chip, IC card, record writing method, and program
JP2006107363A (en) Portable electronic device and memory access method used in the same
JP2022184327A (en) Secure element, device and nonvolatile memory managing method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant