CN109684268A - A kind of highly integrated high-performance digital signal processor and its encapsulating structure based on SiP - Google Patents
A kind of highly integrated high-performance digital signal processor and its encapsulating structure based on SiP Download PDFInfo
- Publication number
- CN109684268A CN109684268A CN201811487484.1A CN201811487484A CN109684268A CN 109684268 A CN109684268 A CN 109684268A CN 201811487484 A CN201811487484 A CN 201811487484A CN 109684268 A CN109684268 A CN 109684268A
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- sip
- digital signal
- dsp
- fpga chip
- signal processor
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- 239000000919 ceramic Substances 0.000 claims abstract description 12
- SWPMTVXRLXPNDP-UHFFFAOYSA-N 4-hydroxy-2,6,6-trimethylcyclohexene-1-carbaldehyde Chemical compound CC1=C(C=O)C(C)(C)CC(O)C1 SWPMTVXRLXPNDP-UHFFFAOYSA-N 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 230000015654 memory Effects 0.000 claims description 3
- 238000003466 welding Methods 0.000 claims 1
- 230000008054 signal transmission Effects 0.000 abstract description 4
- 230000017525 heat dissipation Effects 0.000 abstract description 3
- 238000012856 packing Methods 0.000 abstract description 3
- 230000010354 integration Effects 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 6
- 230000006870 function Effects 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/20—Cooling means
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Human Computer Interaction (AREA)
- Semiconductor Integrated Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
A kind of highly integrated high-performance digital signal processor and its encapsulating structure based on SiP provided by the invention；Including fpga chip, dsp processor, connected between the fpga chip and dsp processor by SRIO interface；The present invention reduces processor volume, reduces the power consumption and circuit design difficulty of system using main devices such as SiP Integration ofTechnology FPGA, DSP, DDR3.Using the packing forms of positive and negative two-chamber ceramic shell, 1 DSP, 1 FPGA and 4 DDR3 device is distributed in epicoele, encapsulates the flip-chip packaged design based on chip bump, and have preferable high speed transmission of signals rate and heat dissipation characteristics.
Description
Technical field
The present invention relates to a kind of highly integrated high-performance digital signal processor and its encapsulating structure based on SiP.
Background technique
In recent years, the continuous improvement of phased array technology, the application especially in space flight and aviation, it is desirable that its number letter
Number processing have highly integrated, high-performance and miniaturization the characteristics of.However, traditional digital signal processor uses high performance point
It is designed from device, volume is difficult to reduce.System in package (SiP) is using any combination, by multiple with different function
Active electronic device and selectable passive element, and other devices such as MEMS or optical device, being assembled into can
To provide single standard packaging element of multiple functions, a system or subsystem are formed.SiP total trend is that integrated level is got over
Come higher, product function, increasingly stronger, performance level and reliability constantly promote while realizing the quick of volume, weight and power consumption
It is decreased obviously.
Existing high-performance digital signal processor uses the circuit board of discrete device circuit design, and schematic block circuit diagram is such as
Shown in Fig. 4.Mainly contain 2 FPGA, 1 DSP, 4 DDR3,2 road RS422,1 road RS232,1 road USB2.0,2 tunnel gigabits
The interfaces such as network interface, 1 road 1553B.
The performance of the method digital signal processor is still limited by discrete device design, such as low FPGA, DSP, and circuit is set
Meter is complicated, and the high-speed digital signal transmission anti-interference difficulty of electromagnetic compatibility is big, cannot miniaturise.
Summary of the invention
In order to solve the above technical problems, the present invention provides a kind of, the highly integrated high performance digital signal based on SiP is handled
Device and its encapsulating structure realize miniaturising for digital signal processor.The design method is simple, and stability is high, reduces
Equipment volume and power consumption, reduce costs.
The present invention is achieved by the following technical programs.
A kind of highly integrated high-performance digital signal processor and its encapsulating structure based on SiP provided by the invention；Including
Fpga chip, dsp processor are connected between the fpga chip and dsp processor by SRIO interface；
The fpga chip is separately connected 6 signal amplifiers, fpga chip by high speed A D interface and low speed A D interface
It is connect respectively with transceiver, USB interface, Ethernet by connector, USB driving, ethernet transceiver；
The dsp processor connects multiple DDR memories, also passes through connector and connect with transceiver, and is arranged thereon
12C, SPI, jtag port；
The fpga chip and dsp processor are also connect with external storage interface.
The fpga chip model XC7K325T.
The dsp processor model MT-6678.
One kind be based on Sip high-performance digital signal processor encapsulating structure, the CCG4692 packaged type of use, including its
Ceramic shell；Using the packaged type of two-chamber in ceramic shell, shell uses HTCC ceramic heating plate to radiate outside.
Two-chamber is divided into upper cavity and lower chamber, is provided with dsp processor, FPGA core on upper cavity by way of flip chip bonding
Piece, DDR device, lower chamber weld the active device of FLASH, ethernet transceiver, 422/232 transceiver, usb driver.
The beneficial effects of the present invention are: using main devices such as SiP Integration ofTechnology FPGA, DSP, DDR3, reduce
Processor volume reduces the power consumption and circuit design difficulty of system.Using the packing forms of positive and negative two-chamber ceramic shell, thereon
1 DSP, 1 FPGA and 4 DDR3 device is distributed in chamber, encapsulates the flip-chip packaged design based on chip bump, and have preferable
High speed transmission of signals rate and heat dissipation characteristics.
Detailed description of the invention
Fig. 1 is processor schematic diagram of the invention；
Fig. 2 is upper cavity structural schematic diagram of the invention；
Fig. 3 is lower chamber structural schematic diagram of the invention；
Fig. 4 is this existing vertical processor circuit schematic diagram.
Specific embodiment
Be described further below technical solution of the present invention, but claimed range be not limited to it is described.
A kind of highly integrated high-performance digital signal processor and its encapsulating structure based on SiP；Including fpga chip, DSP
Processor is connected between the fpga chip and dsp processor by SRIO interface；
The fpga chip is separately connected 6 signal amplifiers, fpga chip by high speed A D interface and low speed A D interface
It is connect respectively with transceiver, USB interface, Ethernet by connector, USB driving, ethernet transceiver；
The dsp processor connects multiple DDR memories, also passes through connector and connect with transceiver, and is arranged thereon
12C, SPI, jtag port；
The fpga chip and dsp processor are also connect with external storage interface.
The fpga chip model XC7K325T.
The dsp processor model MT-6678.
One kind be based on Sip high-performance digital signal processor encapsulating structure, the CCG4692 packaged type of use, including its
Ceramic shell；Using the packaged type of two-chamber in ceramic shell, shell uses HTCC ceramic heating plate to radiate outside.
Two-chamber is divided into upper cavity and lower chamber, is provided with dsp processor, FPGA core on upper cavity by way of flip chip bonding
Piece, DDR device, lower chamber weld the active device of FLASH, ethernet transceiver, 422/232 transceiver, usb driver.
Processor uses SiP technology, is integrated with 1 FPGA, 1 DSP, 1 FLASH, 4 DDR3,1 Ethernet transmitting-receiving
11 active devices and several resistance, capacitor etc. such as device, 1 422 transceiver, 1 232 transceiver, 1 usb driver are passive
Device, meets that digital signal processor is highly integrated, high performance requirement.Functional block diagram is as shown in Figure 1.
It is full by volume-diminished to 48mm*42mm*6.2mm on the basis of not changing original digital signal processor function
Digital signal processor device small form factor requirements.
1 DSP, 1 FPGA and 4 is distributed with using the packing forms using positive and negative two-chamber ceramic shell, epicoele in encapsulation
Piece DDR3 device encapsulates the flip-chip packaged design based on chip bump, and has preferable high speed transmission of signals rate and heat dissipation
Characteristic.Its layout structure is as shown in Figure 2 and Figure 3.
Claims (5)
1. a kind of highly integrated high-performance digital signal processor based on SiP, it is characterised in that: including fpga chip, DSP processing
Device is connected between the fpga chip and dsp processor by SRIO interface；
The fpga chip is separately connected 6 signal amplifiers by high speed A D interface and low speed A D interface, and fpga chip passes through
Connector, USB driving, ethernet transceiver are connect with transceiver, USB interface, Ethernet respectively；
The dsp processor connects multiple DDR memories, also passes through connector and connect with transceiver, and thereon setting 12C,
SPI, jtag port；
The fpga chip and dsp processor are also connect with external storage interface.
2. the highly integrated high-performance digital signal processor based on SiP as described in claim 1, it is characterised in that: described
Fpga chip model XC7K325T.
3. the highly integrated high-performance digital signal processor based on SiP as described in claim 1, it is characterised in that: the DSP
Processor model is MT-6678.
4. one kind is based on Sip high-performance digital signal processor encapsulating structure, the CCG4692 packaged type of use, including its pottery
Ceramic shell, it is characterised in that: using the packaged type of two-chamber in ceramic shell, shell uses HTCC ceramic heating plate to radiate outside.
5. being based on Sip high-performance digital signal processor encapsulating structure as claimed in claim 4, it is characterised in that: two-chamber point
For upper cavity and lower chamber, dsp processor, fpga chip, DDR device are provided with by way of flip chip bonding on upper cavity, under
Cavity welding FLASH, ethernet transceiver, 422/232 transceiver, usb driver active device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811487484.1A CN109684268A (en) | 2018-12-06 | 2018-12-06 | A kind of highly integrated high-performance digital signal processor and its encapsulating structure based on SiP |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811487484.1A CN109684268A (en) | 2018-12-06 | 2018-12-06 | A kind of highly integrated high-performance digital signal processor and its encapsulating structure based on SiP |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109684268A true CN109684268A (en) | 2019-04-26 |
Family
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811487484.1A Pending CN109684268A (en) | 2018-12-06 | 2018-12-06 | A kind of highly integrated high-performance digital signal processor and its encapsulating structure based on SiP |
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| CN (1) | CN109684268A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107807574A (en) * | 2017-11-02 | 2018-03-16 | 中电科技集团重庆声光电有限公司 | Multifunctional interface circuit based on integrative packaging |
| CN110275141A (en) * | 2019-06-26 | 2019-09-24 | 西安电子科技大学 | Radar signal processing circuit, encapsulation and implementation method based on sip technique |
| CN111782570A (en) * | 2020-06-05 | 2020-10-16 | 中国兵器工业集团第二一四研究所苏州研发中心 | Signal processing SiP module based on TMS320C6748 |
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|---|---|---|---|---|
| US6959376B1 (en) * | 2001-10-11 | 2005-10-25 | Lsi Logic Corporation | Integrated circuit containing multiple digital signal processors |
| CN101079412A (en) * | 2006-05-25 | 2007-11-28 | 三星电机株式会社 | System in package module |
| CN105807265A (en) * | 2016-05-13 | 2016-07-27 | 中国电子科技集团公司第五十八研究所 | Miniaturized high-performance altimeter signal processing and control SIP module |
-
2018
- 2018-12-06 CN CN201811487484.1A patent/CN109684268A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6959376B1 (en) * | 2001-10-11 | 2005-10-25 | Lsi Logic Corporation | Integrated circuit containing multiple digital signal processors |
| CN101079412A (en) * | 2006-05-25 | 2007-11-28 | 三星电机株式会社 | System in package module |
| CN105807265A (en) * | 2016-05-13 | 2016-07-27 | 中国电子科技集团公司第五十八研究所 | Miniaturized high-performance altimeter signal processing and control SIP module |
Non-Patent Citations (2)
| Title |
|---|
| 晏芸: ""基于TMS320C6678的激光测距实时信号处理研究"", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
| 李搏等: "小尺寸数字闭环光纤陀螺信号处理电路", 《中国惯性技术学报》 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107807574A (en) * | 2017-11-02 | 2018-03-16 | 中电科技集团重庆声光电有限公司 | Multifunctional interface circuit based on integrative packaging |
| CN107807574B (en) * | 2017-11-02 | 2020-06-02 | 中电科技集团重庆声光电有限公司 | Multifunctional interface circuit based on integrated packaging |
| CN110275141A (en) * | 2019-06-26 | 2019-09-24 | 西安电子科技大学 | Radar signal processing circuit, encapsulation and implementation method based on sip technique |
| CN111782570A (en) * | 2020-06-05 | 2020-10-16 | 中国兵器工业集团第二一四研究所苏州研发中心 | Signal processing SiP module based on TMS320C6748 |
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Application publication date: 20190426 |
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