CN109684101A - A kind of FC_AE_ASM network protocol processing engine circuit - Google Patents
A kind of FC_AE_ASM network protocol processing engine circuit Download PDFInfo
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- CN109684101A CN109684101A CN201811523231.5A CN201811523231A CN109684101A CN 109684101 A CN109684101 A CN 109684101A CN 201811523231 A CN201811523231 A CN 201811523231A CN 109684101 A CN109684101 A CN 109684101A
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- message
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/546—Message passing systems or structures, e.g. queues
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/544—Buffers; Shared memory; Pipes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/12—Protocol engines
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate
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- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Security & Cryptography (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Computer And Data Communications (AREA)
- Communication Control (AREA)
Abstract
The invention belongs to field of computer technology, there is provided a kind of FC_AE_ASM network protocol processing engine circuit, comprising: FC_AE_ASM message processing module (1), host interface module (2), FC-2 processing module (3), time synchronization module (4), register access interface module (5).The present invention is that the application of FC-AE-ASM agreement provides a kind of pure hardware circuit implementation method, do not limit support the number of message id, same type message can shared buffer, and buffer area number is configurable, and scalability is strong, and use is more flexible.
Description
Technical field
The invention belongs to field of computer technology, are related to a kind of FC_AE_ASM network protocol processing engine circuit.
Background technique
FC (Fibre Channel, optical-fibre channel) with its Gbit transmission rate, strong antijamming capability, it is light-weight, be suitble to height
The inherent technologies advantages such as fast remote transmission become the airborne backbone communication network first choice of opportunity of combat of new generation, FC_AE_ASM agreement
Realization is the core and key of FC network development, and a kind of FC_AE_ASM network protocol processing engine circuit proposed in the present invention is unlimited
Surely support the number of message id, same type message can shared buffer, and buffer area number is configurable, and scalability is strong, uses spirit
It is living.
Summary of the invention
Goal of the invention:
The present invention provides a kind of FC_AE_ASM network protocol processing engine circuit, does not limit number, the same type for supporting message id
Message can shared buffer, and buffer area number is configurable, and scalability is strong, and use is more flexible.
Technical solution:
The technical solution of the invention is as follows:
A kind of FC_AE_ASM network protocol processing engine circuit, comprising: FC_AE_ASM message processing module 1, host interface mould
Block 2, FC-2 processing module 3, time synchronization module 4, register access interface module 5;
FC_AE_ASM message processing module 1: transmitting-receiving scheduling, every kind of data type are carried out according to network data message type
Transmitting-receiving use page management approach, data carry out tissue using ASM format, pass through register access interface module 5 and realize pair
The configuration management of ASM message;
Host interface module 2: access of the host to 1 internal resource of FC_AE_ASM message processing module, FC_AE_ are realized
Interruption and FC_AE_ASM message processing module 1 of the ASM message processing module 1 to host access the DMA of host memory;
FC-2 processing module 3: realizing will be through treated message groups the are woven to FC frame hair of FC_AE_ASM message processing module 1
It send to FC network;The reception of FC frame is completed, and submits to the processing of FC_AE_ASM message processing module 1;
Time synchronization module 4: local devices RTC clock, global task system RTC clock and global network calendar are realized
Time;
Register access interface module 5: the interface to FC-ASM protocol process module internal resource access control is provided.
For FC_AE_ASM message processing module 1 using service queue type dispatch mode is based on, messaging flow is as follows:
Message is sent:
--- message, which is sent, to be supported to emergency message transmit queue, event message transmit queue, flow message transmit queue three
The configuration of kind type of service queue;
--- it is wherein tightly message and the 32 buffer cell management of support of event message transmit queue maximum, flow message is sent
Queue maximum supports 16 buffer cell management;
--- when urgent or event message is sent, it is empty to allocate data filling to be sent in advance any logic in queue
Between (1~32), flow message send when, will data to be sent address filling cache management register in;
--- scheduling is then completed message sending according to priority configuration information by transmission scheduler.
Message sink:
--- message sink is supported to emergency message transmit queue, event message transmit queue, flow message transmit queue three
The configuration of kind type of service queue;
--- wherein emergency message and event message reception queue maximum support 512 buffer cell management,
Flow message receiving queue maximum supports 32 buffer cell management.All message ids share depositing in same type queue
Store up space;
--- when urgent or event message reception, logic can arrive the data of same type according to received sequencing storage
In currently available logic unit, user's access evidence is reinformed;
--- when flow message receives, logic will receive complete data, store according to sequencing to currently available
In logic unit, user's access evidence is reinformed.
The utility model has the advantages that
The present invention provides a kind of pure hardware circuit implementation method for the application of FC-AE-ASM agreement, does not limit support and disappears
Cease the number of ID, same type message can shared buffer, and buffer area number is configurable, and scalability is strong, and use is more flexible.
Detailed description of the invention
Fig. 1 is FC_AE_ASM network protocol processing engine circuit structure diagram.
Specific embodiment
In the following with reference to the drawings and specific embodiments, technical solution of the present invention is clearly and completely stated.Obviously,
The embodiment stated is only a part of the embodiment of the present invention, instead of all the embodiments, based on the embodiments of the present invention,
Those skilled in the art are not making creative work premise every other embodiment obtained, belong to guarantor of the invention
Protect range.
As shown in Figure 1, a kind of FC_AE_ASM network protocol processing engine circuit, it is characterised in that the circuit includes 5 parts:
FC_AE_ASM message processing module 1, host interface module 2, FC-2 processing module 3, time synchronization module 4, register access connect
Mouth mold block 5.Wherein:
FC_AE_ASM message processing module 1: transmitting-receiving scheduling, every kind of data type are carried out according to network data message type
Transmitting-receiving use page management approach, data carry out tissue using ASM format, pass through register access interface module 5 and realize pair
The configuration management of ASM message;
Host interface module 2: access of the host to 1 internal resource of FC_AE_ASM message processing module, FC_AE_ are realized
Interruption and FC_AE_ASM message processing module 1 of the ASM message processing module 1 to host access the DMA of host memory;
FC-2 processing module 3: realizing will be through treated message groups the are woven to FC frame hair of FC_AE_ASM message processing module 1
It send to FC network;The reception of FC frame is completed, and submits to the processing of FC_AE_ASM message processing module 1;
Time synchronization module 4: local devices RTC clock, global task system RTC clock and global network calendar are realized
Time;
Register access interface module 5: the interface to FC-ASM protocol process module internal resource access control is provided.
A kind of FC_AE_ASM network protocol processing engine circuit, which is characterized in that FC_AE_ASM message processing module 1 uses base
In service queue type dispatch mode, messaging flow is as follows:
A. message is sent:
--- message, which is sent, to be supported to emergency message transmit queue, event message transmit queue, flow message transmit queue three
The configuration of kind type of service queue;
--- it is wherein tightly message and the 32 buffer cell management of support of event message transmit queue maximum, flow message is sent
Queue maximum supports 16 buffer cell management;
--- when urgent or event message is sent, it is empty to allocate data filling to be sent in advance any logic in queue
Between (1~32), flow message send when, will data to be sent address filling cache management register in;
--- scheduling is then completed message sending according to priority configuration information by transmission scheduler.
B. message sink:
--- message sink is supported to emergency message transmit queue, event message transmit queue, flow message transmit queue three
The configuration of kind type of service queue;
--- wherein emergency message and event message reception queue maximum support 512 buffer cell management, and flow message connects
It receives queue maximum and supports 32 buffer cell management.All message ids share the memory space in same type queue;
--- when urgent or event message reception, logic can arrive the data of same type according to received sequencing storage
In currently available logic unit, user's access evidence is reinformed;
--- when flow message receives, logic will receive complete data, store according to sequencing to currently available
In logic unit, user's access evidence is reinformed.
Claims (2)
1. a kind of FC_AE_ASM network protocol processing engine circuit characterized by comprising FC_AE_ASM message processing module (1),
Host interface module (2), FC-2 processing module (3), time synchronization module (4), register access interface module (5);
FC_AE_ASM message processing module (1): carrying out transmitting-receiving scheduling according to network data message type, every kind of data type
Transmitting-receiving uses page management approach, and data carry out tissue using ASM format, passes through register access interface module (5) realization pair
The configuration management of ASM message;
Host interface module (2): access of the host to FC_AE_ASM message processing module (1) internal resource, FC_AE_ are realized
The DMA of host memory is visited in interruption and FC_AE_ASM message processing module (1) of the ASM message processing module (1) to host
It asks;
FC-2 processing module (3): realizing will be through FC_AE_ASM message processing module (1) treated message groups are woven to FC frame hair
It send to FC network;The reception of FC frame is completed, and submits to FC_AE_ASM message processing module (1) processing;
Time synchronization module (4): when realizing local devices RTC clock, global task system RTC clock and global network calendar
Between;
Register access interface module (5): the interface to FC-ASM protocol process module internal resource access control is provided.
2. a kind of FC_AE_ASM network protocol processing engine circuit as described in claim 1, which is characterized in that FC_AE_ASM message
For processing module (1) using service queue type dispatch mode is based on, messaging flow is as follows:
A. message is sent:
--- message, which is sent, to be supported to three kinds of emergency message transmit queue, event message transmit queue, flow message transmit queue industry
The configuration of service type queue;
--- it is wherein tightly that message and event message transmit queue maximum support 32 buffer cell management, flow message transmit queue
Maximum supports 16 buffer cell management;
--- when urgent or event message is sent, allocate data filling to be sent in advance any logical space (1 in queue
It~32), will be in the address filling cache management register of data to be sent when, flow message is sent;
--- scheduling is then completed message sending according to priority configuration information by transmission scheduler.
B. message sink:
--- message sink is supported to three kinds of emergency message transmit queue, event message transmit queue, flow message transmit queue industry
The configuration of service type queue;
--- wherein emergency message and event message reception queue maximum support 512 buffer cell management, and flow message receives team
Column are maximum to support 32 buffer cell management.All message ids share the memory space in same type queue;
--- when urgent or event message reception, logic can store the data of same type to current according to received sequencing
In available logic unit, user's access evidence is reinformed;
--- when flow message receives, logic will receive complete data, according to sequencing storage to currently available logic
In unit, user's access evidence is reinformed.
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Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101795266A (en) * | 2009-12-31 | 2010-08-04 | 中国航空工业集团公司第六三一研究所 | Avionics any source multicast (ASM) protocol controller |
CN102201978A (en) * | 2011-03-21 | 2011-09-28 | 北京航空航天大学 | Avionics fiber channel network multiprotocol controller and controlling method thereof |
EP2523117A1 (en) * | 2011-05-11 | 2012-11-14 | Telefonaktiebolaget L M Ericsson (publ) | Interface module for HW block |
CN105515673A (en) * | 2015-11-27 | 2016-04-20 | 中国航空工业集团公司沈阳飞机设计研究所 | Optical fiber channel node card |
CN108614756A (en) * | 2016-12-12 | 2018-10-02 | 中国航空工业集团公司西安航空计算技术研究所 | FC-AE-ASM protocol processing chips with temp monitoring function |
CN108614800A (en) * | 2016-12-12 | 2018-10-02 | 中国航空工业集团公司西安航空计算技术研究所 | FC-AE-ASM protocol processing chip circuit structures |
-
2018
- 2018-12-12 CN CN201811523231.5A patent/CN109684101B/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101795266A (en) * | 2009-12-31 | 2010-08-04 | 中国航空工业集团公司第六三一研究所 | Avionics any source multicast (ASM) protocol controller |
CN102201978A (en) * | 2011-03-21 | 2011-09-28 | 北京航空航天大学 | Avionics fiber channel network multiprotocol controller and controlling method thereof |
EP2523117A1 (en) * | 2011-05-11 | 2012-11-14 | Telefonaktiebolaget L M Ericsson (publ) | Interface module for HW block |
CN105515673A (en) * | 2015-11-27 | 2016-04-20 | 中国航空工业集团公司沈阳飞机设计研究所 | Optical fiber channel node card |
CN108614756A (en) * | 2016-12-12 | 2018-10-02 | 中国航空工业集团公司西安航空计算技术研究所 | FC-AE-ASM protocol processing chips with temp monitoring function |
CN108614800A (en) * | 2016-12-12 | 2018-10-02 | 中国航空工业集团公司西安航空计算技术研究所 | FC-AE-ASM protocol processing chip circuit structures |
Non-Patent Citations (3)
Title |
---|
BIN LIU: "Modeling and Performance Analysis of FC-AE-ASM Which Base on PETRI Net Theory", 《2010 INTERNATIONAL CONFERENCE ON COMPUTATIONAL INTELLIGENCE AND SOFTWARE ENGINEERING》 * |
李攀: "FC协议处理芯片设计与实现", 《电子技术应用》 * |
李攀等: "FC-AE-ASM协议优化设计", 《计算机工程与科学》 * |
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