CN109660220A - Amplifier output signal clamp voltage control circuit - Google Patents
Amplifier output signal clamp voltage control circuit Download PDFInfo
- Publication number
- CN109660220A CN109660220A CN201811554299.XA CN201811554299A CN109660220A CN 109660220 A CN109660220 A CN 109660220A CN 201811554299 A CN201811554299 A CN 201811554299A CN 109660220 A CN109660220 A CN 109660220A
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- China
- Prior art keywords
- output signal
- amplifier
- comparator
- voltage
- clamper
- Prior art date
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- 230000005284 excitation Effects 0.000 claims abstract description 10
- 230000005611 electricity Effects 0.000 claims description 5
- 230000003321 amplification Effects 0.000 claims 1
- 238000003199 nucleic acid amplification method Methods 0.000 claims 1
- 238000005516 engineering process Methods 0.000 abstract description 6
- 239000004065 semiconductor Substances 0.000 abstract description 3
- 238000000034 method Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000035800 maturation Effects 0.000 description 1
- 238000005086 pumping Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
Abstract
The present invention relates to the voltage clamping technologies in semiconductor field, it discloses a kind of amplifier output signal clamp voltage control circuits, it solves the problem of noise jamming can be caused to influence signal integrity and stability lower than the part of reference voltage signal present in traditional technology.The circuit includes: clamper excitation generation module and output signal short block；The clamper excitation generation module, when the output signal of amplifier is more than clamper reference voltage range, generates clamp control signals for being compared according to the output signal of amplifier with the clamper reference voltage range of setting；The output signal short block guarantees that the output signal of amplifier controls in the range of needs for carrying out clamper by the load that control reduces amplifier when receiving clamp control signals come the output signal to amplifier.
Description
Technical field
The present invention relates to the voltage clamping technologies in semiconductor field, and in particular to a kind of amplifier output signal clamper electricity
Press control circuit.
Background technique
Since chip is work on whole PCB system, since present many chips are all inputted using low-voltage, have
The output voltage range of possible prime chip has been more than the acceptable input voltage range of rear class chip, causes rear class chip mistake
Pressure, influences security of system.Therefore, the chip for being made by high voltage technique, it is necessary to consider the voltage range of output.And
It is the effective means of the voltage range of limitation output using voltage clamping control.
In analog semiconductor integrated circuit design, amplifier is a basic device, generallys use domestic maturation
CMOS technology is designed.It uses the built-in function of clipping control unit control amplifier itself to limit the defeated of amplifier
Voltage range out, in this way, the signal that can be normally not above reference voltage range to amplifier causes serious noise jamming, shadow
Ring the integrity and stability of signal.
Summary of the invention
The technical problems to be solved by the present invention are: proposing a kind of amplifier output signal clamp voltage control circuit, solve
Certainly noise jamming can be caused lower than the part of reference voltage to signal present in traditional technology, influence signal integrity and stabilization
The problem of property.
The technical proposal adopted by the invention to solve the above technical problems is that:
Amplifier output signal clamp voltage control circuit, comprising: clamper motivates generation module and output signal short circuit mould
Block；The clamper excitation generation module according to the output signal of amplifier and the clamper reference voltage range of setting for being compared
Compared with, when the output signal of amplifier is more than clamper reference voltage range, generation clamp control signals；The output signal short circuit
Module by the load that control reduces amplifier when receiving clamp control signals come the output signal to amplifier for being carried out
Clamper guarantees that the output signal of amplifier controls in the range of needs.
As advanced optimizing, the amplifier is fully-differential amplifier, and there are two input terminal and two output ends for tool.
As advanced optimizing, the clamper excitation generation module include: first comparator, the second comparator and or
Door；One input terminal of the first comparator and an input terminal of the second comparator are connected, and connect the output of amplifier
Signal；Another input terminal of the first comparator and another input terminal of the second comparator are separately connected one compared with Gao Ji
Quasi- voltage and a lower reference voltage；The first comparator is connected with the output end of the second comparator or the input terminal of door；
The output signal short block includes: transistor and resistance；The transistor and resistor coupled in parallel are in amplifier
Between two output ends, the grid connection of transistor or the output signal of door.
As advanced optimizing, the transistor is NMOS transistor.
As advanced optimizing, the upper reference voltage is the voltage signal for being higher than 1/2 power supply, lower benchmark electricity
Pressure is lower than the voltage signal of 1/2 power supply for one, and voltage center of the two based on 1/2 power supply is symmetrical.
As advanced optimizing, the upper reference voltage and lower reference voltage can be according to late-class circuit or the electricity of chip
Pressure demand configures.
As advanced optimizing, the first comparator is compared using NMOS as input difference transistor, described second
Device is using PMOS as input difference transistor.
The beneficial effects of the present invention are: the control circuit that the present invention designs can use two benchmark that other circuits generate
Voltage distinguishes the amplitude of amplifier output voltage, determines whether to need to carry out clamper to output signal, protecting
The input voltage of card rear class chip is not above the limiting voltage of setting, thereby may be ensured that the safety of system；Due to using
Reduce the load of amplifier in the output end of amplifier to carry out the mode of clamper control, does not directly control the interior of amplifier
Portion's method of operation, so that the signal before clamper will not be destroyed, to avoid influencing the integrity and stability of signal.
Detailed description of the invention
Fig. 1 is the structural schematic diagram that clamper motivates generation module；
Fig. 2 is the structural schematic diagram of output signal short block；
Fig. 3 is clamp signal slicing exemplary waveforms figure.
Specific embodiment
The present invention is directed to propose a kind of amplifier output signal clamp voltage control circuit, solves present in traditional technology
The problem of signal being caused noise jamming, influence signal integrity and stability lower than the part of reference voltage.In the present invention
Amplifier output signal clamp voltage control circuit, comprising: clamper motivates generation module and output signal short block；It is described
Clamper excitation generation module according to the output signal of amplifier with the clamper reference voltage range of setting for being compared, when putting
When the output signal of big device is more than clamper reference voltage range, clamp control signals are generated；The output signal short block is used
In carrying out clamper by the load that control reduces amplifier when receiving clamp control signals come the output signal to amplifier, protect
The output signal for demonstrate,proving amplifier controls in the range of needs.
The solution of the present invention is further described with reference to the accompanying drawings and embodiments:
In the present embodiment, the structure of the clamper excitation generation module is as shown in Figure 1, comprising: first comparator
COMPN, the second comparator COMPP and or door OR；An input terminal of the first comparator COMPN and the second comparator
An input terminal of COMPP is connected, and connects the output signal AMP_OUT of amplifier；The first comparator COMPN's is another
Another input terminal of a input terminal and the second comparator COMPP are separately connected a upper reference voltage VH and a lower base
Quasi- voltage VL；The input terminal of the connection of the output end of the first comparator COMPN and the second comparator COMPP or door OR；
The structure of shown output signal short block is as shown in Fig. 2, comprising: transistor M1 and resistance RL；The crystal
Pipe M1 and resistance RL is connected in parallel between two output ends of amplifier OP, and the amplifier is fully-differential amplifier, and there are two tools
Input terminal INN and INP, there are two output end OUTP and PUTN for tool；The grid of transistor M1 connects or the output signal PD of door OR.
In actual application, in the present embodiment use first comparator COMPN and the second comparator COMPP the two
Different types of comparator, comes more higher voltage signal and lower voltage signal, and first comparator COMPN uses NMOS
As differential input transistor, because NMOS transmission high voltage signal does not have the loss of signal；Second comparator COMPP uses PMOS
As differential input transistor, because PMOS transmission low voltage signal does not have the loss of signal.
First comparator COMPN and the second comparator COMPP receives the reference voltage VH generated from front chip circuit
And VL, wherein VH is the voltage signal for being higher than 1/2 power supply, and VL is the voltage signal for being lower than 1/2 power supply.VH and VL letter
Number voltage center based on 1/2 power supply is symmetrical, can guarantee that amplifier output signal will not generate offset in this way.Also, VH and
VL voltage can be configured to a kind of state of adjustable-voltage difference size, can satisfy the actual demand of rear class chip in this way.
Controlled amplifier OP is received in another input port of first comparator COMPN and the second comparator COMPP
Output voltage, can thus check whether the output voltage of amplifier OP big by comparator and reference voltage VH and VL
In the voltage difference range of VH and VL.If the output voltage of amplifier OP has been more than the voltage difference range of VH and VL, compare
The output of device will be drawn high, and export the two pumping signals of P1 and P2.Here unilateral more than VH and VL in signal in order to guarantee
Voltage difference range when comparator also can correct output drive signal, use upper and lower two comparators, that is, P1 and P2 number
Signal can or the synthesis of door OR under finally generate PD signal required for late-class circuit.PD signal be P1 and P2 logic or under
Composite signal, as long as PD signal can also be got higher when that is, any one of P1 and P2 signal are got higher.Output is ensured that in this way
Signal has and also can correctly generate clamp signal when larger displacement, to guarantee the voltage signal of output in the range of needs.
After clamper excitation generation module generates correct PD signal, output signal short block will receive PD signal pair
The output voltage of amplifier is controlled, and PD signal is connected in NMOS transistor M1 grid G, and amplifier here is one complete
Difference amplifier, it has input signal INN and INP, output signal OUTN and OUTP, the source level S and drain D of NMOS transistor M1
It is connected on the output port OUTN and OUTP of amplifier.In chip application of the invention, the output port of amplifier
It can external one about 500 ohm to 1000 ohm of load resistance RL.Because load resistance RL is bigger, amplifier is not
King-sized driving capability is needed to ensure that signal integrity of the signal in power range.During clamper, PD
Signal can allow NMOS transistor M1 to open, and thus be directly changed the payload size of amplifier OP, because short-circuit amplifier is negative
Carry the parallel resistance size of the internal resistance and RL resistance that have reformed into NMOS.The transistor size of NMOS is designed to compare in invention
As soon as biggish value, the internal resistance of such NMOS transistor is very small, and the final load of amplifier is significant to be reduced.Amplify in this way
The driving capability of device is set in a relatively low level, so output loading is significantly reduced, then amplifier OP
It just has no ability to that output signal is allowed to keep integrality.Signal just produces slicing as shown in figure 3, such waveform is achieved that this
The purpose of the final clamper output signal of invention.
As shown in figure 3, waveform becomes one from sinusoidal signal variation when signal reaches the position for needing clamp voltage
Straight line, ensure that signal does not exceed the voltage of VH.Similarly, near VL, voltage can also change as straight line, guarantee
Voltage is not less than VL.There are VH and VL, the voltage range of output signal is just by between limitation VH and VL.Here
VH and VL can flexibly be configured to different voltage difference ranges, can need to change clamper electricity according to late-class circuit or chip
Press the size of range.
Claims (7)
1. amplifier output signal clamp voltage control circuit, which is characterized in that
It include: clamper excitation generation module and output signal short block；The clamper excitation generation module is used for according to amplification
The output signal of device is compared with the clamper reference voltage range of setting, when the output signal of amplifier is more than clamper benchmark electricity
When pressing range, clamp control signals are generated；The output signal short block is for passing through control when receiving clamp control signals
The load that system reduces amplifier to carry out clamper to the output signal of amplifier, guarantees that the output signal control of amplifier is needing
In the range of.
2. amplifier output signal clamp voltage control circuit as described in claim 1, which is characterized in that the amplifier is
Fully-differential amplifier, there are two input terminal and two output ends for tool.
3. amplifier output signal clamp voltage control circuit as claimed in claim 2, which is characterized in that
The clamper excitation generation module includes: first comparator, the second comparator and or door；The one of the first comparator
One input terminal of a input terminal and the second comparator is connected, and connects the output signal of amplifier；The first comparator
Another input terminal of another input terminal and the second comparator is separately connected a upper reference voltage and a lower benchmark
Voltage；The first comparator is connected with the output end of the second comparator or the input terminal of door；
The output signal short block includes: transistor and resistance；Two in amplifier of the transistor and resistor coupled in parallel
Between output end, the grid connection of transistor or the output signal of door.
4. amplifier output signal clamp voltage control circuit as claimed in claim 3, which is characterized in that
The transistor is NMOS transistor.
5. amplifier output signal clamp voltage control circuit as claimed in claim 3, which is characterized in that
For the first comparator using NMOS as input difference transistor, second comparator is poor as inputting using PMOS
Divide transistor.
6. amplifier output signal clamp voltage control circuit as described in claim 1, which is characterized in that
The upper reference voltage is the voltage signal for being higher than 1/2 power supply, and lower reference voltage is one and is lower than 1/2 power supply
Voltage signal, and voltage center of the two based on 1/2 power supply is symmetrical.
7. amplifier output signal clamp voltage control circuit as described in claim 1, which is characterized in that
The upper reference voltage and lower reference voltage can be configured according to the voltage requirements of late-class circuit or chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811554299.XA CN109660220A (en) | 2018-12-19 | 2018-12-19 | Amplifier output signal clamp voltage control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811554299.XA CN109660220A (en) | 2018-12-19 | 2018-12-19 | Amplifier output signal clamp voltage control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109660220A true CN109660220A (en) | 2019-04-19 |
Family
ID=66114915
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811554299.XA Pending CN109660220A (en) | 2018-12-19 | 2018-12-19 | Amplifier output signal clamp voltage control circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109660220A (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1691966A (en) * | 2002-08-07 | 2005-11-02 | 通达商业集团国际公司 | Nonthermal plasma air treatment system |
| CN101237137A (en) * | 2007-01-30 | 2008-08-06 | 鸿富锦精密工业（深圳）有限公司 | Over voltage and under-voltage device |
| CN102195578A (en) * | 2010-03-09 | 2011-09-21 | 联咏科技股份有限公司 | Output buffer circuit and method capable of inhibiting voltage overshoot |
| CN202949210U (en) * | 2012-11-23 | 2013-05-22 | 黄柄皓 | Multi-functional residual-current circuit breaker |
| CN105278604A (en) * | 2015-10-28 | 2016-01-27 | 苏州锴威特半导体有限公司 | Full voltage range multi-benchmark voltage synchronization adjustment circuit |
| CN106505981A (en) * | 2017-01-09 | 2017-03-15 | 上海胤祺集成电路有限公司 | Electrification reset circuit |
| CN107276587A (en) * | 2017-08-16 | 2017-10-20 | 电子科技大学 | A kind of pierce circuit with external sync function |
-
2018
- 2018-12-19 CN CN201811554299.XA patent/CN109660220A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1691966A (en) * | 2002-08-07 | 2005-11-02 | 通达商业集团国际公司 | Nonthermal plasma air treatment system |
| CN101237137A (en) * | 2007-01-30 | 2008-08-06 | 鸿富锦精密工业（深圳）有限公司 | Over voltage and under-voltage device |
| CN102195578A (en) * | 2010-03-09 | 2011-09-21 | 联咏科技股份有限公司 | Output buffer circuit and method capable of inhibiting voltage overshoot |
| CN202949210U (en) * | 2012-11-23 | 2013-05-22 | 黄柄皓 | Multi-functional residual-current circuit breaker |
| CN105278604A (en) * | 2015-10-28 | 2016-01-27 | 苏州锴威特半导体有限公司 | Full voltage range multi-benchmark voltage synchronization adjustment circuit |
| CN106505981A (en) * | 2017-01-09 | 2017-03-15 | 上海胤祺集成电路有限公司 | Electrification reset circuit |
| CN107276587A (en) * | 2017-08-16 | 2017-10-20 | 电子科技大学 | A kind of pierce circuit with external sync function |
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Application publication date: 20190419 |
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| RJ01 | Rejection of invention patent application after publication |