CN109660001A - A kind of base station reserve battery automatic charging system - Google Patents
A kind of base station reserve battery automatic charging system Download PDFInfo
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- CN109660001A CN109660001A CN201910023411.5A CN201910023411A CN109660001A CN 109660001 A CN109660001 A CN 109660001A CN 201910023411 A CN201910023411 A CN 201910023411A CN 109660001 A CN109660001 A CN 109660001A
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Abstract
The invention discloses a kind of base station reserve battery automatic charging systems, it is characterised in that: including several charging modules being connected with different base station reserve battery, the bus interface being connected with each charging module, and the host computer being connected by bus with bus interface;The host computer also passes through RS232 bus and connect with charging module;The charging module includes single-chip microcontroller, output module, clock module, PWM module, memory module, RS232 bus module and A/D conversion module for being connected with single-chip microcontroller etc..The present invention detects the electricity of different base station reserve battery by multiple voltage detecting sensors respectively, signal uniform transmission is detected to bus interface, and by bus transfer to host computer, monitoring personnel can understand the electricity of each base station reserve battery by host computer in real time;Meanwhile charging module charges to reserve battery to control according to the information about power detected, high degree of automation can be good at the electricity for ensuring reserve battery.
Description
Technical field
The present invention relates to a kind of charging system, in particular to a kind of base station reserve battery automatic charging systems.
Background technique
With the development of communication network, communication base station is also more and more;In communication base station system, reserve battery is entire
The important component of communication base station system can be powered for entire base station system.As time goes by, reserve battery
Electricity can gradually decrease, therefore need to be monitored the electricity of battery during use, when the electricity of reserve battery
When too low, then need to charge to reserve battery.Traditional charging system can not accurate detection reserve battery residue electricity
Amount, and can not automatically be charged to reserve battery according to the result of detection, it is unable to satisfy the work requirements of base station.
Summary of the invention
It is an object of the invention to overcome traditional charging system can not accurate detection reserve battery remaining capacity, and
It can not automatically be charged to reserve battery according to the result of detection, be unable to satisfy the defect of the work requirements of base station, provide
A kind of base station reserve battery automatic charging system.
The purpose of the invention is achieved by the following technical solution: a kind of base station reserve battery automatic charging system, including with
The connected several charging modules of different base station reserve battery, the bus interface being connected with each charging module, by bus with
The host computer that bus interface is connected;The host computer also passes through RS232 bus and connect with charging module;The charging module packet
Include single-chip microcontroller, the output module being connected with single-chip microcontroller, clock module, PWM module, memory module, RS232 bus module with
And A/D conversion module, the signal conditioning module being connected with A/D conversion module, the voltage inspection being connected with signal conditioning module
Survey sensor, and the power supply module being connected with PWM module;The output module is connected with bus interface;RS232 bus mould
Block is connected by RS232 bus with host computer.
Further, there are the bus interface 4 tunnels to receive data path and 4 road output data path channels, institute
It states 4 tunnels and receives the tantalum capacitor C for being serially connected with that capacitance is 35pF on data path;The output module and reception data path
Channel is connected.
The bus interface includes signal modulation module, FPGA module, clock module, DSP module, RAM module, and microcomputer connects
Mouth mold block, address register and signal demodulation module;
Signal demodulation module: for receiving the detection signal of the reception data path input, and it will test signal
It is converted into the TTL signal of 5V, and is exported in the form of serial digital signal to FPGA module;
FPGA module: for being decoded to TTL signal, receiving caching process, and DSP module is transferred data to;Together
When receive the data of DSP module transmission, and data are packaged, under timing control, the data after group packet are sent to letter
Number modulation module;
Clock module: for timing to be arranged to FPGA module, FPGA is made to transmit a signal to signal modulation mould according to timing
Block;
DSP module: it is programmable, for being returned after modifying, delete to the signal that FPGA module exports, strengthening
To FPGA module, and controllable FPGA module work;
RAM module: for the communication module of DSP module and peripheral hosts, the peripheral hosts data to be sent can be kept in;
Microcomputer interface: for the messenger interface of RAM module and peripheral hosts;
Address register: for saving the address information for the internal storage location that peripheral hosts are accessed;
Signal modulation module: the TTL signal for transmitting FPGA is converted to digital signal, and according to the control of FPGA module
Signal processed sends digital signal in the output data path channel of setting.
The power supply module includes the control of power circuit and the signal control power supply circuit conducting according to PWM module output
Circuit.
The control circuit includes photoelectrical coupler U2, the first output end phase of the triode pole Q3, N and photoelectrical coupler U2
The diode D6 that connection, the pole P are connected with the second output terminal of photoelectrical coupler U2, is serially connected in the pole N and three poles of diode D6
The resistance pole R20, P between the base stage of pipe Q3 is connected with the collector of triode Q3, the pole N meets the diode D7 of power supply, with two
The relay K that pole pipe D7 is in parallel;The pole P of the diode D6 is grounded, the second input end grounding of photoelectrical coupler U2, its
One input terminal and the output end of PWM module connect;The control circuit is electric electric to control power supply with power loss by obtaining for relay K
The conducting and cut-off on road.
The power circuit includes transformer T, diode rectifier U1, triode Q1, triode Q2, unidirectional thyristor
VT1, unidirectional thyristor VT2, the capacitor C6 being serially connected between the positive output end and negative output terminal of diode rectifier U1, one end with
The electricity that the collector of triode Q1 is connected, the other end is connected after resistance R14 with the negative output terminal of diode rectifier U1
Hold C7, one end is connected with the base stage of triode Q1, the other end after the normally opened contact K-1 of relay K with diode rectifier
The resistance pole R15, N that the negative output terminal of U1 is connected is connected with the tie point of capacitor C7 and resistance R14, the pole P and triode Q2
The zener diode D2 that is connected of base stage, the resistance being serially connected between the emitter of triode Q1 and the emitter of triode Q2
The diode D3 that the pole R16, P is connected with the emitter of triode Q2, the pole N is connected with the control electrode of unidirectional thyristor VT1, string
The resistance R17 between the pole N of diode D3 and the emitter of triode Q1 is met, the pole N and the list of unidirectional thyristor VT1 are serially connected in
Resistance R18 between the control electrode of thyristor VT2, the resistance being serially connected between the pole N of unidirectional thyristor VT2 and control electrode
The pressure stabilizing that the pole R19 and N is connected with the control electrode of unidirectional thyristor VT2, the pole P is connected with the pole P of unidirectional thyristor VT1
Diode D5;The pole P of the unidirectional thyristor VT2 is connected with the pole N of unidirectional thyristor VT1, and the pole N is as circuit output
End;The collector of the triode Q1 is connected with the positive output end of diode rectifier U1, emitter and unidirectional thyristor
The pole N of VT1 is connected;The ground connection while collector of the triode Q2 is connected with the pole P of unidirectional thyristor VT1;It is described
The negative output terminal of diode rectifier U1 is connected with the collector of triode Q2;The secondary inductance of the diode rectifier U1
The Same Name of Ends and non-same polarity of coil are connected with the input terminal of diode rectifier U1, and primary side inductance coil is then used as electricity
Source input terminal.
The signal conditioning module includes amplifier P1, and amplifier P2, amplifier P3, one end is connected, separately with the cathode of amplifier P1
The resistance R1 that one end is connected after resistance R2 with the anode of amplifier P1, one end is connected with the anode of amplifier P1, another termination
The capacitor C1 on ground, the resistance R3 being serially connected between the cathode and output end of amplifier P1 are serially connected in the output end and amplifier of amplifier P1
Resistance R6 between the anode of P2, the resistance R5 being serially connected between the cathode of amplifier P3 and the cathode of amplifier P2, with resistance R5 phase
Capacitor C2 in parallel, the resistance R7 being serially connected between the cathode and output end of amplifier P2 are serially connected in cathode and the output of amplifier P3
Resistance R8 between end, the resistance R4 that one end is connected with the anode of amplifier P3, the other end is connected with voltage detecting sensor,
And circuit is followed with what the output end of the output end of amplifier P3 and amplifier P2 was connected simultaneously;The company of the resistance R1 and resistance R2
Contact is connected with voltage detecting sensor;It is described that circuit output end is followed to be connected with A/D conversion module.
Described to follow circuit include amplifier P5, amplifier P4, is serially connected between the output end of amplifier P3 and the cathode of amplifier P5
The resistance pole R9, N be connected with the anode of amplifier P5, the diode D1 that the pole P is connected with the output end of amplifier P2, be serially connected in fortune
The resistance R12 between the cathode of P5 and output end is put, the capacitor C4 being in parallel with resistance R12, the positive phase of one end and amplifier P5
Connection, the other end are sequentially followed by the capacitor C3 of power supply, the company of one end and resistance R11 and resistance R10 through resistance R11 and resistance R10
The capacitor C5 and one end that contact is connected, the other end is connected with the output end of amplifier P4 are connected with the output end of amplifier P5
It connects, the resistance R13 that the other end is connected with A/D conversion module;The connection of the anode and capacitor C3 and resistance R11 of the amplifier P4
Point is connected, and cathode is connected with output end.
The present invention compared with the prior art, have the following advantages that and the utility model has the advantages that
(1) present invention detects the electricity of different base station reserve battery, detection letter by multiple voltage detecting sensors respectively
To bus interface, and by bus transfer to host computer, monitoring personnel can be understood respectively in real time by host computer for number uniform transmission
The electricity of a base station reserve battery;Meanwhile charging module fills reserve battery to control according to the information about power detected
Electricity, high degree of automation can be good at the electricity for ensuring reserve battery.
(2) bus interface of the invention has good interference free performance, it can be ensured that detection signal is in transmission process
Precision, the signal for receiving host computer is more acurrate.
Detailed description of the invention
Fig. 1 is overall structure diagram of the invention.
Fig. 2 is the structure chart of charging module of the invention.
Fig. 3 is the structure chart of bus interface of the invention.
Fig. 4 is the circuit structure diagram of power supply module of the invention.
Fig. 5 is the circuit structure diagram of signal conditioning module of the invention.
Fig. 6 be detection signal of the invention before amplification with amplified relational graph.
Specific embodiment
The present invention is described in further detail below with reference to embodiment, but embodiments of the present invention are not limited to
This.
Embodiment
As shown in Figure 1, 2, base station reserve battery automatic charging system of the invention, including connect with different base station reserve battery
Several charging modules connect, the bus interface being connected with each charging module are connected by bus with bus interface upper
Position machine;The host computer also passes through RS232 bus and connect with charging module.
The charging module is used to detect the electricity of base station reserve battery, and is carried out according to the signal detected to reserve battery
Charging.The present embodiment detects the electricity of 4 base station reserve batteries by 4 charging modules respectively, and to corresponding reserve battery
It charges.In addition, the electric quantity signal that charging module detects then uniformly is sent to bus interface, and will test by bus
The electric quantity signal of each base station backup power source be sent to host computer, monitoring personnel can be appreciated that each base station is standby by host computer
With the electricity of power supply, and by host computer can also manual control reserve battery charging process.
Specifically, the charging module includes single-chip microcontroller, output module, clock module, the PWM mould being connected with single-chip microcontroller
Block, memory module, RS232 bus module and A/D conversion module, the signal conditioning module being connected with A/D conversion module, with
The voltage detecting sensor that signal conditioning module is connected, and the power supply module being connected with PWM module;The output module
It is connected with bus interface;RS232 bus module is connected by RS232 bus with host computer.
The voltage detecting sensor is used to detect the electricity of base station reserve battery, and exports corresponding analog signal to signal
Conditioning module.A/D conversion module is given in output after signal conditioning module handles detection signal, will be believed by A/D conversion module
Number being converted to digital signal exports to single-chip microcontroller.Single-chip microcontroller then will test signal and be exported to bus interface, together by output module
When the electricity of reserve battery that will test of single-chip microcontroller and memory module in the charge value that sets be compared, when reserve battery
When electricity is less than setting charge value, single-chip microcontroller then outputs signal to PWM module, and PWM module then controls power supply module to standby electricity
Pond charging;Clock module for the charging time to be arranged, when charging between arrive after, single-chip microcontroller then stops giving PWM module output signal.
Meanwhile by RS232 bus, staff can export to PWM module and believe from PC control single-chip microcontroller, i.e. control single chip computer
Number, to realize that staff passes through the charging process of PC control reserve battery.
Further, as shown in figure 3, there are the bus interface 4 tunnels to receive data path and 4 tunnel output data roads
Diameter channel, each charging module correspondence receive data path all the way, and 4 charging modules will test signal and be aggregated into always
Line interface.
In addition, 4 tunnel receives the tantalum capacitor C for being serially connected with that capacitance is 35pF on data path, pass through tantalum electricity
The effect for holding C, can be improved the interference free performance of the bus interface.
Specifically, the bus interface includes signal modulation module, and FPGA module, clock module, DSP module, RAM module,
Microcomputer interface module, address register and signal demodulation module.
Wherein, it signal demodulation module: for receiving the detection signal of the reception data path input, and will test
Signal is converted into the TTL signal of 5V, and is exported in the form of serial digital signal to FPGA module.
FPGA module: for being decoded to TTL signal, receiving caching process, and DSP module is transferred data to;Together
When receive the data of DSP module transmission, and data are packaged, under timing control, the data after group packet are sent to letter
Number modulation module.
The FPGA module includes receiving portion and transmitting portion.Wherein, the effect of receiving portion is to pass through FPGA module
Internal serial/parallel conversion module converts serial data into 32 bit parallel datas, and passes through the sampling burr inside FPGA module
It filters out module and Error Control is carried out automatically to the data received, to improve the accuracy of digital massage transmission;Meanwhile FPGA module
Internal word interval decision logic module then can be carried out automatic detection to mistakes such as the word interval of data, bit interval errors, if inspection
Inerrancy is surveyed, then is sent data to DSP module, for reading.
The effect of transmitting portion is waited pending in the fifo module that the data for being sent into DSP module are temporarily stored in inside FPGA
It loses one's life order.When being connected to the clock control instruction of external clock module transmission, fifo module output data, and pass through FPGA mould
Parallel/serial conversion module inside block converts parallel data into serial data, while passing through the frequency division counter inside FPGA module
After preset word interval is added in device and word interval generator block, the data group packet module that is sent to inside FPGA module.
After data group packet module packages data, and under the control of the clock signal of clock module, after group packet
Data are sent to signal modulation module.
Clock module: for timing to be arranged to FPGA module, FPGA is made to transmit a signal to signal modulation mould according to timing
Block.
DSP module: it is programmable, for being returned after modifying, delete to the signal that FPGA module exports, strengthening
To FPGA module, and controllable FPGA module work.
RAM module: for the communication module of DSP module and peripheral hosts, the peripheral hosts data to be sent can be kept in.
Microcomputer interface: for the messenger interface of RAM module and peripheral hosts.DSP module is compiled by peripheral hosts
Process control.
Address register: for saving the address information for the internal storage location that peripheral hosts are accessed.
Signal modulation module: the TTL signal for transmitting FPGA is converted to digital signal, and data path will out
Signal output.
As shown in figure 5, the signal conditioning module includes amplifier P1, amplifier P2, amplifier P3, resistance R1, resistance R2, resistance
R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, capacitor C1, capacitor C2 and follow circuit.
Wherein, one end of resistance R1 be connected with the cathode of amplifier P1, anode of the other end after resistance R2 with amplifier P1
It is connected.One end of capacitor C1 is connected with the anode of amplifier P1, the other end is grounded.Resistance R3 be serially connected in amplifier P1 cathode and
Between output end.Resistance R6 is serially connected between the output end of amplifier P1 and the anode of amplifier P2.Resistance R5 is serially connected in amplifier P3's
Between cathode and the cathode of amplifier P2.Capacitor C2 is in parallel with resistance R5.Resistance R7 is serially connected in the cathode and output end of amplifier P2
Between.Resistance R8 is serially connected between the cathode and output end of amplifier P3.One end of resistance R4 is connected, separately with the anode of amplifier P3
One end is connected with voltage detecting sensor.Circuit is followed to be connected simultaneously with the output end of the output end of amplifier P3 and amplifier P2.
The tie point of the resistance R1 and resistance R2 is connected with voltage detecting sensor;It is described that circuit output end and A/D is followed to convert
Module is connected.
Wherein, filter is collectively formed in amplifier P1, resistance R1, resistance R2, resistance R3 and capacitor C1;Resistance R1
Resistance value be 560 Ω, the resistance value of resistance R2 is 1K Ω, and the resistance value of resistance R3 is 100K Ω, and the capacitance of capacitor C1 is 27 μ F, amplifier
The model LM307 of P1.
The resistance value of resistance R6 is 4.7K Ω, and the resistance value of resistance R7 is 47K Ω, and the resistance value of resistance R5 is 10K Ω, resistance R8's
Resistance value is 47K Ω, and the resistance value of resistance R4 is 4.7K Ω, and the capacitance of capacitor C2 is that the model of 27 μ F, amplifier P2 and amplifier P3 are
LM107。
In addition, it includes amplifier P5, amplifier P4, resistance R9, diode D1, resistance R10, resistance R11, resistance that this, which follows circuit,
R12, resistance R13, capacitor C3, capacitor C4.
Resistance R9 is serially connected between the output end of amplifier P3 and the cathode of amplifier P5.The pole N of diode D1 and amplifier P5
Anode be connected, the pole P is connected with the output end of amplifier P2.Resistance R12 is serially connected between the cathode and output end of amplifier P5.
Capacitor C4 is in parallel with resistance R12.One end of capacitor C3 is connected with the anode of amplifier P5, the other end sequentially through resistance R11 and
Resistance R10 is followed by power supply.One end of capacitor C5 is connected with the tie point of resistance R11 and resistance R10, the other end and amplifier P4
Output end is connected.One end of resistance R13 is connected with the output end of amplifier P5, the other end is connected with A/D conversion module.Institute
The anode for stating amplifier P4 is connected with the tie point of capacitor C3 and resistance R11, and cathode is connected with output end.
The resistance value of resistance R9~R11 is 10K Ω, and the resistance value of resistance R12 is 20K Ω, and the resistance value of resistance R13 is 1K
The capacitance of the model 1N4005 of Ω, diode D1, capacitor C3 are 788pF, and the capacitance of capacitor C4 is 0.1 μ F, the appearance of capacitor C5
Value is that the model of 0.3 μ F, amplifier P4 and amplifier P5 are LM107.
When work, the detection signal of voltage detecting sensor output is input to amplifier after resistance R1 and resistance R2 respectively
The detection signal of P1, i.e. voltage detecting sensor output is input in the filter, is filtered by capacitor C1 to detection signal
Wave processing, so that the noise interferences that voltage detecting sensor generates are filtered;Resistance R3 is the negative-feedback of amplifier P1
The stability of amplifier P1 can be improved in resistance.Detection signal after being filtered is exported from the output end of amplifier P1, and is passed through
Amplifier P2 is input to after resistance R6.The resistance R6, resistance R5, resistance R4, resistance R7, resistance R8, capacitor C2, amplifier P2 and fortune
It puts P3 and is then total to member's one pre-amplification circuit of formation;Amplifier P2 and amplifier P3 is set as homophase input, scaling circuit shape
Formula, therefore the impedance of circuit input is very high;The pre-amplification circuit uses symmetrical form, i.e. amplifier P3, resistance R4, resistance
R8 forms a link, and amplifier P2, resistance R7, resistance R6 then form another link, and two links form symmetric form, therefore
Drift, noise, offset voltage and offset current can be made to cancel out each other, to improve the stability of signal;It is defeated to detect signal
Enter after amplifying processing to amplifier P2 and amplifier P3, exports from the output end of amplifier P2 and amplifier P3 to following circuit;By
After pre-amplification circuit processing, the small-signal of voltage detecting sensor output is then amplified, and so that detection signal is met A/D and is turned
The acquisition requirement of block is changed the mold, as shown in fig. 6, signal and amplified signal after putting big processing of circuit before menstruation, before amplification
Relational graph.Detection signal is input to amplifier P5 after resistance R9 and diode D1 respectively;Amplifier P5, resistance R12 and capacitor C4
Then form follower;Meanwhile amplifier P4, capacitor C3, resistance R11, resistance R10 and capacitor C5 shaping filter, mistake herein
The filter is filtered detection signal in journey;Detection signal after treatment is input to A/D modulus of conversion after resistance R13
Block.A/D conversion module is transferred to single-chip microcontroller after converting to signal, single-chip microcontroller then will test signal and be exported by output module
To bus interface;Meanwhile the charge value set in the electricity of reserve battery that will test of single-chip microcontroller and memory module is compared
Right, when the electricity of reserve battery is less than setting charge value, single-chip microcontroller then outputs signal to PWM module, and PWM module then controls confession
Electric module charges to reserve battery.
In order to better line reserve battery charging, as shown in figure 4, the power supply module include power circuit and according to
The control circuit of the signal control power supply circuit conducting of PWM module output.
Specifically, the control circuit includes photoelectrical coupler U2, triode Q3, diode D6, diode D7, resistance R20,
Relay K.When connection, the pole N of diode D6 is connected with the first output end of photoelectrical coupler U2, the pole P and photoelectrical coupler
The second output terminal of U2 is connected.Resistance R20 is serially connected between the pole N of diode D6 and the base stage of triode Q3.Diode D7
The pole P be connected with the collector of triode Q3, the pole N connects 12V power supply.Relay K is in parallel with diode D7.The diode
The pole P of D6 is grounded, the output end connection of the second input end grounding, its first input end and PWM module of photoelectrical coupler U2.
The control circuit obtains electric and power loss by relay K's come the conducting and cut-off of controlling power circuit.The photoelectricity
The model of the model 4N25 of coupler U2, diode D6 and diode D7 are 1N4007, the model 8050 of triode Q3,
The resistance value of resistance R20 is 1K Ω.
In addition, the power circuit includes transformer T, diode rectifier U1, triode Q1, triode Q2, unidirectional crystalline substance lock
Pipe VT1, unidirectional thyristor VT2, the capacitor C6 being serially connected between the positive output end and negative output terminal of diode rectifier U1, one end
It is connected with the collector of triode Q1, the other end is connected after resistance R14 with the negative output terminal of diode rectifier U1
Capacitor C7, one end is connected with the base stage of triode Q1, the other end after the normally opened contact K-1 of relay K with diode rectification
The resistance pole R15, N that the negative output terminal of device U1 is connected is connected with the tie point of capacitor C7 and resistance R14, the pole P and triode
The zener diode D2 that the base stage of Q2 is connected, the electricity being serially connected between the emitter of triode Q1 and the emitter of triode Q2
R16, the diode D3 that the pole P is connected with the emitter of triode Q2, the pole N is connected with the control electrode of unidirectional thyristor VT1 are hindered,
The resistance R17 being serially connected between the pole N of diode D3 and the emitter of triode Q1, be serially connected in unidirectional thyristor VT1 the pole N and
Resistance R18 between the control electrode of unidirectional thyristor VT2, the resistance being serially connected between the pole N of unidirectional thyristor VT2 and control electrode
The pressure stabilizing that the pole R19 and N is connected with the control electrode of unidirectional thyristor VT2, the pole P is connected with the pole P of unidirectional thyristor VT1
Diode D5.
The pole P of unidirectional thyristor VT2 is connected with the pole N of unidirectional thyristor VT1, the pole N as circuit output end simultaneously
It is connected with the charging end of reserve battery.The collector of the triode Q1 is connected with the positive output end of diode rectifier U1
It connects, emitter is connected with the pole N of unidirectional thyristor VT1.The collector of the triode Q2 and the P of unidirectional thyristor VT1
Ground connection while pole is connected.The negative output terminal of the diode rectifier U1 is connected with the collector of triode Q2.It is described
The Same Name of Ends and non-same polarity of the secondary inductance coil of diode rectifier U1 are connected with the input terminal of diode rectifier U1
It connects, primary side inductance coil is then used as power input and connects 220V alternating current.
In the present embodiment, the capacitance of capacitor C6 is 4.7 μ F, and the capacitance of capacitor C7 is 100 μ F, and the resistance value of resistance R14 is
The resistance value of 5K Ω, resistance R15 are 2.2K Ω, and the resistance value of resistance R16 is 1K Ω, and the resistance value of resistance R17 is 1K Ω, resistance R18's
Resistance value is 680 Ω, and the resistance value of resistance R19 is that the model of 330 Ω, triode Q1 and triode Q2 are 9013, unidirectional thyristor
The model of the model 3CT5 of VT1 and unidirectional thyristor VT2, diode D3 and diode D4 are 1N4005, zener diode
The model 1N412 of D2.
When work, 220V alternating current exports 15V alternating current after transformer T transformation, and alternating current is whole through diode rectifier U1
Become direct current electricity output after stream, DC voltage becomes more smooth after capacitor C6 is filtered;Voltage is after resistance R14 simultaneously
Charge to capacitor C7, when the electricity of reserve battery is greater than the set value, single-chip microcontroller not to PWM module output signal, this
When control circuit be not turned on, the normally opened contact K-1 of relay K is remained open, and power circuit does not charge to reserve battery.
When the electricity of reserve battery is less than setting value, single-chip microcontroller outputs signal to PWM module, and PWM module then triggers letter
Number control circuit is given, the first input end of photoelectrical coupler U2 has a pwm signal input at this time, photoelectrical coupler U2 conducting, signal
The turn-on transistor Q3 after resistance R21 makes relay K obtain electric its normally opened contact K-1 closure.Voltage after normally opened contact K-1 closure
It is added to the base stage of triode Q1 through resistance R15, triode Q1 is connected, while the voltage on capacitor C7 hits zener diode D2
Wear, so that triode Q2 be made to be connected, and then be also switched on unidirectional thyristor VT1 and unidirectional thyristor VT2, power circuit start to
Reserve battery charging.After reserve battery charging complete, due to the clamping action of zener diode D5, make the electricity on resistance R19
Reverse flow, unidirectional thyristor VT2 cut-off are flowed, reserve battery stops charging, prevents reserve battery from overcharging;It is arrived between when charging
Afterwards, single-chip microcontroller stops giving PWM module output signal, and power supply module stops working.
As described above, the present invention can be realized well.
Claims (8)
1. a kind of base station reserve battery automatic charging system, it is characterised in that: if including being connected with different base station reserve battery
Dry charging module, the bus interface being connected with each charging module, the host computer being connected by bus with bus interface;Institute
It states host computer and also passes through RS232 bus and connect with charging module;The charging module includes single-chip microcontroller, is connected with single-chip microcontroller
Output module, clock module, PWM module, memory module, RS232 bus module and A/D conversion module, with A/D modulus of conversion
The signal conditioning module that block is connected, the voltage detecting sensor being connected with signal conditioning module, and be connected with PWM module
The power supply module connect;The output module is connected with bus interface;RS232 bus module passes through RS232 bus and host computer phase
Even.
2. a kind of base station reserve battery automatic charging system according to claim 1, it is characterised in that: the bus interface
Data path and 4 road output data path channels are received with 4 tunnels, 4 tunnel receives to be concatenated on data path
Having capacitance is the tantalum capacitor C of 35pF;The output module is connected with data path is received.
3. a kind of base station reserve battery automatic charging system according to claim 2, it is characterised in that: the bus interface
Including signal modulation module, FPGA module, clock module, DSP module, RAM module, microcomputer interface module, address register with
And signal demodulation module;
Signal demodulation module: for receiving the detection signal of the reception data path input, and it will test signal conversion
It exports at the TTL signal of 5V, and in the form of serial digital signal to FPGA module;
FPGA module: for being decoded to TTL signal, receiving caching process, and DSP module is transferred data to;It connects simultaneously
The data of DSP module transmission are received, and data are packaged, under timing control, the data after group packet are sent to signal tune
Molding block;
Clock module: for timing to be arranged to FPGA module, FPGA is made to transmit a signal to signal modulation module according to timing;
DSP module: it is programmable, for being returned to after modifying, delete to the signal that FPGA module exports, strengthening
FPGA module, and controllable FPGA module work;
RAM module: for the communication module of DSP module and peripheral hosts, the peripheral hosts data to be sent can be kept in;
Microcomputer interface: for the messenger interface of RAM module and peripheral hosts;
Address register: for saving the address information for the internal storage location that peripheral hosts are accessed;
Signal modulation module: the TTL signal for transmitting FPGA is converted to digital signal, and is believed according to the control of FPGA module
Number send digital signal to the output data path channel of setting.
4. a kind of base station reserve battery automatic charging system according to claim 1, it is characterised in that: the power supply module
The control circuit of signal control power supply circuit conducting including power circuit and according to PWM module output.
5. a kind of base station reserve battery automatic charging system according to claim 4, it is characterised in that: the control circuit
Including photoelectrical coupler U2, the triode pole Q3, N is connected with the first output end of photoelectrical coupler U2, the pole P and photoelectrical coupler
The diode D6 that the second output terminal of U2 is connected, the resistance being serially connected between the pole N of diode D6 and the base stage of triode Q3
The pole R20, P is connected with the collector of triode Q3, the pole N meets the diode D7 of power supply, the relay being in parallel with diode D7
K;The pole P of the diode D6 is grounded, the second input end grounding of photoelectrical coupler U2, its first input end and PWM module
Output end connection;The control circuit obtains electric and power loss by relay K's come the conducting and cut-off of controlling power circuit.
6. a kind of base station reserve battery automatic charging system according to claim 5, it is characterised in that: the power circuit
Including transformer T, diode rectifier U1, triode Q1, triode Q2, unidirectional thyristor VT1, unidirectional thyristor VT2, concatenation
Capacitor C6 between the positive output end and negative output terminal of diode rectifier U1, one end are connected with the collector of triode Q1
It connects, the capacitor C7 that the other end is connected after resistance R14 with the negative output terminal of diode rectifier U1, one end is with triode Q1's
The electricity that base stage is connected, the other end is connected after the normally opened contact K-1 of relay K with the negative output terminal of diode rectifier U1
Hinder R15, two pole of pressure stabilizing that the pole N is connected with the tie point of capacitor C7 and resistance R14, the pole P is connected with the base stage of triode Q2
Pipe D2 is serially connected in the hair of the resistance pole R16, P and triode Q2 between the emitter of triode Q1 and the emitter of triode Q2
The diode D3 that emitter-base bandgap grading is connected, the pole N is connected with the control electrode of unidirectional thyristor VT1 is serially connected in the pole N and three of diode D3
Resistance R17 between the emitter of pole pipe Q1, be serially connected in unidirectional thyristor VT1 the pole N and unidirectional thyristor VT2 control electrode it
Between resistance R18, the pole resistance R19 and N and the unidirectional thyristor being serially connected between the pole N of unidirectional thyristor VT2 and control electrode
The zener diode D5 that the control electrode of VT2 is connected, the pole P is connected with the pole P of unidirectional thyristor VT1;The unidirectional thyristor
The pole P of VT2 is connected with the pole N of unidirectional thyristor VT1, and the pole N is as circuit output end;The collector of the triode Q1 with
The positive output end of diode rectifier U1 is connected, and emitter is connected with the pole N of unidirectional thyristor VT1;The triode
The ground connection while collector of Q2 is connected with the pole P of unidirectional thyristor VT1;The negative output terminal of the diode rectifier U1 with
The collector of triode Q2 is connected;The Same Name of Ends and non-same polarity of the secondary inductance coil of the diode rectifier U1 with
The input terminal of diode rectifier U1 is connected, and primary side inductance coil is then used as power input.
7. a kind of base station reserve battery automatic charging system according to claim 1, it is characterised in that: the signal condition
Module includes amplifier P1, amplifier P2, amplifier P3, one end is connected with the cathode of amplifier P1, the other end after resistance R2 with amplifier
The resistance R1 that the anode of P1 is connected, the capacitor C1 that one end is connected with the anode of amplifier P1, the other end is grounded, is serially connected in amplifier
Resistance R3 between the cathode and output end of P1, the resistance R6 being serially connected between the output end of amplifier P1 and the anode of amplifier P2,
The resistance R5 being serially connected between the cathode of amplifier P3 and the cathode of amplifier P2, the capacitor C2 being in parallel with resistance R5, is serially connected in fortune
Put the resistance R7 between the cathode of P2 and output end, the resistance R8 being serially connected between the cathode and output end of amplifier P3, one end with
The resistance R4 that the anode of amplifier P3 is connected, the other end is connected with voltage detecting sensor, and it is defeated with amplifier P3 simultaneously
Outlet follows circuit with what the output end of amplifier P2 was connected;The tie point and voltage detecting sensor of the resistance R1 and resistance R2
It is connected;It is described that circuit output end is followed to be connected with A/D conversion module.
8. a kind of base station reserve battery automatic charging system according to claim 7, it is characterised in that: described to follow circuit
The resistance pole R9, N being serially connected between the output end of amplifier P3 and the cathode of amplifier P5 including amplifier P5, amplifier P4 and amplifier P5
Anode be connected, the diode D1 that the pole P is connected with the output end of amplifier P2, be serially connected in amplifier P5 cathode and output end it
Between resistance R12, the capacitor C4 being in parallel with resistance R12, one end is connected with the anode of amplifier P5, the other end is sequentially through resistance
R11 and resistance R10 is followed by the capacitor C3 of power supply, and one end is connected with the tie point of resistance R11 and resistance R10, the other end and fortune
Put capacitor C5 that the output end of P4 is connected and one end be connected with the output end of amplifier P5, the other end and A/D conversion module
The resistance R13 being connected;The anode of the amplifier P4 is connected with the tie point of capacitor C3 and resistance R11, cathode and output
End is connected.
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