CN109581226A - A kind of base station reserve battery on-line monitoring system - Google Patents
A kind of base station reserve battery on-line monitoring system Download PDFInfo
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- CN109581226A CN109581226A CN201910023417.2A CN201910023417A CN109581226A CN 109581226 A CN109581226 A CN 109581226A CN 201910023417 A CN201910023417 A CN 201910023417A CN 109581226 A CN109581226 A CN 109581226A
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Abstract
The invention discloses a kind of base station reserve battery on-line monitoring systems, it is characterized by comprising several detection modules for the discharge end that different base station reserve battery is arranged in, the bus interface being connected with each detection module, the host computer being connected by bus with bus interface；The detection module includes voltage detecting sensor, the signal conditioning module that the detection signal for exporting to voltage detecting sensor that is connected with voltage detecting sensor is handled, and the A/D conversion module being connected with signal conditioning module；The A/D conversion module is connected with bus interface.The present invention detects the electricity of different base station reserve battery by multiple voltage detecting sensors respectively, signal uniform transmission is detected to bus interface, and by bus transfer to host computer, monitoring personnel can understand the electricity of each base station reserve battery by host computer in real time, it is monitored without the electricity one by one to base station business battery, improves the efficiency of monitoring.
Description
Technical field
The present invention relates to a kind of monitoring system, in particular to a kind of base station reserve battery on-line monitoring systems.
Background technique
With the development of communication network, communication base station is also more and more；In communication base station system, reserve battery is entire
The important component of communication base station system can be powered for entire base station system.As time goes by, reserve battery
Electricity can gradually decrease, therefore need to be monitored the electricity of battery during use.Traditional monitoring method is
By being manually monitored, the method monitoring efficiency is low, monitoring accuracy is not high, is unable to satisfy demand.
Summary of the invention
It is an object of the invention to overcome the method for traditional monitoring base station reserve battery, monitoring efficiency is low, monitors
The not high defect of precision provides a kind of base station reserve battery on-line monitoring system.
The purpose of the invention is achieved by the following technical solution: a kind of base station reserve battery on-line monitoring system, including sets
Several detection modules in the discharge end of different base station reserve battery are set, the bus interface being connected with each detection module is led to
Cross the host computer that bus is connected with bus interface；The detection module includes voltage detecting sensor, is sensed with voltage detecting
Device is connected the signal conditioning module that the detection signal for exporting to voltage detecting sensor is handled, and with signal tune
The A/D conversion module that reason module is connected；The A/D conversion module is connected with bus interface.
Further, there are the bus interface 4 tunnels to receive data path and 4 road output data path channels, institute
It states 4 tunnels and receives the tantalum capacitor C for being serially connected with that capacitance is 35pF on data path.
The bus interface includes signal modulation module, FPGA module, clock module, DSP module, RAM module, and microcomputer connects
Mouth mold block, address register and signal demodulation module；
Signal demodulation module: for receiving the detection signal of the reception data path input, and it will test signal
It is converted into the TTL signal of 5V, and is exported in the form of serial digital signal to FPGA module；
FPGA module: for being decoded to TTL signal, receiving caching process, and DSP module is transferred data to；Together
When receive the data of DSP module transmission, and data are packaged, under timing control, the data after group packet are sent to letter
Number modulation module；
Clock module: for timing to be arranged to FPGA module, FPGA is made to transmit a signal to signal modulation mould according to timing
Block；
DSP module: it is programmable, for being returned after modifying, delete to the signal that FPGA module exports, strengthening
To FPGA module, and controllable FPGA module work；
RAM module: for the communication module of DSP module and peripheral hosts, the peripheral hosts data to be sent can be kept in；
Microcomputer interface: for the messenger interface of RAM module and peripheral hosts；
Address register: for saving the address information for the internal storage location that peripheral hosts are accessed；
Signal modulation module: the TTL signal for transmitting FPGA is converted to digital signal, and according to the control of FPGA module
Signal processed sends digital signal in the output data path channel of setting.
The signal conditioning module includes amplifier P1, and amplifier P2, amplifier P3, one end is connected, separately with the cathode of amplifier P1
The resistance R1 that one end is connected after resistance R2 with the anode of amplifier P1, one end is connected with the anode of amplifier P1, another termination
The capacitor C1 on ground, the resistance R3 being serially connected between the cathode and output end of amplifier P1 are serially connected in the output end and amplifier of amplifier P1
Resistance R6 between the anode of P2, the resistance R5 being serially connected between the cathode of amplifier P3 and the cathode of amplifier P2, with resistance R5 phase
Capacitor C2 in parallel, the resistance R7 being serially connected between the cathode and output end of amplifier P2 are serially connected in cathode and the output of amplifier P3
Resistance R8 between end, the resistance R4 that one end is connected with the anode of amplifier P3, the other end is connected with voltage detecting sensor,
And circuit is followed with what the output end of the output end of amplifier P3 and amplifier P2 was connected simultaneously；The company of the resistance R1 and resistance R2
Contact is connected with voltage detecting sensor；It is described that circuit output end is followed to be connected with A/D conversion module.
Described to follow circuit include amplifier P5, amplifier P4, is serially connected between the output end of amplifier P3 and the cathode of amplifier P5
The resistance pole R9, N be connected with the anode of amplifier P5, the diode D1 that the pole P is connected with the output end of amplifier P2, be serially connected in fortune
The resistance R12 between the cathode of P5 and output end is put, the capacitor C4 being in parallel with resistance R12, the positive phase of one end and amplifier P5
Connection, the other end are sequentially followed by the capacitor C3 of power supply, the company of one end and resistance R11 and resistance R10 through resistance R11 and resistance R10
The capacitor C5 and one end that contact is connected, the other end is connected with the output end of amplifier P4 are connected with the output end of amplifier P5
It connects, the resistance R13 that the other end is connected with A/D conversion module；The connection of the anode and capacitor C3 and resistance R11 of the amplifier P4
Point is connected, and cathode is connected with output end.
The present invention compared with the prior art, have the following advantages that and the utility model has the advantages that
(1) present invention detects the electricity of different base station reserve battery, detection letter by multiple voltage detecting sensors respectively
To bus interface, and by bus transfer to host computer, monitoring personnel can be understood respectively in real time by host computer for number uniform transmission
The electricity of a base station reserve battery is monitored without the electricity one by one to base station business battery, improves the effect of monitoring
Rate.
(2) bus interface of the invention has good interference free performance, it can be ensured that detection signal is in transmission process
Precision, and then improve base station reserve battery electric power detection precision.
Detailed description of the invention
Fig. 1 is overall structure diagram of the invention.
Fig. 2 is the structure chart of bus interface of the invention.
Fig. 3 is the circuit structure diagram of signal conditioning module of the invention.
Fig. 4 be detection signal of the invention before amplification with amplified relational graph.
Specific embodiment
The present invention is described in further detail below with reference to embodiment, but embodiments of the present invention are not limited to
This.
Embodiment
As shown in Figure 1, 2, base station reserve battery on-line monitoring system of the invention, including be arranged in different base station standby electricity
Several detection modules of the discharge end in pond, the bus interface being connected with each detection module pass through bus and bus interface phase
The host computer of connection.
The detection module is used to detect the electricity of base station reserve battery, and the present embodiment detects 4 by 4 detection modules respectively
The electricity of a base station reserve battery, the signal detected are then uniformly sent to bus interface, and will test by bus each
The electric quantity signal of a base station backup power source is sent to host computer, and monitoring personnel can be appreciated that each base station standby electricity by host computer
The electricity in source.
In addition, the detection module includes voltage detecting sensor, it is connected with voltage detecting sensor for being examined to voltage
The signal conditioning module that the detection signal of sensor output is handled is surveyed, and the A/D being connected with signal conditioning module turns
Change the mold block；The A/D conversion module is connected with bus interface.The voltage detecting sensor is used to detect the electricity of base station reserve battery
Amount, and corresponding analog signal is exported to signal conditioning module.
Further, there are the bus interface 4 tunnels to receive data path and 4 road output data path channels, often
One detection module correspondence receives data path all the way, and 4 detection modules will test signal and be aggregated into bus interface.
In addition, 4 tunnel receives the tantalum capacitor C for being serially connected with that capacitance is 35pF on data path, pass through tantalum electricity
The effect for holding C, can be improved the interference free performance of the bus interface.
Specifically, the bus interface includes signal modulation module, and FPGA module, clock module, DSP module, RAM module,
Microcomputer interface module, address register and signal demodulation module.
Wherein, it signal demodulation module: for receiving the detection signal of the reception data path input, and will test
Signal is converted into the TTL signal of 5V, and is exported in the form of serial digital signal to FPGA module.
FPGA module: for being decoded to TTL signal, receiving caching process, and DSP module is transferred data to；Together
When receive the data of DSP module transmission, and data are packaged, under timing control, the data after group packet are sent to letter
Number modulation module.
The FPGA module includes receiving portion and transmitting portion.Wherein, the effect of receiving portion is to pass through FPGA module
Internal serial/parallel conversion module converts serial data into 32 bit parallel datas, and passes through the sampling burr inside FPGA module
It filters out module and Error Control is carried out automatically to the data received, to improve the accuracy of digital massage transmission；Meanwhile FPGA module
Internal word interval decision logic module then can be carried out automatic detection to mistakes such as the word interval of data, bit interval errors, if inspection
Inerrancy is surveyed, then is sent data to DSP module, for reading.
The effect of transmitting portion is waited pending in the fifo module that the data for being sent into DSP module are temporarily stored in inside FPGA
It loses one's life order.When being connected to the clock control instruction of external clock module transmission, fifo module output data, and pass through FPGA mould
Parallel/serial conversion module inside block converts parallel data into serial data, while passing through the frequency division counter inside FPGA module
After preset word interval is added in device and word interval generator block, the data group packet module that is sent to inside FPGA module.
After data group packet module packages data, and under the control of the clock signal of clock module, after group packet
Data are sent to signal modulation module.
Clock module: for timing to be arranged to FPGA module, FPGA is made to transmit a signal to signal modulation mould according to timing
Block.
DSP module: it is programmable, for being returned after modifying, delete to the signal that FPGA module exports, strengthening
To FPGA module, and controllable FPGA module work.
RAM module: for the communication module of DSP module and peripheral hosts, the peripheral hosts data to be sent can be kept in.
Microcomputer interface: for the messenger interface of RAM module and peripheral hosts.DSP module is compiled by peripheral hosts
Process control.
Address register: for saving the address information for the internal storage location that peripheral hosts are accessed.
Signal modulation module: the TTL signal for transmitting FPGA is converted to digital signal, and passes through output data path
Channel exports signal.
As shown in figure 3, the signal conditioning module includes amplifier P1, amplifier P2, amplifier P3, resistance R1, resistance R2, resistance
R3, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, capacitor C1, capacitor C2 and follow circuit.
Wherein, one end of resistance R1 be connected with the cathode of amplifier P1, anode of the other end after resistance R2 with amplifier P1
It is connected.One end of capacitor C1 is connected with the anode of amplifier P1, the other end is grounded.Resistance R3 be serially connected in amplifier P1 cathode and
Between output end.Resistance R6 is serially connected between the output end of amplifier P1 and the anode of amplifier P2.Resistance R5 is serially connected in amplifier P3's
Between cathode and the cathode of amplifier P2.Capacitor C2 is in parallel with resistance R5.Resistance R7 is serially connected in the cathode and output end of amplifier P2
Between.Resistance R8 is serially connected between the cathode and output end of amplifier P3.One end of resistance R4 is connected, separately with the anode of amplifier P3
One end is connected with voltage detecting sensor.Circuit is followed to be connected simultaneously with the output end of the output end of amplifier P3 and amplifier P2.
The tie point of the resistance R1 and resistance R2 is connected with voltage detecting sensor；It is described that circuit output end and A/D is followed to convert
Module is connected.
Wherein, filter is collectively formed in amplifier P1, resistance R1, resistance R2, resistance R3 and capacitor C1；Resistance R1
Resistance value be 560 Ω, the resistance value of resistance R2 is 1K Ω, and the resistance value of resistance R3 is 100K Ω, and the capacitance of capacitor C1 is 27 μ F, amplifier
The model LM307 of P1.
The resistance value of resistance R6 is 4.7K Ω, and the resistance value of resistance R7 is 47K Ω, and the resistance value of resistance R5 is 10K Ω, resistance R8's
Resistance value is 47K Ω, and the resistance value of resistance R4 is 4.7K Ω, and the capacitance of capacitor C2 is that the model of 27 μ F, amplifier P2 and amplifier P3 are
LM107。
In addition, it includes amplifier P5, amplifier P4, resistance R9, diode D1, resistance R10, resistance R11, resistance that this, which follows circuit,
R12, resistance R13, capacitor C3, capacitor C4.
Resistance R9 is serially connected between the output end of amplifier P3 and the cathode of amplifier P5.The pole N of diode D1 and amplifier P5
Anode be connected, the pole P is connected with the output end of amplifier P2.Resistance R12 is serially connected between the cathode and output end of amplifier P5.
Capacitor C4 is in parallel with resistance R12.One end of capacitor C3 is connected with the anode of amplifier P5, the other end sequentially through resistance R11 and
Resistance R10 is followed by power supply.One end of capacitor C5 is connected with the tie point of resistance R11 and resistance R10, the other end and amplifier P4
Output end is connected.One end of resistance R13 is connected with the output end of amplifier P5, the other end is connected with A/D conversion module.Institute
The anode for stating amplifier P4 is connected with the tie point of capacitor C3 and resistance R11, and cathode is connected with output end.
The resistance value of resistance R9~R11 is 10K Ω, and the resistance value of resistance R12 is 20K Ω, and the resistance value of resistance R13 is 1K
The capacitance of the model 1N4005 of Ω, diode D1, capacitor C3 are 788pF, and the capacitance of capacitor C4 is 0.1 μ F, the appearance of capacitor C5
Value is that the model of 0.3 μ F, amplifier P4 and amplifier P5 are LM107.
When work, the detection signal of voltage detecting sensor output is input to amplifier after resistance R1 and resistance R2 respectively
The detection signal of P1, i.e. voltage detecting sensor output is input in the filter, is filtered by capacitor C1 to detection signal
Wave processing, so that the noise interferences that voltage detecting sensor generates are filtered；Resistance R3 is the negative-feedback of amplifier P1
The stability of amplifier P1 can be improved in resistance.Detection signal after being filtered is exported from the output end of amplifier P1, and is passed through
Amplifier P2 is input to after resistance R6.The resistance R6, resistance R5, resistance R4, resistance R7, resistance R8, capacitor C2, amplifier P2 and fortune
It puts P3 and is then total to member's one pre-amplification circuit of formation；Amplifier P2 and amplifier P3 is set as homophase input, scaling circuit shape
Formula, therefore the impedance of circuit input is very high；The pre-amplification circuit uses symmetrical form, i.e. amplifier P3, resistance R4, resistance
R8 forms a link, and amplifier P2, resistance R7, resistance R6 then form another link, and two links form symmetric form, therefore
Drift, noise, offset voltage and offset current can be made to cancel out each other, to improve the stability of signal；It is defeated to detect signal
Enter after amplifying processing to amplifier P2 and amplifier P3, exports from the output end of amplifier P2 and amplifier P3 to following circuit；By
After pre-amplification circuit processing, the small-signal of voltage detecting sensor output is then amplified, and so that detection signal is met A/D and is turned
The acquisition requirement of block is changed the mold, as shown in figure 4, signal and amplified signal after putting big processing of circuit before menstruation, before amplification
Relational graph.Detection signal is input to amplifier P5 after resistance R9 and diode D1 respectively；Amplifier P5, resistance R12 and capacitor C4
Then form follower；Meanwhile amplifier P4, capacitor C3, resistance R11, resistance R10 and capacitor C5 shaping filter, mistake herein
The filter is filtered detection signal in journey；Detection signal after treatment is input to A/D modulus of conversion after resistance R13
Block.A/D conversion module is transferred to bus interface after converting to signal, most transmit a signal to host computer through bus afterwards.
As described above, the present invention can be realized well.
Claims (5)
1. a kind of base station reserve battery on-line monitoring system, it is characterised in that: including putting for different base station reserve battery is arranged in
Several detection modules at electric end, the bus interface being connected with each detection module are connected by bus with bus interface
Host computer；The detection module includes voltage detecting sensor, is connected with voltage detecting sensor for passing to voltage detecting
The signal conditioning module that the detection signal of sensor output is handled, and the A/D modulus of conversion being connected with signal conditioning module
Block；The A/D conversion module is connected with bus interface.
2. a kind of base station reserve battery on-line monitoring system according to claim 1, it is characterised in that: the bus interface
Data path and 4 road output data path channels are received with 4 tunnels, 4 tunnel receives to be concatenated on data path
Having capacitance is the tantalum capacitor C of 35pF.
3. a kind of base station reserve battery on-line monitoring system according to claim 2, it is characterised in that: the bus interface
Including signal modulation module, FPGA module, clock module, DSP module, RAM module, microcomputer interface module, address register with
And signal demodulation module；
Signal demodulation module: for receiving the detection signal of the reception data path input, and it will test signal conversion
It exports at the TTL signal of 5V, and in the form of serial digital signal to FPGA module；
FPGA module: for being decoded to TTL signal, receiving caching process, and DSP module is transferred data to；It connects simultaneously
The data of DSP module transmission are received, and data are packaged, under timing control, the data after group packet are sent to signal tune
Molding block；
Clock module: for timing to be arranged to FPGA module, FPGA is made to transmit a signal to signal modulation module according to timing；
DSP module: it is programmable, for being returned to after modifying, delete to the signal that FPGA module exports, strengthening
FPGA module, and controllable FPGA module work；
RAM module: for the communication module of DSP module and peripheral hosts, the peripheral hosts data to be sent can be kept in；
Microcomputer interface: for the messenger interface of RAM module and peripheral hosts；
Address register: for saving the address information for the internal storage location that peripheral hosts are accessed；
Signal modulation module: the TTL signal for transmitting FPGA is converted to digital signal, and is believed according to the control of FPGA module
Number send digital signal to the output data path channel of setting.
4. a kind of base station reserve battery on-line monitoring system according to claim 1, it is characterised in that: the signal condition
Module includes amplifier P1, amplifier P2, amplifier P3, one end is connected with the cathode of amplifier P1, the other end after resistance R2 with amplifier
The resistance R1 that the anode of P1 is connected, the capacitor C1 that one end is connected with the anode of amplifier P1, the other end is grounded, is serially connected in amplifier
Resistance R3 between the cathode and output end of P1, the resistance R6 being serially connected between the output end of amplifier P1 and the anode of amplifier P2,
The resistance R5 being serially connected between the cathode of amplifier P3 and the cathode of amplifier P2, the capacitor C2 being in parallel with resistance R5, is serially connected in fortune
Put the resistance R7 between the cathode of P2 and output end, the resistance R8 being serially connected between the cathode and output end of amplifier P3, one end with
The resistance R4 that the anode of amplifier P3 is connected, the other end is connected with voltage detecting sensor, and it is defeated with amplifier P3 simultaneously
Outlet follows circuit with what the output end of amplifier P2 was connected；The tie point and voltage detecting sensor of the resistance R1 and resistance R2
It is connected；It is described that circuit output end is followed to be connected with A/D conversion module.
5. a kind of base station reserve battery on-line monitoring system according to claim 4, it is characterised in that: described to follow circuit
The resistance pole R9, N being serially connected between the output end of amplifier P3 and the cathode of amplifier P5 including amplifier P5, amplifier P4 and amplifier P5
Anode be connected, the diode D1 that the pole P is connected with the output end of amplifier P2, be serially connected in amplifier P5 cathode and output end it
Between resistance R12, the capacitor C4 being in parallel with resistance R12, one end is connected with the anode of amplifier P5, the other end is sequentially through resistance
R11 and resistance R10 is followed by the capacitor C3 of power supply, and one end is connected with the tie point of resistance R11 and resistance R10, the other end and fortune
Put capacitor C5 that the output end of P4 is connected and one end be connected with the output end of amplifier P5, the other end and A/D conversion module
The resistance R13 being connected；The anode of the amplifier P4 is connected with the tie point of capacitor C3 and resistance R11, cathode and output
End is connected.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910023417.2A CN109581226A (en) | 2019-01-10 | 2019-01-10 | A kind of base station reserve battery on-line monitoring system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910023417.2A CN109581226A (en) | 2019-01-10 | 2019-01-10 | A kind of base station reserve battery on-line monitoring system |
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ID=65916476
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| CN201233435Y (en) * | 2008-03-27 | 2009-05-06 | 兰州太格维尔电子有限公司 | Residual capacity tester for accumulator |
| CN203249964U (en) * | 2013-03-22 | 2013-10-23 | 西安理工大学 | Power battery voltage acquisition system |
| US20150362528A1 (en) * | 2014-06-11 | 2015-12-17 | Delta Electronics (Shanghai) Co., Ltd. | Voltage sampling system |
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2019
- 2019-01-10 CN CN201910023417.2A patent/CN109581226A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1493886A (en) * | 2002-07-01 | 2004-05-05 | 杭州高特电子设备有限公司 | Radio battery voltage detection system |
| CN2906707Y (en) * | 2006-05-17 | 2007-05-30 | 华南理工大学电子与信息学院 | Measuring and control device |
| CN201233435Y (en) * | 2008-03-27 | 2009-05-06 | 兰州太格维尔电子有限公司 | Residual capacity tester for accumulator |
| CN203249964U (en) * | 2013-03-22 | 2013-10-23 | 西安理工大学 | Power battery voltage acquisition system |
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