CN109638011B - Electrostatic protection structure of image sensor and image sensor - Google Patents

Electrostatic protection structure of image sensor and image sensor Download PDF

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CN109638011B
CN109638011B CN201811462072.2A CN201811462072A CN109638011B CN 109638011 B CN109638011 B CN 109638011B CN 201811462072 A CN201811462072 A CN 201811462072A CN 109638011 B CN109638011 B CN 109638011B
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electrostatic discharge
ring
protection circuit
image sensor
pad
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CN109638011A (en
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任张强
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Beijing Night Vision Advanced Technology Co ltd
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Rockchip Electronics Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0296—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers

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  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Semiconductor Integrated Circuits (AREA)
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Abstract

The invention provides an electrostatic protection structure of an image sensor and the image sensor, the image sensor comprises: a substrate including a plurality of pixel regions; the first metal interconnection layer is arranged on one side of the substrate and comprises a pixel peripheral circuit; the second metal layer is arranged on the other side of the substrate; the electrostatic protection structure comprises: the first electrostatic discharge protection circuit is arranged on the first metal interconnection layer; the second electrostatic discharge protection circuit is arranged on the second metal layer; the impedance of the second electrostatic discharge protection circuit is smaller than that of the first electrostatic discharge protection circuit, and the second electrostatic discharge protection circuit and the first electrostatic discharge protection circuit have at least one access point. The electrostatic protection structure can reduce the resistance of a current leakage path and improve the electrostatic discharge performance of the chip on the premise of not increasing the area of the chip.

Description

Electrostatic protection structure of image sensor and image sensor
Technical Field
The invention relates to the technical field of image sensors, in particular to an electrostatic protection structure of an image sensor and the image sensor.
Background
Backside illuminated (BSI) CMOS image sensors have many advantages over front-illuminated (FSI) CMOS image sensors, such as: the quantum efficiency of the small-size pixels can be greatly improved, and the trend of high resolution is adapted; the substrate is thinned, so that the resistance of the substrate is greatly increased, the propagation of noise in the substrate is inhibited, and the signal-to-noise ratio is improved. However, the increase of the substrate resistance makes the electrostatic Discharge (ESD) performance of the chip more dependent on the ESD ring (ESD ring), and the reduction of the resistance of the ESD ring in a large-sized chip requires a corresponding increase of the width of the ESD ring, which greatly increases the chip area and increases the manufacturing cost of the chip.
Disclosure of Invention
The invention solves the technical problem that the improvement of the electrostatic discharge performance of the existing back-illuminated image sensor is contradictory to the miniaturization development trend of a chip.
To solve the above technical problem, an embodiment of the present invention provides an electrostatic discharge protection structure of an image sensor, where the image sensor includes: a substrate including a plurality of pixel regions; the first metal interconnection layer is arranged on one side of the substrate and comprises a pixel peripheral circuit; the second metal layer is arranged on the other side of the substrate; the electrostatic protection structure comprises: the first electrostatic discharge protection circuit is arranged on the first metal interconnection layer; the second electrostatic discharge protection circuit is arranged on the second metal layer; the impedance of the second electrostatic discharge protection circuit is smaller than that of the first electrostatic discharge protection circuit, and the second electrostatic discharge protection circuit and the first electrostatic discharge protection circuit have at least one access point.
Optionally, the first esd protection circuit is disposed at a periphery of the pixel peripheral circuit, and the second esd protection circuit is disposed on the second metal layer in an area opposite to the pixel peripheral circuit or the first esd protection circuit.
Optionally, the first electrostatic discharge protection circuit includes a first electrostatic discharge ring and a second electrostatic discharge ring, the second electrostatic discharge ring being disposed around a periphery of the first electrostatic discharge ring; the second electrostatic discharge protection circuit comprises a third electrostatic discharge ring, the impedance of the third electrostatic discharge ring is smaller than the respective impedance of the first electrostatic discharge ring and the second electrostatic discharge ring, and the third electrostatic discharge ring is connected into the first electrostatic discharge ring or the second electrostatic discharge ring.
Optionally, the first electrostatic discharge protection circuit further includes: a plurality of first pads on the first metal interconnection layer and disposed at intervals around the periphery of the second ESD ring; the plurality of first welding pads are electrically connected with the first electrostatic discharge ring, the third electrostatic discharge ring is connected to the first electrostatic discharge ring at the first welding pads, or the plurality of first welding pads are electrically connected with the second electrostatic discharge ring, and the third electrostatic discharge ring is connected to the second electrostatic discharge ring at the first welding pads.
Optionally, the second esd protection circuit further comprises: and a plurality of second welding pads are arranged on the second metal layer and around the periphery of the third electrostatic discharge ring at intervals, the second welding pads are electrically connected with the third electrostatic discharge ring, and the second welding pads are electrically connected with the first welding pads.
Optionally, the first electrostatic discharge ring is a power ring, the second electrostatic discharge ring is a ground ring, the third electrostatic discharge ring is a ground ring, the first pad and the second pad are both ground pads, and the first pad is electrically connected to the second electrostatic discharge ring.
Optionally, the first electrostatic discharge protection circuit further includes: and one end of the electrostatic discharge device is electrically connected with the first welding pad, and the other end of the electrostatic discharge device is connected into the first electrostatic discharge ring.
Optionally, the electrostatic discharge device includes a diode, an anode of the diode is electrically connected to the first pad, and a cathode of the diode is connected to the first electrostatic discharge ring.
Optionally, the first electrostatic discharge ring is a power ring, the second electrostatic discharge ring is a ground ring, the third electrostatic discharge ring is a power ring, the first pad and the second pad are both power pads, and the first pad is electrically connected to the first electrostatic discharge ring.
Optionally, the first electrostatic discharge protection circuit further includes: and one end of the electrostatic discharge device is electrically connected with the first welding pad, and the other end of the electrostatic discharge device is connected into the second electrostatic discharge ring.
Optionally, the electrostatic discharge device includes a diode, an anode of the diode is connected to the second electrostatic discharge ring, and a cathode of the diode is electrically connected to the first pad.
Optionally, the first electrostatic discharge protection circuit further includes: a plurality of third pads disposed on the first metal interconnect layer at intervals around a periphery of the second ESD ring; and one end of the first electrostatic discharge device is electrically connected with the third welding pad, the other end of the first electrostatic discharge device is connected into the first electrostatic discharge ring, one end of the second electrostatic discharge device is electrically connected with the third welding pad, and the other end of the second electrostatic discharge device is connected into the second electrostatic discharge ring.
Optionally, the first electrostatic discharge ring is a power ring and the second electrostatic discharge ring is a ground ring; the first electrostatic discharge device comprises a first diode, the anode of the first diode is electrically connected with the third welding pad, and the cathode of the first diode is connected into the first electrostatic discharge ring; the second electrostatic discharge device comprises a second diode, the anode of the second diode is connected into the second electrostatic discharge ring, and the cathode of the second diode is electrically connected with the third welding pad.
Optionally, the third pad is used for providing a wire bonding.
Optionally, the first metal interconnection layer is disposed on a front side of the substrate, the second metal layer is disposed on a back side of the substrate, and the back side of the substrate is a light incident surface of the image sensor.
Accordingly, an embodiment of the present invention further provides an image sensor, including: a substrate including a plurality of pixel regions; the first metal interconnection layer is arranged on one side of the front surface of the substrate and comprises a pixel peripheral circuit; the second metal layer is arranged on one side of the back surface of the substrate; and an electrostatic protection structure of the image sensor; wherein the back surface of the substrate is a light incident surface of the image sensor.
Optionally, the image sensor further comprises: a gate layer disposed between the substrate and the first metal interconnect layer; and a filter layer and a micro-lens disposed on a surface of the second metal layer facing away from the substrate.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following beneficial effects:
in the electrostatic protection structure of the image sensor according to the embodiment of the present invention, the first electrostatic discharge protection circuit is disposed on the first metal interconnection layer, and the second electrostatic discharge protection circuit is disposed on the second metal layer, and since the first metal interconnection layer and the second metal layer are disposed on two sides of the substrate, a space on the second metal layer can be fully utilized to form the second electrostatic discharge protection circuit with smaller impedance; because the second electrostatic discharge protection circuit and the first electrostatic discharge protection circuit have at least one access point, a discharge path passing through a part of the first electrostatic discharge protection circuit and a part of the second electrostatic discharge protection circuit can be formed.
Further, the first esd protection circuit is disposed at the periphery of the pixel peripheral circuit, and the second esd protection circuit is disposed on the second metal layer in an area opposite to the pixel peripheral circuit of the first metal layer interconnection layer or the first esd protection circuit, that is, the second metal layer may be used to dispose the second esd protection circuit except for an area corresponding to the plurality of pixel areas. Therefore, on the premise of not influencing the receiving light signal of the pixel region and not increasing the chip area, the second electrostatic discharge protection circuit can be made as wide as possible, so that the resistance of a leakage path is reduced, and the leakage performance of the chip is improved.
Further, the first electrostatic protection structure includes a first electrostatic discharge ring and a second electrostatic discharge ring, the second electrostatic discharge protection circuit includes a third electrostatic discharge ring, the third electrostatic discharge ring can be connected to the first electrostatic discharge ring and the second electrostatic discharge ring, and since the impedance of the third electrostatic discharge ring is smaller than the respective impedances of the first electrostatic discharge ring and the second electrostatic discharge ring, after the third electrostatic discharge ring is connected to the first electrostatic discharge ring or the second electrostatic discharge ring, the third electrostatic discharge ring can play a role in reducing the resistance of a discharge path, so as to improve the electrostatic discharge performance of the image sensor.
Further, the first esd protection circuit further includes a plurality of first pads disposed on the first metal interconnection layer and surrounding the periphery of the second esd ring at intervals, the plurality of first pads are electrically connected to the first esd ring or the second esd ring, and the third esd ring can be connected to the first esd ring or the second esd ring at the first pad, that is, the second esd protection circuit is implemented with multiple degrees of freedom. When the first esd ring is a first ground ring, a second ground ring having a smaller impedance may be disposed on the second metal layer to be connected to the first ground ring having a larger impedance, thereby reducing the resistance of a leakage path; when the first esd ring is a first power ring, a second power ring with smaller impedance may be disposed on the second metal layer to connect to the first power ring with larger impedance, thereby reducing the resistance of the leakage path.
Furthermore, the second esd protection circuit further comprises a plurality of second pads disposed on the second metal layer and surrounding the periphery of the third esd ring at intervals, the second pads are electrically connected to the third esd ring, and the second pads are electrically connected to the first pads.
Furthermore, the bonding pads on the first metal interconnection layer and the second metal layer can be grounding bonding pads, power bonding pads, or bonding pads for providing routing, and an electrostatic discharge device is further arranged between each bonding pad and the corresponding electrostatic discharge ring. Therefore, the electrostatic protection structure of the image sensor of the embodiment of the invention can provide a discharge path for electrostatic charges applied to any bonding pad, limit the potential of all bonding pads on the chip to a lower level, and protect the internal circuit of the image sensor.
Further, the esd device may include a diode, and the diode is connected to the first esd protection circuit in a reverse blocking manner, so that the first esd protection circuit is in an off state when no charge is applied to the pad, and the first esd protection circuit is in an on state when there is a charge impact on the pad, so as to safely discharge the charge.
Furthermore, the first metal interconnection layer is disposed on one side of the front surface of the substrate, the second metal layer is disposed on one side of the back surface of the substrate, and the back surface of the substrate is a light incident surface of the image sensor.
The image sensor of the embodiment of the invention comprises the electrostatic protection structure, so the electrostatic discharge performance of the image sensor is improved.
Drawings
Fig. 1 is a schematic diagram of an esd protection circuit of an image sensor 10;
fig. 2 is a schematic cross-sectional view of an image sensor 20 according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a first esd protection circuit of the image sensor 20 according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a second esd protection circuit of the image sensor 20 according to an embodiment of the present invention;
fig. 5 is a schematic diagram of an electrostatic discharge path between a first power pad 2212 and a first ground pad 2211 according to the embodiment of fig. 2-4;
fig. 6 is a schematic diagram of an electrostatic discharge path between one first power supply pad 2212a and another first power supply pad 2212b of the embodiment of fig. 2-4 of the present invention;
fig. 7 is a schematic diagram of an electrostatic discharge path between a third pad 2213 and a first ground pad 2211 in the embodiment of fig. 2-4 of the present invention;
fig. 8 is a schematic diagram of two electrostatic discharge paths a and B between one first ground pad 2211a and another first ground pad 2211B of the embodiment of fig. 2-4 of the present invention;
fig. 9 is a schematic structural diagram of a first electrostatic discharge protection circuit of an image sensor according to another embodiment of the present invention;
FIG. 10 is a diagram illustrating a second ESD protection circuit of an image sensor according to another embodiment of the present invention;
fig. 11 is a schematic diagram of two electrostatic discharge paths a and B between one first power pad 3212a and the other first power pad 3212c according to the embodiment of the present invention shown in fig. 9 to 10.
Detailed Description
As described in the background art, there is a contradiction between the improvement of the electrostatic discharge performance of the conventional back-illuminated image sensor and the trend of miniaturization of the chip, and specifically, referring to fig. 1, fig. 1 is a schematic structural diagram of an electrostatic discharge protection circuit of an image sensor 10.
In some embodiments, the image sensor 10 may be a CMOS image sensor, and includes a substrate, and a metal interconnection layer (fig. 1 may be regarded as a top view of the metal interconnection layer) on the substrate, the substrate is provided with a plurality of pixel regions, the metal interconnection layer is provided with a pixel peripheral circuit 13, and an electrostatic discharge protection circuit, wherein the pixel peripheral circuit 13 is disposed around the pixel regions in the substrate, and the electrostatic discharge protection circuit may include three current leakage paths: the substrate, the ground ring (GND ring)14, and the POWER ring (POWER ring)15, and the electrostatic discharge process between any two PADs (PAD)11 and 12 can be performed through these three discharging paths. The electrostatic discharge device 111 between the pad 11 and the ground ring 14, the pad 11 and the power ring 15, and the electrostatic discharge device 121 between the pad 12 and the ground ring 14, the pad 12 and the power ring 15 are omitted in fig. 1.
In a front-illuminated (FSI) CMOS image sensor having a low-resistance substrate, in order to save area, the ground ring 14 and the power ring 15 are usually made very thin, and the substrate is fully utilized for discharging, and generally, the low-resistance substrate has an impedance of 2 to 4 ohms, which can ensure that charges can be safely discharged in a Human Body discharge mode (HBM) of 3000V. However, the back-illuminated image sensor has no low-resistance substrate, charges are mainly discharged from the ground ring and the power ring, and in order to maintain the impedance of the discharge path of 2-4 ohm, the width of the ground ring or the power ring needs to be hundreds of micrometers, which undoubtedly causes the increase of the chip area and is not beneficial to realizing the miniaturization of the chip.
In order to improve the electrostatic discharge performance of the backside illuminated image sensor without increasing the chip area, an embodiment of the invention provides an electrostatic protection structure of the image sensor, and the following describes in detail an embodiment of the invention with reference to the accompanying drawings.
Referring to fig. 2, fig. 2 is a schematic cross-sectional structure diagram of an image sensor 20 according to an embodiment of the present invention.
In some embodiments, the image sensor 20 may include: a substrate 21, a first metal interconnect layer 22, and a second metal layer 23. The base 21 may be a silicon substrate, and a plurality of pixel regions (not shown) are disposed in the base 21. The first metal interconnection layer 22 may be a multilayer, for example, the first metal interconnection layer 22 may include four metal interconnection layers, each metal interconnection layer has a plurality of first pads 221 disposed therein, and the first pads 221 on adjacent metal interconnection layers may be electrically connected through plugs 226. The second metal layer 23 may be a single layer, in which a plurality of second pads 231 are disposed, and the second pads 231 and the first pads 221 in the first metal interconnection layer 22 may be interconnected by a conductive under ball layer (BPA) 216.
In some embodiments, the first Metal interconnection Layer 22 may be disposed on a front side of the substrate 21, and the second Metal Layer 23 may be disposed on a back side of the substrate 21, i.e., a back Metal Layer (BMT), where the back side of the substrate 21 is a light incident surface of the image sensor.
In some embodiments, the image sensor 20 may further include: shallow Trench Isolation (STI) (not shown) disposed within the substrate 21, a gate structure (not shown) disposed between the substrate 21 and the first metal interconnection layer 22, a filter layer (not shown) and a microlens (not shown) disposed on a surface of the second metal layer 23 facing away from the substrate 21, and the like. It should be noted that the embodiments of the present invention focus on the electrostatic protection structure of the image sensor, and therefore, only the structure related to the electrostatic protection structure in the image sensor 20 will be described in detail, and the common structures in the image sensor 20, such as the gate, the photoelectric conversion element, and the color filter, will not be described in detail.
With reference to fig. 3 and fig. 4, fig. 3 is a schematic structural diagram of a first esd protection circuit of the image sensor 20 according to an embodiment of the present invention, and fig. 4 is a schematic structural diagram of a second esd protection circuit of the image sensor 20 according to an embodiment of the present invention. For convenience of understanding and illustration, fig. 3 shows the first esd protection circuit disposed on the first metal interconnection layer 21 and the second esd protection circuit disposed on the second metal layer 23 as being disposed in the same plane in a top view, and those skilled in the art will understand that in practical applications, the various circuits and devices shown in fig. 3 may be distributed in different layers along the thickness direction of the chip.
In some embodiments, the esd protection structure may include a first esd protection circuit disposed on the first metal interconnection layer 21 (shown in fig. 2); and a second esd protection circuit disposed on the second metal layer 23 (as shown in fig. 2). The impedance of the second electrostatic discharge protection circuit is smaller than that of the first electrostatic discharge protection circuit, and the second electrostatic discharge protection circuit and the first electrostatic discharge protection circuit have at least one access point.
In some embodiments, the first ESD protection circuit is disposed at the periphery of the pixel peripheral circuit 222, and the second ESD protection circuit is disposed at the region of the second metal layer 23 opposite to the pixel peripheral circuit of the first metal layer interconnection layer 22, or at the region of the second metal layer 23 opposite to the first ESD protection circuit, which has the advantage that the second ESD protection circuit can overlap with the first ESD protection circuit or the pixel peripheral circuit 222, so that the second ESD protection circuit can be made very wide, even can be drawn to a width of more than several hundred micrometers, and the area of the chip is not increased, thereby greatly reducing the ESD leakage path resistance of the chip and improving the ESD performance of the chip.
As shown in fig. 3, in some embodiments, the first electrostatic discharge protection circuit may include a first electrostatic discharge ring 223 and a second electrostatic discharge ring 224, the first electrostatic discharge ring 223 being disposed around the periphery of the pixel peripheral circuit 222, the second electrostatic discharge ring 224 being disposed around the periphery of the first electrostatic discharge ring 223.
With reference to fig. 3 and 4, the second esd protection circuit may include a third esd loop 233, an impedance of the third esd loop 233 is smaller than respective impedances of the first esd loop 223 and the second esd loop 224, and the third esd loop 233 may be connected to the first esd loop 223 or the second esd loop 224.
In some embodiments, the first electrostatic discharge protection circuit further comprises: a plurality of first pads 2211 disposed on the first metal interconnect layer 22 at intervals around the periphery of the second electrostatic discharge ring 224; the plurality of first pads 2211 are electrically connected to the second electrostatic discharge ring 224, and the third electrostatic discharge ring 233 is connected to the second electrostatic discharge ring 224 at the first pads 2211.
As shown in fig. 4, in some embodiments, the second esd protection circuit further comprises: a plurality of second pads 2311 are arranged on the second metal layer 23 at intervals around the periphery of the third esd ring 233, the second pads 2311 are electrically connected to the third esd ring 233, and the second pads 2311 and the first pads 2211 can be electrically connected through a conductive under Ball (BPA) layer 216 (shown in fig. 2), so that the third esd ring 233 can be connected to the second esd ring 224.
In some embodiments, the first pad 2211 and the second pad 2311 may be uniformly disposed on the first metal interconnection layer 22 and the second metal layer 23, so that the third esd ring 233 may be uniformly coupled into the second esd ring 224.
In this embodiment, the first electrostatic discharge ring 223 may be a first Power ring (Power ring), the second electrostatic discharge ring 224 may be a first ground ring (GND ring), the third electrostatic discharge ring 233 may be a second ground ring, the first PAD 2211 may be a first ground PAD (GND PAD), and the second PAD 2311 may be a second ground PAD (GND PAD), that is, the second ground ring 233 with smaller impedance is disposed on the back metal layer 23 to connect to the first ground ring 224 with larger impedance on the front metal interconnection layer 22, so as to reduce the resistance of the discharging path and improve the discharging performance of the chip.
In some embodiments, a plurality of first power pads 2212 and a plurality of third power pads 2213 may be further disposed on the first metal interconnection layer 22, and the plurality of first ground pads 2211, the plurality of first power pads 2212 and the plurality of third power pads 2213 are all disposed at intervals around the periphery of the second electrostatic discharge ring 224.
In some embodiments, the first electrostatic discharge protection circuit further includes a first electrostatic discharge device 2251 having two ends electrically connected to the first ground pad 2211 and the first power ring 223, respectively, and a second electrostatic discharge device 2252 having two ends electrically connected to the first power pad 2212 and the first ground ring 224, respectively. Specifically, the first electrostatic discharge device 2251 and the second electrostatic discharge device 2252 may be one or more diodes connected in series, respectively, with the anode of the first diode 2251 being electrically connected to the first ground pad 2211 and the cathode thereof being connected to the first power ring 223, and the anode of the second diode 2252 being connected to the first ground ring 224 and the cathode thereof being electrically connected to the first power pad 2212.
In some embodiments, the third bonding pad 2213 can be used to provide wire bonding. The first electrostatic discharge protection circuit may further include a third electrostatic discharge device 2253 having both ends electrically connected to the third pad 2213 and the first power ring 223, respectively, and a fourth electrostatic discharge device 2254 having both ends electrically connected to the third pad 2213 and the first ground ring 224, respectively. The third electrostatic discharge device 2253 and the fourth electrostatic discharge device 2254 may be one or more diodes connected in series, respectively, wherein the anode of the third diode 2253 is electrically connected to the third pad 2213, the cathode thereof is connected to the first power ring 223, and the anode of the fourth diode 2254 is connected to the first ground ring 224, the cathode thereof is electrically connected to the third pad 2213.
As can be seen from the above, all the diodes in the first metal interconnection layer 22 are connected to the first esd protection circuit in a reverse-off manner, and when no static charge is applied to the pad (pad), the diodes are in an off state, and when a certain amount of static charge is applied to the pad, the diodes are broken down in a reverse direction, and the first esd protection circuit is turned on, so that the static charge can be safely discharged.
The operation of the electrostatic discharge protection structure of the image sensor according to the embodiment of fig. 2 to 4 will be described with reference to the two third pads 2213a and 2213b as an example. As shown in fig. 3, a dotted arrow in the figure shows an electrostatic discharge path between the two third pads 2213a and 2213 b. When there is an impact of charge on the third pad 2213a, the charge enters the first ground ring 224 from the third pad 2213a, is conducted to the nearest first ground pad 2211a along the first ground ring 224, is conducted to a second ground pad 2311a (not shown in fig. 4 and 3) on the second metal layer 23 and connected to the second metal layer, is conducted to a second ground pad 2311b (not shown in fig. 4 and 3) electrically connected to the first ground pad 2211b nearest to the third ground pad 2213b along the second ground ring 233 on the second metal layer 23, and is reentered to the first ground ring 224 and is conducted to the third ground pad 2213b along the first ground ring 224, thereby completing the charge draining.
As can be seen from fig. 3, the leakage path shown by the dotted arrow includes a part of the first grounding ring 224 and a part of the second grounding ring 233, and the second grounding ring 233 occupies a larger proportion in the leakage path. In this embodiment, the ground pads can be uniformly disposed on the chip, and when there is an electric charge impact on any pad, the second ground ring 233 located on the second metal layer (i.e. the back metal layer) 23 can be accessed from the nearby ground pad 2211, and since there is enough space on the back metal layer 23 to allow the second ground ring 233 to be made wide, the impedance of the second ground ring 233 can be much smaller than that of the first ground ring 224, so as to reduce the resistance of the leakage path.
As shown in fig. 4, in some embodiments, a plurality of second power pads 2312 and a plurality of fourth power pads 2313 are further disposed on the second metal layer 23, and the fourth power pads 2313 can be used for providing wire bonding. Wherein the second power pad 2312 can be electrically connected to the first power pad 2212 through a conductive layer (BPA)216 (shown in fig. 2), and the fourth power pad 2313 can be electrically connected to the third power pad 2213 through a conductive layer (BPA)216 (shown in fig. 2).
It should be noted that the electrostatic discharge process between the two third pads 2213a and 2213b in fig. 3 and 4, which is described by taking the charge applied to the third pad 2213a as an example, simulates a human body discharge mode (HBM), however, the electrostatic discharge structure of the image sensor according to the embodiment of the present invention is applicable to the electrostatic discharge process between any two pads, for example, fig. 5 to 8 show electrostatic discharge paths between several pads, which is only briefly described herein: fig. 5 is an electrostatic discharge path between a first power pad 2212 and a first ground pad 2211 according to the embodiment of the present invention shown in fig. 2 to 4, fig. 6 is an electrostatic discharge path between a first power pad 2212a and another first power pad 2212B according to the embodiment of the present invention shown in fig. 2 to 4, fig. 7 is a schematic diagram of an electrostatic discharge path between a third pad 2213 and a first ground pad 2211 according to the embodiment of the present invention shown in fig. 2 to 4, fig. 8 is a schematic diagram of two electrostatic discharge paths a and B between a first ground pad 2211a and another first ground pad 2211B according to the embodiment of the present invention shown in fig. 2 to 4, wherein the electrostatic discharge path a is: directly from the one first ground pad 2211a into the second metal layer 23, through the second ground ring 233 and then from a second ground pad 2311b (shown in fig. 4) on the second metal layer 23 electrically connected to the other first ground pad 2211b into the first metal layer interconnect layer 22, discharging at the other first ground pad 2211 b; the electrostatic discharge path B is directly from the one first ground pad 2211a to the first ground ring 224 on the first metal layer interconnection layer 22, and discharges at the other first ground pad 2211B through the first ground ring 224.
It should be further noted that, in practical applications, there may be multiple electrostatic discharge paths between any two pads, and the electrostatic discharge paths may be located entirely in the first metal interconnection layer 22 (for example, the electrostatic discharge path B in fig. 8), entirely in the second metal layer 23 (for example, the electrostatic discharge path a in fig. 8), or partially in the first metal interconnection layer 22 and partially in the second metal layer 23 (for example, fig. 3, 5, 6, and 7). Although the electrostatic discharge path on the first metal interconnection layer 22 is not shown in fig. 3, 5, 6, and 7, the first power ring 223 and the first ground ring 224 on the first metal interconnection layer 22 can still be used for electrostatic discharge between any two pads. Similarly, there are many electrostatic discharge paths shown in fig. 3, 5-7 including the second ground ring 233 on the second metal layer 23, and the electrostatic discharge paths may discharge in a clockwise direction between two pads or in a counterclockwise direction between two pads (similar to fig. 9), and when performing charge leakage, the distribution of the leaked charges may be performed according to the resistance of each discharge path.
Referring to fig. 9 and 10, fig. 9 and 10 are schematic structural diagrams of a first electrostatic discharge protection circuit and a second electrostatic discharge protection circuit of an image sensor according to another embodiment of the present invention, respectively. Similar to the previous embodiment, the esd protection structure of this embodiment also includes a first esd protection circuit disposed on the first metal interconnection layer, and a second esd protection circuit disposed on the second metal layer 33 (as shown in fig. 10), wherein the impedance of the second esd protection circuit is smaller than that of the first esd protection circuit, and the second esd protection circuit and the first esd protection circuit have at least one access point.
As shown in fig. 9, the first electrostatic discharge protection circuit includes a first electrostatic discharge ring 323 and a second electrostatic discharge ring 324, and the second electrostatic discharge ring 324 is disposed around the periphery of the first electrostatic discharge ring 323; the second electrostatic discharge protection circuit includes a third electrostatic discharge ring 333. Specifically, the first electrostatic discharge ring 323 may be a first power ring, and the second electrostatic discharge ring 324 may be a first ground ring.
Unlike the previous embodiment, the third esd ring 333 may be a second power ring, and the first esd ring 323 (i.e., a first power ring) is connected to the first power pad 3212.
As shown in fig. 10, a plurality of second power pads 3312 may be uniformly disposed on the second metal layer 33, the plurality of second power pads 3312 may be electrically connected to the plurality of first power pads 3212 through an under ball conductive layer, and since the first power pads 3212 are electrically connected to the first power ring 323, the second power pads 3312 are electrically connected to the second power ring 333, so that the second power ring 333 may be uniformly coupled to the first power ring 323.
The electrostatic protection structure of the image sensor in this embodiment may further include an electrostatic discharge device having two ends electrically connected to the pad and the ESD ring, and a third pad 3213 for providing a wire bonding, which are all referred to the foregoing embodiments and are not described herein again.
The operation principle of the electrostatic discharge protection structure of the image sensor shown in fig. 9 will be described in detail below by taking the discharge process between the two third pads 3213a and 3213b as an example. The dashed arrows in fig. 9 show the discharging paths between the two third pads 3213a and 3213B, it should be noted that fig. 9 includes two dashed arrows a and B, which show two discharging paths along clockwise and counterclockwise directions, both of which can be used for discharging static electricity, and in practical applications, the two discharging paths distribute the discharging charges according to the resistances of the respective paths (the aforementioned electrostatic discharging paths in fig. 3 to 8 are similar to fig. 9, and the electrostatic discharging paths including the electrostatic discharging loop on the second metal layer may also have a plurality of types, and distribute the discharging charges according to the resistances of the various electrostatic discharging paths). Here, the discharging process between the two third pads 3213a and 3213b is illustrated by taking the electrostatic discharging path shown by the dotted arrow a as an example: when there is a charge impact on the third pad 3213a, the charge enters the first power ring 323 from the third pad 3213a, is conducted along the first power ring 323 to the nearest first power pad 3212a, is conducted to a second power pad 3312a (not shown in fig. 10, 9) interconnected with the second power pad on the second metal layer 33 from the first power pad 3212a, is conducted along the second power ring 333 on the second metal layer 33 to a second power pad 3312b (not shown in fig. 10, 9) interconnected with the first power pad 3212b nearest to the third pad 3213b, and thus enters the first power ring 323 on the first metal interconnection layer again, and is conducted to the third power pad 3213b along the first power ring 323, thereby completing the charge discharging.
As can be seen from fig. 9, the leakage path shown by the dashed arrow includes a portion of the first power ring 323 and a portion of the second power ring 333, and the second power ring 333 occupies a larger proportion therein. In some embodiments, by uniformly disposing the power pads 3212 on the chip, when there is a charge impact on any one pad, the second power ring 333 on the second metal layer (i.e., the back metal layer) 33 can be accessed from the nearby power pad 3212, and since there is enough space on the back metal layer 33 to allow the second power ring 333 to be made wide, the impedance of the second power ring 333 can be much smaller than that of the first power ring 323, thereby reducing the resistance of the leakage path.
Referring to fig. 11, fig. 11 is a schematic diagram of two electrostatic discharge paths a and B between one first power pad 3212a and the other first power pad 3212c according to the embodiment of the present invention shown in fig. 9 to 10, wherein the electrostatic discharge path a is: directly from the one first power pad 3212a into the second metal layer 33, through the second power ring 333, and then from a second power pad 3312c (shown in fig. 10) on the second metal layer 33 electrically connected to the other first power pad 3212c into the first metal layer interconnection layer, discharging at the other first power pad 3212 c; the electrostatic discharge path B directly enters the first power ring 323 from the first power pad 3212a, and discharges at the other first power pad 3212c through the first power ring 323.
The embodiment of the invention also provides an image sensor. Referring to fig. 2, fig. 2 is a schematic cross-sectional structure diagram of an image sensor 20 according to an embodiment of the present invention.
In some embodiments, the image sensor 20 may include: a substrate 21 including a plurality of pixel regions (not shown); a first metal interconnection layer 22 disposed on the front surface side of the substrate 21 and including a pixel peripheral circuit (not shown); a second metal layer 23 disposed on a rear surface side of the substrate 21; and the electrostatic protection structure of the image sensor of the aforementioned embodiment of the present invention. Wherein the back surface of the substrate 21 is a light incident surface of the image sensor 20.
In some embodiments, the electrostatic protection structure comprises: a first electrostatic discharge protection circuit disposed on the first metal interconnection layer 22; and a second esd protection circuit disposed on the second metal layer 23. The impedance of the second electrostatic discharge protection circuit is smaller than that of the first electrostatic discharge protection circuit, and the second electrostatic discharge protection circuit and the first electrostatic discharge protection circuit have at least one access point.
In some embodiments, the image sensor 20 further includes a gate layer disposed between the substrate 21 and the first metal interconnection layer 22; and a filter layer (not shown), a microlens (not shown), and the like provided on a surface of the second metal layer 23 facing away from the substrate 21.
In summary, in the electrostatic protection structure of the image sensor according to the embodiment of the invention, the first electrostatic discharge protection circuit is disposed on the first metal interconnection layer, and the second electrostatic discharge protection circuit is disposed on the second metal layer, because the first metal interconnection layer and the second metal layer are respectively disposed on two sides of the substrate, a space on the second metal layer can be fully utilized to form the second electrostatic discharge protection circuit with smaller impedance; because the second electrostatic discharge protection circuit and the first electrostatic discharge protection circuit have at least one access point, a discharge path passing through a part of the first electrostatic discharge protection circuit and a part of the second electrostatic discharge protection circuit can be formed.
Further, the first esd protection circuit is disposed at the periphery of the pixel peripheral circuit, and the second esd protection circuit is disposed on the second metal layer in an area opposite to the pixel peripheral circuit of the first metal layer interconnection layer or the first esd protection circuit, that is, the second metal layer may be used to dispose the second esd protection circuit except for an area corresponding to the plurality of pixel areas. Therefore, on the premise of not influencing the receiving light signal of the pixel region and not increasing the chip area, the second electrostatic discharge protection circuit can be made as wide as possible, so that the resistance of a leakage path is reduced, and the leakage performance of the chip is improved.
Further, the first electrostatic protection structure includes a first electrostatic discharge ring and a second electrostatic discharge ring, the second electrostatic discharge protection circuit includes a third electrostatic discharge ring, the third electrostatic discharge ring can be connected to the first electrostatic discharge ring and the second electrostatic discharge ring, and since the impedance of the third electrostatic discharge ring is smaller than the respective impedances of the first electrostatic discharge ring and the second electrostatic discharge ring, after the third electrostatic discharge ring is connected to the first electrostatic discharge ring or the second electrostatic discharge ring, the third electrostatic discharge ring can play a role in reducing the resistance of a discharge path, so as to improve the electrostatic discharge performance of the image sensor.
Further, the first esd protection circuit further includes a plurality of first pads disposed on the first metal interconnection layer and surrounding the periphery of the second esd ring at intervals, the plurality of first pads are electrically connected to the first esd ring or the second esd ring, and the third esd ring can be connected to the first esd ring or the second esd ring at the first pad, that is, the second esd protection circuit is implemented with multiple degrees of freedom. When the first esd ring is a first ground ring, a second ground ring having a smaller impedance may be disposed on the second metal layer to be connected to the first ground ring having a larger impedance, thereby reducing the resistance of a leakage path; when the first esd ring is a first power ring, a second power ring with smaller impedance may be disposed on the second metal layer to connect to the first power ring with larger impedance, thereby reducing the resistance of the leakage path.
Furthermore, the second esd protection circuit further comprises a plurality of second pads disposed on the second metal layer and surrounding the periphery of the third esd ring at intervals, the second pads are electrically connected to the third esd ring, and the second pads are electrically connected to the first pads.
Furthermore, the bonding pads on the first metal interconnection layer and the second metal layer can be grounding bonding pads, power bonding pads, or bonding pads for providing routing, and an electrostatic discharge device is further arranged between each bonding pad and the corresponding electrostatic discharge ring. Therefore, the electrostatic protection structure of the image sensor of the embodiment of the invention can provide a discharge path for electrostatic charges applied to any bonding pad, limit the potential of all bonding pads on the chip to a lower level, and protect the internal circuit of the image sensor.
Further, the esd device may include a diode, and the diode is connected to the first esd protection circuit in a reverse blocking manner, so that the first esd protection circuit is in an off state when no charge is applied to the pad, and the first esd protection circuit is in an on state when there is a charge impact on the pad, so as to safely discharge the charge.
Furthermore, the first metal interconnection layer is disposed on one side of the front surface of the substrate, the second metal layer is disposed on one side of the back surface of the substrate, and the back surface of the substrate is a light incident surface of the image sensor.
The image sensor of the embodiment of the invention comprises the electrostatic protection structure, so the electrostatic discharge performance of the image sensor is improved.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (15)

1. An electrostatic discharge protection structure of an image sensor, the image sensor comprising: a substrate including a plurality of pixel regions; the first metal interconnection layer is arranged on one side of the substrate and comprises a pixel peripheral circuit; the second metal layer is arranged on the other side of the substrate;
the electrostatic protection structure comprises:
the first electrostatic discharge protection circuit is arranged on the first metal interconnection layer and comprises a first electrostatic discharge ring and a second electrostatic discharge ring; and
a second electrostatic discharge protection circuit disposed on the second metal layer, the second electrostatic discharge ring disposed around a periphery of the first electrostatic discharge ring, the second electrostatic discharge protection circuit including a third electrostatic discharge ring, an impedance of the third electrostatic discharge ring being smaller than respective impedances of the first electrostatic discharge ring and the second electrostatic discharge ring, the third electrostatic discharge ring being connected to the first electrostatic discharge ring or the second electrostatic discharge ring;
the impedance of the second electrostatic discharge protection circuit is smaller than that of the first electrostatic discharge protection circuit, and the second electrostatic discharge protection circuit and the first electrostatic discharge protection circuit are provided with at least two access points;
the first electrostatic discharge protection circuit is arranged on the periphery of the pixel peripheral circuit, and the second electrostatic discharge protection circuit is arranged on the second metal layer in an area opposite to the pixel peripheral circuit or the first electrostatic discharge protection circuit.
2. The electrostatic discharge protection structure of image sensor as claimed in claim 1, wherein said first electrostatic discharge protection circuit further comprises: a plurality of first pads on the first metal interconnection layer and disposed at intervals around the periphery of the second ESD ring;
the plurality of first welding pads are electrically connected with the first electrostatic discharge ring, the third electrostatic discharge ring is connected to the first electrostatic discharge ring at the first welding pads, or the plurality of first welding pads are electrically connected with the second electrostatic discharge ring, and the third electrostatic discharge ring is connected to the second electrostatic discharge ring at the first welding pads.
3. The electrostatic discharge protection structure of image sensor as claimed in claim 2, wherein said second electrostatic discharge protection circuit further comprises: and a plurality of second welding pads are arranged on the second metal layer and around the periphery of the third electrostatic discharge ring at intervals, the second welding pads are electrically connected with the third electrostatic discharge ring, and the second welding pads are electrically connected with the first welding pads.
4. The ESD structure of claim 3, wherein the first ESD ring is a power ring, the second ESD ring is a ground ring, the third ESD ring is a ground ring, the first pad and the second pad are both ground pads, and the first pad is electrically connected to the second ESD ring.
5. The electrostatic discharge protection structure of image sensor as claimed in claim 4, wherein said first electrostatic discharge protection circuit further comprises: and one end of the electrostatic discharge device is electrically connected with the first welding pad, and the other end of the electrostatic discharge device is connected into the first electrostatic discharge ring.
6. The electrostatic protection structure of image sensor as claimed in claim 5, wherein said electrostatic discharge device comprises a diode, an anode of said diode is electrically connected to said first bonding pad, and a cathode of said diode is connected to said first electrostatic discharge ring.
7. The ESD structure of claim 3, wherein the first ESD ring is a power ring, the second ESD ring is a ground ring, the third ESD ring is a power ring, the first pad and the second pad are power pads, and the first pad is electrically connected to the first ESD ring.
8. The electrostatic discharge protection structure of image sensor as claimed in claim 7, wherein said first electrostatic discharge protection circuit further comprises: and one end of the electrostatic discharge device is electrically connected with the first welding pad, and the other end of the electrostatic discharge device is connected into the second electrostatic discharge ring.
9. The electrostatic protection structure of an image sensor as claimed in claim 8, wherein the electrostatic discharge device comprises a diode, an anode of the diode is connected to the second electrostatic discharge ring, and a cathode of the diode is electrically connected to the first pad.
10. The electrostatic discharge protection structure of image sensor as claimed in claim 2, wherein said first electrostatic discharge protection circuit further comprises:
a plurality of third pads disposed on the first metal interconnect layer at intervals around a periphery of the second ESD ring; and
the first electrostatic discharge device is electrically connected with the third welding pad at one end, the other end of the first electrostatic discharge device is connected into the first electrostatic discharge ring, the second electrostatic discharge device is electrically connected with the third welding pad at one end, and the other end of the second electrostatic discharge device is connected into the second electrostatic discharge ring.
11. The electrostatic protection structure of an image sensor of claim 10, wherein the first electrostatic discharge ring is a power ring and the second electrostatic discharge ring is a ground ring;
the first electrostatic discharge device comprises a first diode, the anode of the first diode is electrically connected with the third welding pad, and the cathode of the first diode is connected into the first electrostatic discharge ring;
the second electrostatic discharge device comprises a second diode, the anode of the second diode is connected into the second electrostatic discharge ring, and the cathode of the second diode is electrically connected with the third welding pad.
12. The image sensor of claim 10, wherein the third pads are used for wire bonding.
13. The ESD structure of claim 1, wherein the first metal interconnection layer is disposed on a front side of the substrate, the second metal layer is disposed on a back side of the substrate, and the back side of the substrate is a light incident surface of the image sensor.
14. An image sensor, comprising:
a substrate including a plurality of pixel regions;
the first metal interconnection layer is arranged on one side of the front surface of the substrate and comprises a pixel peripheral circuit;
the second metal layer is arranged on one side of the back surface of the substrate; and
the electrostatic protection structure of the image sensor according to any one of claims 1 to 13;
wherein the back surface of the substrate is a light incident surface of the image sensor.
15. The image sensor of claim 14, further comprising:
a gate layer disposed between the substrate and the first metal interconnect layer; and
and the filter layer and the micro lens are arranged on the surface of the second metal layer, which faces away from the substrate.
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