CN109584806B - Display panel, driving method thereof and display device - Google Patents
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- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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Abstract
According to the display panel, the driving method thereof and the display device, the single driving chip is adopted, when the display panel is in a bent state, multi-pulse time-sharing light emission is carried out on the second display area for displaying the static picture, so that the effective light emitting time of the second display area is reduced, and the whole power consumption of the display panel is reduced during static display; in addition, the two independent driving chips can be arranged to respectively drive the first display area and the second display area, and when the display panel is in a bent state, the second display area displaying the static picture is driven by low frequency, so that the power consumption of the second display area can be reduced.
Description
[ technical field ] A method for producing a semiconductor device
The present disclosure relates to the field of display technologies, and in particular, to a display panel, a driving method thereof, and a display device.
[ background of the invention ]
Currently, display technologies have penetrated various aspects of people's daily lives, and accordingly, more and more materials and technologies are used for display screens. Nowadays, the mainstream display screens mainly include liquid crystal display screens and organic light emitting diode display screens. Because the Organic Light-Emitting Diode (OLED) display screen has a self-luminous property, compared with a liquid crystal display screen, a backlight module which consumes most energy is omitted, and therefore, the Organic Light-Emitting Diode display screen has the advantage of energy saving; in addition, the organic light emitting diode display screen has the characteristic of flexibility and bendability, and the OLED display screen has excellent bendability by adopting the flexible substrate and the plurality of conducting layers which are sequentially formed on the flexible substrate and comprise the thin film transistor driving array layer, the anode layer, the organic light emitting layer, the cathode layer and the thin film packaging layer.
In addition, how to achieve low power consumption of the display panel is a subject of continuous research, and when the flexible display panel is subjected to bending operation, how to achieve low power consumption of two different functional regions is a subject of more popular research.
[ application contents ]
In view of this, embodiments of the present application provide a display panel, a driving method thereof, and a display device, in which a first display area and a second display area are respectively driven by differentiation when the display panel is in a bent state, and the second display area displays a static image by using a time-sharing light emitting manner or a low-frequency driving manner, so as to reduce power consumption.
In one aspect, an embodiment of the present application provides a display panel, including a first display area and a second display area, where the first display area includes a plurality of first display units; the second display area comprises a plurality of second display units; the display panel also has a virtual bending axis;
when the display panel is in the first state, the effective light-emitting time T1 of the first display unit and the effective light-emitting time T2 of the second display unit are substantially equal in unit time;
when the display panel is in the second state, an effective light-emitting time T2 of the second display region is less than an effective light-emitting time T1 of the first display unit per unit time.
In a specific embodiment of the present application, when the display panel is in the first state, the first display area and the second display area jointly display the same screen; when the display panel is in the second state, the first display area and the second display area respectively and independently display different pictures.
In a specific embodiment of the present application, when the display panel is in the second state, the second display area is used for displaying a static picture, and the first display area is used for displaying a dynamic picture.
In a specific embodiment of the present application, the first display region includes a plurality of first light emission driving units for controlling light emission of the first display units; the second display region includes a plurality of second light emission driving units for controlling light emission of the second display units.
In a specific embodiment of the present application, the display panel further includes a first processing chip, and the first processing chip provides a first initialization signal and a second initialization signal to the first light-emitting driving unit and the second light-emitting driving unit, respectively; the first processing chip provides a first clock signal and a second clock signal to the first light-emitting driving unit; the first processing chip provides the first clock signal and the second clock signal to the second light-emitting driving unit; wherein the first clock signal and the second clock signal are opposite pulse signals.
In a specific embodiment of the present invention, when the display panel is in the second state, the duty ratio D2 of the second light-emitting signal outputted by the second light-emitting driving unit is smaller than the duty ratio D1 of the first light-emitting signal outputted by the first light-emitting driving unit.
In a specific embodiment of the present application, a ratio of the duty ratio D2 of the second light emitting signal to the duty ratio D1 of the first light emitting signal is 0.4 to 0.9.
In a specific embodiment of the present application, when the display panel is in the second state, the second initialization signal has a single pulse signal per unit time; the first initialization signal has N pulse signals, wherein N is greater than or equal to 1 and is a positive integer.
In a specific embodiment of the present application, N ranges from 4 to 8 (inclusive).
In a specific embodiment of the present application, when the display panel is in the first state, a duty ratio D1 of the first light emitting signal output by the first light emitting driving unit is substantially equal to a duty ratio D2 of the second light emitting signal output by the second light emitting driving unit.
In a specific embodiment of the present application, when the display panel is in the first state, the first initialization signal and the second initialization signal have the same timing in a unit time, and both the first initialization signal and the second initialization signal are single pulse signals.
In a specific embodiment of the present application, when the first light-emitting signal output by the first light-emitting driving unit is a low-level signal, the first display unit is in a light-emitting state; when the first light-emitting signal is a high-level signal, the first display unit is in a non-light-emitting state; when the second light-emitting signal is a low-level signal, the second display unit is in a light-emitting state; when the second light-emitting signal output by the second light-emitting driving unit is a high-level signal, the second display unit is in a non-light-emitting state.
In a specific embodiment of the present application, the display panel further includes a bending detection unit, configured to detect whether the display panel is in the first state or the second state;
when the display panel is detected to be in the first state, the bending detection unit feeds back a signal to the first processing chip, and the first processing chip outputs a corresponding signal to the first display area and the second display area;
when the display panel is detected to be in the second state, the bending detection unit feeds back a signal to the first processing chip, and the first processing chip outputs a corresponding signal to the first display area and the second display area.
In a specific embodiment of the present application, the bending detection unit includes a capacitive sensing component for detecting whether the display panel is in a bending state;
the first state is that the display panel is in a tiled and unfolded state; the second state is that the display panel is in a bending state, and the first display area and the second display area are bent by taking the virtual bending axis as a symmetry axis.
In a specific embodiment of the present application, the display panel further includes a second processing chip and a third processing chip, which are independently disposed from each other; the second processing chip provides data signals to the first display area at a first frequency F1; the third processing chip provides a data signal to the second display area at a second frequency F2; wherein the first frequency F1 is substantially equal to the second frequency F2 when the display panel is in the first state; when the display panel is in the second state, the second frequency F2 is less than the first frequency F1.
In a specific embodiment of the present application, when the display panel is in the second state, a ratio of the second frequency F2 to the first frequency F1 is in a range of 0.4 to 0.9 (inclusive).
In still another aspect, an embodiment of the present application provides a driving method of the display panel, the method including,
when the display panel is in the first state, the first initialization signal and the second initialization signal are written into a first light-emitting driving unit and a second light-emitting driving unit respectively;
the first light-emitting driving unit and the second light-emitting driving unit output the first light-emitting signal and the second light-emitting signal, respectively, wherein the first light-emitting signal and the second light-emitting signal are substantially identical;
when the display panel is in the second state, the first initialization signal and the second initialization signal are written into the first light-emitting driving unit and the second light-emitting driving unit respectively;
the first and second light emitting driving units output the first and second light emitting signals, respectively, wherein a duty ratio D2 of the second light emitting signal is less than a duty ratio D1 of the first light emitting signal; the output waveform of the first light emitting signal is not consistent with the output waveform of the second light emitting signal.
In a specific embodiment of the present application, when the display panel is in the second state, the first light emitting driving unit continuously outputs the first light emitting signal having a low level signal for a unit time; the second light-emitting driving unit outputs the second light-emitting signal with N pulse periods, wherein N is greater than or equal to 1 and is a positive integer.
In a specific embodiment of the present application, in a first state, the first processing chip simultaneously provides the first clock signal and the second clock signal to the first light-emitting driving unit and the second light-emitting driving unit, respectively; in a second state, the first processing chip simultaneously provides the first clock signal and the second clock signal to the first light-emitting driving unit and the second light-emitting driving unit, respectively.
In another aspect, an embodiment of the present application provides a display device, which includes the above display panel.
According to the display panel, the driving method thereof and the display device, the single driving chip is adopted, when the display panel is in a bent state, multi-pulse time-sharing light emission is carried out on the second display area for displaying the static picture, so that the effective light emitting time of the second display area is reduced, and the whole power consumption of the display panel is reduced during static display; in addition, the two independent driving chips can be arranged to respectively drive the first display area and the second display area, and when the display panel is in a bent state, the second display area displaying the static picture is driven by low frequency, so that the power consumption of the second display area can be reduced.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic view illustrating a bending operation of a display panel 10 in the related art;
fig. 2 is a schematic structural diagram of a display panel 1 according to an embodiment of the present application;
FIG. 3 is a further schematic view of the display panel 1 of FIG. 1;
fig. 4 is a schematic view illustrating a bending operation of the display panel 1 according to an embodiment of the present disclosure;
FIG. 5 is a schematic diagram of a driving circuit structure of the display panel 1 in FIG. 4;
FIG. 6 is a circuit schematic of the Emit driver circuit of FIG. 5;
FIG. 7 is a timing diagram illustrating the operation of the Emit driver circuit of FIG. 5;
FIG. 8 is a schematic diagram of the operation timing sequence of the driving circuit when the display panel 1 is in the first state;
FIG. 9 is a schematic diagram of the operation timing sequence of the driving circuit when the display panel 1 is in the second state;
fig. 10 is a schematic structural diagram of another display panel 1 provided in the embodiment of the present application;
FIG. 11 is a schematic diagram of a driving circuit structure of the display panel 1 in FIG. 10;
fig. 12 is a schematic flowchart of a display panel driving method according to an embodiment of the present application;
fig. 13 is a schematic structural diagram of a display device according to an embodiment of the present application.
[ detailed description ] embodiments
For better understanding of the technical solutions of the present application, the following detailed descriptions of the embodiments of the present application are provided with reference to the accompanying drawings.
It should be understood that the embodiments described are only a few embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
In the description herein, it is to be understood that the terms "substantially", "approximately", "about", "substantially", and the like, as used in the claims and the examples herein, are intended to be generally accepted as not being precise, within the scope of reasonable process operation or tolerance.
It should be understood that although the terms first, second, third, etc. may be used to describe the display regions in the embodiments of the present application, the flexible substrates should not be limited to these terms. These terms are only used to distinguish the display areas from each other. For example, the first display region may also be referred to as a second display region, and similarly, the second display region may also be referred to as a first display region without departing from the scope of the embodiments of the present application.
As shown in fig. 1, after a bending operation is performed on a flexible display panel 10 in the related art along a bending axis aa', two display areas a for displaying a dynamic picture and two display areas B for displaying a static picture are formed, where light emitting surfaces of the display areas a and the light emitting surfaces of the display areas are opposite to each other. Generally, the display area B is used for displaying static images such as a virtual keyboard, a game pad, and the like, so that a user can perform text input or game control. The display area B does not require high quality of the display screen. When the related art is applied, the display area a and the display area B use the same driving frequency and scanning manner regardless of whether the display panel is subjected to the bending operation. When the display panel is in a bent state, the same driving frequency and scanning driving manner as those of the display area a are adopted, and the required precision of the display area B on the display picture is not good, so that more redundant power consumption is generated.
Therefore, the embodiment of the application provides a display panel, a driving method thereof and a display device, wherein a first display area and a second display area are respectively driven by a touch signal of a touch unit positioned on a light emitting side of the display unit through differentiation, wherein the second display area adopts a time-sharing light emitting mode or a low-frequency driving mode to display a static picture, so that power consumption is reduced.
Specifically, the display panel includes a first display area and a second display area, the first display area including a plurality of first display units; the second display area comprises a plurality of second display units; the display panel also has a virtual bending axis;
when the display panel is in the first state, the effective light-emitting time T1 of the first display unit and the effective light-emitting time T2 of the second display region are substantially equal in unit time;
when the display panel is in the second state, an effective light-emitting time T1 of the first display element is less than an effective light-emitting time T2 of the second display region in a unit time.
Specifically, as shown in fig. 2 to 11, the present embodiment provides a display panel 1, which may be a flexible and bendable display panel, and specifically, as shown in fig. 2 to 4, the display panel 1 includes a bending region R, a first display region 11, and a second display region 12. The bending region R means that the display panel can be bent at different angles along the virtual bending axis XX'. As shown in fig. 2, the display panel 1 is completely and symmetrically folded along the first virtual folding axis XX', so that the display panel is reduced to half of the size in the unfolded state. Note that the virtual folding axis XX' is not a physical component, and is a virtual line segment along which the display panel 1 is folded. Or, an area in the bending region R is artificially referred to as a virtual bending axis XX', which is actually a preset display area on the display panel. In addition, for the virtual bending axis XX 'may be located at the middle line of the bending region R, the flexible display panel 1 or the flexible display module may implement symmetrical bending or folding along the virtual bending axis XX'.
Alternatively, as shown in fig. 2, the display panel 2 may be folded along the folding axis according to a folding mechanism (not shown in fig. 2), and the folding region R in the folded state has an arc-shaped structure. Of course, in the embodiment of the present invention, the flexible display panel 1 can be folded toward the direction of the screen display picture, which is referred to as "fold-in" for short; folding towards the direction away from the screen display picture can also be called outward folding. In addition, as shown in fig. 2 to 3, the display area of the display panel 1 includes a bending area R, a first display area 11 and a second display area 12 (both are non-bending areas), and the display area in the bending area R includes a plurality of display cells D11; a display area in the non-bending region (the first display region 11 and the second display region 12) includes a plurality of display units, and specifically, the first display region 11 includes a plurality of first display units D12; the second display area 12 includes a plurality of second display cells D13 therein. That is, the normal display screen can be performed in the display region of the bending region R as in the other regions of the non-bending region.
The reason why the display panel in the embodiment of the present invention can be folded or bent is that in the embodiment of the present invention, the flexible substrate, such as a high-light-transmittance polymer substrate, adopted by the display panel 1 can ensure that the display panel can be in a flexible and bendable state, and in the embodiment of the present invention, the bending curvature radius r of the display panel is between 0.3mm and 1.0mm, so as to ensure that a user can freely implement bending operation. In addition, in the present document, "bending" is a bending operation in different angular directions including symmetrical folding and the like.
In addition, as shown in fig. 2 to 4, in a specific embodiment of the present application, the display panel 1 further includes a first processing Chip 14 located in the lower step region (also in the non-display region), where the first processing Chip 14 may be bound On the flexible substrate of the display panel through a COP (Chip On PI, Chip On Plastic, Chip integrated On polymer substrate) process, so as to implement display function control and touch function control On the display panel 1. The first processing chip 14 supplies various kinds of control signals, such as a data driving signal, a gate driving signal, a light emission control signal, a constant voltage signal, and the like, to the display panel 1.
Because the display panel 1 is a flexible and bendable display panel, the display panel 1 can be bent along the virtual bending axis XX', as shown in fig. 4, the display panel 1 can be in a first state, i.e., a tiled state, the first display area 11 and the second display area 12 are on the same horizontal plane, and the two display areas are used for displaying the same complete picture; when the display panel 1 is bent along the virtual bending axis XX', it may be in a second state, that is, light emitting surfaces of both the first display area 11 and the second display area 12 are disposed opposite to each other. In this state, the display panel 1 can realize a user interface like a "notebook computer" or a "game machine". For example, the first display area 11 is used to display dynamic pictures, such as playing movies, playing pictures, displaying an APP interface, etc., and the second display area 12 may be used as a virtual keyboard or a game pad to implement a human-computer interaction interface. That is, when the display panel 1 is in the second state, the first display area 11 and the second display area 12 are used to independently display different screens, respectively. Therefore, when the display panel 1 is in the second state, the first display area and the second display area can be controlled by the first processing chip 14, respectively.
In one embodiment of the present application, the display panel further has a bending detection unit (not shown in the figure) for detecting whether the display panel 1 is in the first state or the second state. When the display panel 1 is detected to be in the first state, the bending detection unit feeds back a signal to the first processing chip 14, and the first processing chip 14 outputs a corresponding signal to the first display area 11 and the second display area; when the display panel 1 is in the second state, the bending detection unit feeds back a signal to the first processing chip 14, and the first processing chip 14 outputs a corresponding signal to the first display area 11 and the second display area 12. In a specific embodiment of the present application, the bending detection unit may be a capacitive sensing component, and a metal electrode block may be disposed on the light emitting side of the bending region R of the display panel 1 and on the substrate, respectively, to form a parallel plate capacitor for detecting whether the display panel is in a bending state. When the display panel is in a tiled and unfolded state, no capacitance change exists in the parallel plate capacitor, namely the capacitance sensing component is in a first state and feeds back the capacitance sensing component to the first processing chip; when the first display area 11 and the second display area 12 are bent with the virtual bending axis XX' as the symmetry axis, the bending area R of the display panel is deformed, and thus the capacitance changes. At this time, the capacitance in the parallel plate capacitor changes, i.e. the second state, and the capacitive sensing component feeds back to the first processing chip.
As to the structure of the driving circuit of the display panel 1, as shown in fig. 4 to 9, the first display area 11 includes a plurality of mutually cascaded Emit driving circuits of the 11 areas, which are first light emitting driving units, and is configured to output the light emitting control signal Emit to the pixel circuits of the corresponding row, so as to control the light emission of the first display units of the corresponding row. It should be noted that each first display unit includes a pixel circuit and a light emitting unit which are correspondingly arranged; the pixel circuit receives the emission control signal Emit to generate a drive current, and supplies the drive current to the light emitting unit to Emit light.
The second display area 12 includes a plurality of second light-emitting driving units, that is, an Emit driving circuit in the area 12, which are cascaded with each other, and is configured to output a light-emitting control signal Emit to the pixel circuits in the corresponding row, so as to control light emission of the first display units in the corresponding row. It should be noted that each second display unit includes a pixel circuit and a light emitting unit which are correspondingly arranged; the pixel circuit receives the emission control signal Emit to generate a drive current, and supplies the drive current to the light emitting unit to Emit light.
For the first and second light emission driving units, both are controlled by the first processing chip, and specifically, the first processing chip provides the first initialization signal STV1, the first clock signal CK1, and the second clock signal CK2 to the first light emission driving unit; the second processing chip supplies the second initialization signal STV2, the first clock signal CK1, and the second clock signal CK2 to the second light-emission driving unit. That is, the first processing chip supplies the same clock signals, i.e., the first clock signal CK1 and the second clock signal CK2, to the first display area 11 and the second display area 12, wherein the first clock signal CK1 and the second clock signal CK2 are pulse signals opposite to each other. The first processing chip provides independent initialization signals to the first display area 11 and the second display area 12, respectively, to control the corresponding light emitting driving units.
With continued reference to fig. 5, the operation mechanism and structure of the Emit circuit of the 11-region, which is a plurality of mutually cascaded first light emitting driving circuits in the first display region 11, are as follows: for the first-stage light-emitting driving circuit, the 11-region 1 st bit driving circuit receives the first initialization signal STV1, the first clock signal CK1 and the second clock signal CK2 provided by the first processing chip, and then outputs the first-stage light-emitting control signal Emit11 to the 11-region 1 st-row pixel circuit to realize light-emitting control of the first display unit in the first row; meanwhile, the emission control signal Emit11 of the first stage is also used as an input signal of the second-stage emission driving circuit, and the emission control signals Emit of the corresponding rows are sequentially generated in a cascade mode until the emission control signal Emit1N of the nth stage is output by the last-stage emission driving circuit.
The operation mechanism and structure of the Emit circuit for the plurality of second light emission driving circuits cascade-connected to each other in the second display area 12, that is, the area 12 are substantially the same as those of the first light emission driving circuit. Namely: for the first-stage light-emitting driving circuit, the 12-region 1 st Emit driving circuit receives the second initialization signal STV2, the first clock signal CK1 and the second clock signal CK2 provided by the first processing chip, and then outputs the first-stage light-emitting control signal Emit21 to the 21-region 1 st-row pixel circuit, so as to realize light-emitting control of the second display unit in the first row; meanwhile, the emission control signal Emit21 of the first stage is also used as an input signal of the second-stage emission driving circuit, and the emission control signals Emit of the corresponding rows are sequentially output in a cascade manner until the emission control signal Emit2N of the nth stage is output by the last-stage emission driving circuit.
As to the specific structure and operation manner of the light emitting driving circuits in the first display area 11 and the second display area 12, fig. 6 to 7 can be used, wherein the operation process is explained by taking the level 1 Emit driving circuit as an example when the display panel 1 is in the first state.
In a period t4, the first clock signal CK is at a low level, the second clock signal CK2 is at a high level, and the input signal stv (in) is at a high level; the first transistor M1 and the second transistor M2 are turned on, the high level of the input signal IN is transmitted to the N1 node through the first transistor M1, and the tenth transistor M10 is turned off. The node N2 is kept high at the previous time by the second capacitor C2, and the ninth transistor M9 is turned off. The output terminal Emit continuously outputs the low level at the previous time. On the other hand, the low level and VGL of the first clock signal CK are output to the gates of the fifth transistor M5 and the sixth transistor M6 through the third transistor M3 and the second transistor M2, respectively; the sixth transistor M6 is turned on, and the high level of the second clock signal is transmitted to the other pole of the capacitor C3, at which time a low level signal is output.
IN a period t5, the first clock signal CK is at a high level, the second clock signal CK2 is at a low level, and the input signal IN is at a low level; since the gate of the sixth transistor M6 is at a low level at the previous time, M6 is turned on, and the low level of the second clock signal CK2 is transmitted to the other pole of the capacitor C3. At the same time, the other pole of the capacitor C3 is at a high level at the upper moment, which is at a low level, so that the gate potential of the sixth transistor M6 is further lowered by the coupling of the capacitor C3. Meanwhile, the seventh transistor M7 is turned on, and the low level is transmitted to the N2 node, so that the ninth transistor M9 is turned on, and the high level signal VGH is transmitted to the output signal terminal Emit through the ninth transistor M9, at which time the high level signal is output. Meanwhile, the fifth transistor M5 and the fourth transistor M4 are turned on, and a high level signal is transmitted to the N1 node, so that the tenth transistor M10 is turned off, and at this time, a high level signal is output.
At the stage t6, the first clock signal CK is at a low level, the second clock signal CK2 is at a high level, and the input signal IN is at a low level; the first transistor M1 and the second transistor M2 are turned on, the low level of the input signal IN is transmitted to the N1 node through the first transistor M1, the tenth transistor M10 is turned on, and the low level signal VGL is transmitted to the output terminal exit through the tenth transistor M10; on the other hand, the gate of the eighth transistor M8 is connected to the N1 node, so that the eighth transistor M8 is turned on, a high level signal VGH is transmitted to the gate of the ninth transistor M9, and the ninth transistor M9 is turned off; at this time, a low level signal is output.
At the stage t7, the first clock signal CK is at a high level, the second clock signal CK2 is at a low level, and the input signal STV1(IN) is at a low level; the node N1 keeps the low level at the previous moment, so that the tenth transistor M10 is turned on, and the low level signal VGL is transmitted to the output end exit; meanwhile, the second clock signal CK2 changes from a high level at the previous time to a low level and is coupled to the N1 node through the first capacitor C1, so that the tenth transistor M10 better outputs a low level VGL; meanwhile, the high level of the first clock signal CK is transmitted to the gate of the fifth transistor M5 through the third transistor M3, so that the fifth transistor M5 is turned off, preventing the high level VGH from being transmitted to the N1 node. On the other hand, the N1 node is low to turn on the eighth transistor M8, and the high signal VGH is transmitted to the N2 node to turn off the ninth transistor M9; at this time, a low level signal is output. Thereafter, the t6 phase and the t7 phase are repeated to output the low level only continuously until the high level start signal of the next frame.
Based on the above architecture and operation process of the Emit driving circuit, when the display panel 1 is in the first state, as shown in fig. 5 and 8, the operation timing of the driving circuit of the display panel is as shown in fig. 8, specifically, when the display panel 1 is in the first state, since the first display area 11 and the second display area 12 display the same picture together, the timing of the clock signal and the initialization signal provided by the first processing chip to the first display area 11 and the second display area 12 at this time are substantially identical. Specifically, the first initialization signal STV1 and the second initialization signal STV2 have the same timing and are both single pulse signals in a unit time, so that the output waveforms and timings of the first emission signal Emit11 and the second emission control signal Emit21 output from the first emission driving unit and the second emission driving unit, respectively, are also substantially identical. For example, the duty ratio D1 of the first emission signal Emit11 output by the first emission driving unit is substantially equal to the duty ratio D2 of the second emission signal Emit11 output by the second emission driving unit. In the first state, the first display area 11 and the second display area 12 can be regarded as a unified display area, and the signals given to the two display areas by the first processing chip 14 are consistent, so that the same complete picture can be displayed.
In addition, in one embodiment of the present application, the thin film transistor in the light emitting driving unit is a P-type MOS transistor, and is in a conducting state when a low level signal is passed. Therefore, when the first light-emitting signal is a low-level signal, the first display unit is in a light-emitting state; when the first light-emitting signal is a high-level signal, the first display unit is in a non-light-emitting state; when the second light-emitting signal is a low level signal, the second display unit is in a light-emitting state; when the second light-emitting signal is a high level signal, the second display unit is in a non-light-emitting state. That is, if the light-emitting signal is continuously outputted at a low level, the display unit is in a light-emitting state. Then, when the display panel is in the first state, the effective light-emitting time T1 of the first display cell located in the first display region 11 and the effective light-emitting time T2 of the second display region are substantially equal in unit time. Because the timing of the light emission signals of the two are substantially identical to the output waveform.
When the display panel 1 is in the second state, in a specific implementation manner of the embodiment of the present application, the second light-emitting driving unit of the second display area 12 outputs the light-emitting control signals of a plurality of pulses in a time-sharing manner, and the reduction of the power consumption is realized by reducing the duty ratio of the second light-emitting signal. Specifically, as shown in fig. 5 and fig. 9, the operation timing of the driving circuit of the display panel is shown in fig. 9, specifically, when the display panel 1 is in the second state, since the first display area 11 and the second display area 12 respectively display the images independently, wherein the first display area 11 is used for displaying the dynamic images, the image quality with high quality is required; the second display area 12 is used for displaying a static picture, such as a virtual keyboard, and does not need to display a high-quality picture like the first display area 11, so that the timing sequence and the output waveform of the light emitting signals from the first processing chip to the first display area 11 and the second display area 12 are not consistent at this time.
Specifically, the first initialization signal STV1 and the second initialization signal STV2 have different timings and numbers of pulses per unit time. The first initialization signal STV1 outputs a single pulse signal, so that the output waveform of the first light-emitting signal Emit11 output by the first light-emitting driving unit is also a single pulse signal; the second initialization signal STV2 outputs N (N is 1 or more and a positive integer) pulse signals, so that the output waveform of the second emission signal Emit21 output by the second emission driving unit is also N pulse signals. In a specific embodiment of the present application, N is in a range of 4 to 8 (inclusive), and in a preferred embodiment of the present application, N is 6, that is, in a unit time, the second initialization signal STV2 outputs 6 pulse signals, and then the output waveform of the output second emission signal Emit21 is also 6 pulse signals. In this case, the transistors in the second pixel circuit can be smoothly turned on, and the light-emitting time can be ensured. At the same time, the power consumption of the second display region 12 can be further reduced.
As shown in fig. 9, specifically, when the display panel 1 is in the second state, taking the first-stage emission driving unit (11-block 1 st-stage emission driving circuit) of the first display area 11 and the first-stage emission driving unit (12-block 1 st-stage emission driving circuit) of the second display area 12 as an example, the duty ratio D2 of the second emission signal emission 21 output by the second emission unit is smaller than the duty ratio D1 of the first emission signal emission 11 output by the first emission driving unit. That is, when the display panel 1 is in the second state, the time during which the second light emission signal Emit21 is in the low level state is shorter than the time during which the first light emission signal Emit11 is in the low level state per unit time. Since the P-type TFT transistor is used in the pixel circuit in the embodiment of the present application, the low level is turned on, so that the light emitting unit emits light. Therefore, in the second state, the effective lighting time T2 of the second display region 12 is less than the effective lighting time T1 of the first display element 11 per unit time. More specifically, in one embodiment of the present application, a ratio of the duty ratio D2 of the second light emitting signal to the duty ratio D1 of the first light emitting signal is 0.4-0.9 per unit time. That is, the low level output time of the second light emitting signal is 0.4 to 0.9 times of the low level output time of the first light emitting signal. In a preferred embodiment of the present application, in order to ensure that the picture displayed in the second display area 12 is normal, that is, to ensure sufficient charging time for the pixel circuit, and to effectively reduce the power consumption of the second display area 12, a ratio of the duty ratio D2 of the second light-emitting signal to the duty ratio D1 of the first light-emitting signal may be about 0.6.
In the above embodiment, the control of the first display area and the second display area in different states is realized through a single processing chip, specifically, the display panel is in a bent state, and a multi-pulse time-sharing light-emitting driving mode is adopted for the second display area displaying a static picture, so that the effective light-emitting time of the second display area is reduced, and the power consumption of the whole display panel is reduced.
On the basis of the above embodiments, the present application also provides a driving method of the display panel 1, as shown in fig. 12, the method including:
firstly, judging the state of the display panel, specifically checking whether the display panel is in a bending state or a flat spreading state through a capacitance sensing component;
when the display panel is in the first state, the first processing chip writes a first initialization signal STV1 and a second initialization signal STV2 to the first light-emitting driving unit and the second light-emitting driving unit, respectively; then, the first light-emitting driving unit and the second light-emitting driving unit output a first light-emitting signal and a second light-emitting signal, respectively, wherein the first light-emitting signal and the second light-emitting signal are substantially identical. Specifically, the first initialization signal STV1 and the second initialization signal STV2 have the same timing and are both single pulse signals in a unit time, so that the output waveforms and timings of the first emission signal Emit11 and the second emission control signal Emit21 output from the first emission driving unit and the second emission driving unit, respectively, are also substantially identical.
When the display panel is in the second state, the first processing chip writes the first and second initialization signals STV1 and STV2 to the first and second light-emitting driving units, respectively. Specifically, the first and second light emitting driving units output first and second light emitting signals, respectively, wherein a duty ratio D2 of the second light emitting signal is smaller than a duty ratio D1 of the first light emitting signal; the output waveform of the first light emitting signal is not identical to the output waveform of the second light emitting signal.
Specifically, when the display panel is in the second state, the first light-emitting driving unit continuously outputs the first light-emitting signal having a low-level signal for a unit time; the second light-emitting driving unit outputs a second light-emitting signal with N pulse periods, wherein N is greater than or equal to 1 and is a positive integer. In a specific embodiment of the present application, N ranges from 4 to 8 (inclusive)
In addition, the clock signals provided by the first processing chip to the first display area and the second display area are substantially identical regardless of whether the display panel is in the first state or the second state, as shown in fig. 8 to 9, and specifically, in the first state, the first processing chip simultaneously provides the first clock signal CK1 and the second clock signal CK2 to the first light emission driving unit and the second light emission driving unit, respectively; in the second state, the first processing chip simultaneously supplies the first clock signal CK1 and the second clock signal CK2 to the first light-emission driving unit and the second light-emission driving unit, respectively.
With the above, when the display panel is in the bent state, the second display region 12 is driven by time-sharing light emission, so that the overall power consumption of the display panel can be reduced.
On the basis of the above embodiments, the present application further provides another display panel 1, specifically as shown in fig. 10 to 11, the display panel includes a second processing chip 141 and a third processing chip 142 that are independently disposed from each other; wherein the second processing chip 141 is bound at one end portion of the display panel by the COF technique; the third processing chip 142 is bonded to the other end portion of the display panel by the COF technique. The second processing chip 141 and the third processing chip 142 are respectively used for driving the first display area 11 and the second display area 12.
As shown in fig. 11, the second processing chip 141 provides data signals (not shown) to the plurality of first display units in the first display area 11; supplying a third initialization signal STV3, a clock signal CK31, a clock signal CK31 and the like to a plurality of first light-emitting driving units (i.e., 11-block nth-stage Emit driving circuits) to realize control of an output signal Emit1N of the first light-emitting driving units;
the third processing chip 142 provides data signals (not shown in the figure) to the plurality of second display units in the second display area 12; the fourth initialization signal STV4, the clock signal CK41, the clock signal CK41, and the like are supplied to a plurality of second light-emission driving units (i.e., the 12-block nth-stage Emit driving circuit) to realize control of the output signal Emit2N of the second light-emission driving units.
Since the first display area 11 and the second display area 12 are controlled by two independent processing chips, the purpose of reducing power consumption can be achieved by controlling the input frequency of the data signal in the present embodiment. Specifically, the second processing chip 141 supplies the data signal to the first display area 11 at the first frequency F1; the third processing chip 142 provides the data signal to the second display area 12 at the second frequency F2.
When the display panel is in the first state (i.e. the first display area and the second display area jointly display the same complete picture in the tiled and unfolded state), the first frequency F1 is substantially equal to the second frequency F2, so as to ensure uniformity of picture display.
When the display panel is in the second state (i.e. the first display area and the second display area independently display the image in the tiled and unfolded state), since the second display area 12 is used for displaying the image with lower image quality requirement, the frequency of data signal input can be reduced, and the second frequency F2 can be set to be smaller than the first frequency F1. In one embodiment of the present application, when the display panel is in the second state, a ratio of the second frequency F2 to the first frequency F1 is in a range of 0.4 to 0.9. In a preferred embodiment, when the display panel is in the second state, the data signal may be provided to the first display area 11 at the first frequency F1 of 60HZ, and the data signal may be provided to the second display area 12 at the second frequency F2 of 30 HZ. That is, the effective lighting time T2 of the second display element is less than the effective lighting time T1 of the first display element per unit time. Because the second display area 12 has low requirements for the display picture at this time, the picture is displayed in a low-frequency driving mode, so that the picture display can be ensured, and the power consumption can be saved.
In this embodiment, two independent processing chips are used to independently control the first display area 11 and the second display area 12, so that the processing algorithm for the display screen becomes simpler.
Fig. 13 is a schematic structural diagram of the display device provided in the embodiment of the present application, and the display device includes the display panel 1, where a specific structure of the display panel 1 has been described in detail in the embodiment, and is not described again here. Of course, the display device shown in fig. 13 is only a schematic illustration, and the display device may be any electronic device with a display function, such as a mobile phone, a tablet computer, a notebook computer, an electronic book, or a television.
Because the display device provided by the embodiment of the application comprises the display panel, the driving method thereof and the display device provided by the embodiment of the application realize multi-pulse time-sharing light emission of the second display area for displaying the static picture by arranging the single driving chip when the display panel is in a bent state, thereby reducing the effective light emitting time of the second display area and further reducing the overall power consumption of the display panel during static display; in addition, the two independent driving chips can be arranged to respectively drive the first display area and the second display area, and when the display panel is in a bent state, the second display area displaying the static picture is driven by low frequency, so that the power consumption of the second display area can be reduced.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.
Claims (17)
1. A foldable display panel comprising a first display area and a second display area, the first display area comprising a plurality of first display units; the second display area comprises a plurality of second display units;
the display panel also has a virtual bending axis;
when the display panel is in the first state, the effective light-emitting time T1 of the first display unit and the effective light-emitting time T2 of the second display unit are substantially equal in unit time;
when the display panel is in a second state, the effective light-emitting time T2 of the second display unit is less than the effective light-emitting time T1 of the first display unit in a unit time;
when the display panel is in the first state, the first display area and the second display area jointly display the same picture;
when the display panel is in the second state, the first display area and the second display area respectively and independently display different pictures;
the first display area includes a plurality of first light emission driving units for controlling light emission of the first display units;
the second display region includes a plurality of second light emission driving units for controlling light emission of the second display units;
the display panel further comprises a first processing chip,
the first processing chip provides a first initialization signal and a second initialization signal to the first light-emitting driving unit and the second light-emitting driving unit respectively;
the first processing chip provides a first clock signal and a second clock signal to the first light-emitting driving unit;
the first processing chip provides the first clock signal and the second clock signal to the second light-emitting driving unit;
wherein the first clock signal and the second clock signal are opposite pulse signals.
2. The display panel according to claim 1, wherein when the display panel is in the second state, the second display area is used for displaying a static picture, and the first display area is used for displaying a dynamic picture.
3. The display panel according to claim 1, wherein when the display panel is in the second state, a duty ratio D2 of the second light emission signal output by the second light emission driving unit is smaller than a duty ratio D1 of the first light emission signal output by the first light emission driving unit.
4. The display panel according to claim 3, wherein the ratio of the duty ratio D2 of the second light emitting signal to the duty ratio D1 of the first light emitting signal is 0.4-0.9.
5. The display panel according to claim 3, wherein the first initialization signal has a single pulse signal per unit time when the display panel is in the second state; the second initialization signal has N pulse signals, N is greater than or equal to 1 and is a positive integer.
6. The display panel according to claim 5, wherein N is in a range of 4 to 8.
7. The display panel of claim 1, wherein when the display panel is in the first state, a duty ratio D1 of the first light emitting signal outputted by the first light emitting driving unit is substantially equal to a duty ratio D2 of the second light emitting signal outputted by the second light emitting driving unit.
8. The display panel according to claim 7, wherein the first initialization signal and the second initialization signal have the same timing in a unit time when the display panel is in the first state, and both are single pulse signals.
9. The display panel according to claim 1, wherein when the first light-emitting signal output from the first light-emitting driving unit is a low-level signal, the first display unit is in a light-emitting state; when the first light-emitting signal is a high-level signal, the first display unit is in a non-light-emitting state;
when the second light-emitting signal output by the second light-emitting driving unit is a low-level signal, the second display unit is in a light-emitting state; when the second light-emitting signal is a high level signal, the second display unit is in a non-light-emitting state.
10. The display panel according to claim 1, wherein the display panel further comprises a bend detection unit configured to detect whether the display panel is in the first state or the second state;
when the display panel is detected to be in the first state, the bending detection unit feeds back a signal to the first processing chip, and the first processing chip outputs a corresponding signal to the first display area and the second display area;
when the display panel is detected to be in the second state, the bending detection unit feeds back a signal to the first processing chip, and the first processing chip outputs a corresponding signal to the first display area and the second display area.
11. The display panel according to claim 10, wherein the bending detection unit includes a capacitance sensing part for detecting whether the display panel is in a bent state;
the first state is that the display panel is in a tiled and unfolded state; the second state is that the display panel is in a bending state, and the first display area and the second display area are bent by taking the virtual bending axis as a symmetry axis.
12. The display panel according to claim 1 or 2, wherein the display panel further comprises a second processing chip and a third processing chip provided independently of each other;
the second processing chip provides data signals to the first display area at a first frequency F1; the third processing chip provides a data signal to the second display area at a second frequency F2;
wherein the first frequency F1 is substantially equal to the second frequency F2 when the display panel is in the first state;
when the display panel is in the second state, the second frequency F2 is less than the first frequency F1.
13. The display panel according to claim 12, wherein the ratio of the second frequency F2 to the first frequency F1 is in the range of 0.4-0.9 when the display panel is in the second state.
14. A method of driving a display panel, wherein the display panel is the display panel according to any one of claims 1 to 13,
the method comprises the following steps of,
when the display panel is in the first state, a first initialization signal and a second initialization signal are respectively written into a first light-emitting driving unit and a second light-emitting driving unit;
the first light-emitting driving unit and the second light-emitting driving unit respectively output a first light-emitting signal and a second light-emitting signal, wherein the first light-emitting signal and the second light-emitting signal are substantially consistent;
when the display panel is in the second state, the first initialization signal and the second initialization signal are written into the first light-emitting driving unit and the second light-emitting driving unit respectively;
the first and second light emitting driving units output the first and second light emitting signals, respectively, wherein a duty ratio D2 of the second light emitting signal is less than a duty ratio D1 of the first light emitting signal; the output waveform of the first light emitting signal is not consistent with the output waveform of the second light emitting signal.
15. The method of claim 14, wherein the first light emitting driving unit continuously outputs the first light emitting signal having a low level signal for a unit time when the display panel is in the second state;
the second light-emitting driving unit outputs the second light-emitting signal with N pulse periods, wherein N is greater than or equal to 1 and is a positive integer.
16. The method of claim 15, wherein in the first state, the first processing chip simultaneously provides a first clock signal and a second clock signal to the first light emitting driving unit and the second light emitting driving unit, respectively;
in a second state, the first processing chip simultaneously provides the first clock signal and the second clock signal to the first light-emitting driving unit and the second light-emitting driving unit, respectively.
17. A display device comprising the display panel according to any one of claims 1 to 13.
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| KR102631015B1 (en) * | 2019-06-05 | 2024-01-30 | 엘지디스플레이 주식회사 | Foldable display and driving method thereof |
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| WO2021000233A1 (en) | 2019-07-01 | 2021-01-07 | 京东方科技集团股份有限公司 | Display panel and display device |
| KR102622270B1 (en) | 2019-07-01 | 2024-01-09 | 보에 테크놀로지 그룹 컴퍼니 리미티드 | Display panel, display device and driving method |
| WO2021000235A1 (en) | 2019-07-01 | 2021-01-07 | 京东方科技集团股份有限公司 | Display panel, display device and driving method |
| CN112449712B (en) | 2019-07-01 | 2024-01-09 | 京东方科技集团股份有限公司 | Display panel, display driving method thereof and display device |
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| CN110827786A (en) * | 2019-12-09 | 2020-02-21 | 王红梅 | Method for adjusting brightness uniformity of folding screen |
| CN110992884B (en) * | 2019-12-24 | 2021-07-09 | 武汉天马微电子有限公司 | Display panel, display device and detection compensation method of display panel |
| KR20210082895A (en) | 2019-12-26 | 2021-07-06 | 엘지디스플레이 주식회사 | Foldable display device |
| CN111583847B (en) | 2020-05-08 | 2022-02-01 | 武汉华星光电半导体显示技术有限公司 | Display module, driving method thereof and display device |
| KR20220001555A (en) | 2020-06-29 | 2022-01-06 | 삼성디스플레이 주식회사 | Display device |
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| CN104933964B (en) * | 2015-07-03 | 2018-09-07 | 京东方科技集团股份有限公司 | Flexible display screen, display equipment and the display methods applied to flexible display screen |
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