CN109560172B - Semi-polar gallium-nitrogen epitaxial wafer and preparation method thereof - Google Patents

Semi-polar gallium-nitrogen epitaxial wafer and preparation method thereof Download PDF

Info

Publication number
CN109560172B
CN109560172B CN201811255304.7A CN201811255304A CN109560172B CN 109560172 B CN109560172 B CN 109560172B CN 201811255304 A CN201811255304 A CN 201811255304A CN 109560172 B CN109560172 B CN 109560172B
Authority
CN
China
Prior art keywords
gan
epitaxial wafer
tmga
temperature
pressure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201811255304.7A
Other languages
Chinese (zh)
Other versions
CN109560172A (en
Inventor
方志来
吴征远
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fudan University
Original Assignee
Fudan University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fudan University filed Critical Fudan University
Priority to CN201811255304.7A priority Critical patent/CN109560172B/en
Publication of CN109560172A publication Critical patent/CN109560172A/en
Application granted granted Critical
Publication of CN109560172B publication Critical patent/CN109560172B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention belongs to the technical field of semiconductor materials, and particularly relates to a high-quality semipolar (11-22) gallium-nitrogen (GaN) epitaxial wafer and a preparation method thereof. The method adopts the metal organic chemical vapor phase epitaxy technologyThe preparation method of the epitaxial wafer comprises the following steps: firstly, growing silicon nitride (SiN) on an m-plane sapphire substratex) A thin layer as a nano-mask layer; then in SiNxGrowing high-temperature GaN islands on the thin layer; then controlling conditions to enable the islands to be asymmetrically combined; and finally, continuously adopting asymmetric growth conditions to grow (11-22) GaN thin films. The high-quality semi-polar (11-22) GaN epitaxial wafer prepared by the method can be used for preparing high-efficiency Light Emitting Diodes (LEDs) from purple light to infrared bands.

Description

Semi-polar gallium-nitrogen epitaxial wafer and preparation method thereof
Technical Field
The invention belongs to the technical field of semiconductor materials, and particularly relates to a semi-polar gallium-nitrogen (GaN) epitaxial wafer and a preparation method thereof.
Background
Conventional c-plane III-nitride materials can be used to fabricate high-efficiency LEDs and high-power Lasers (LDs) [1 ]. However growing c-plane heterostructure InGaN/GaN (AlGaN/GaN) materials faces: 1. phase separation, 2, high density penetration defects, 3, strong polarization fields, etc., and thus new techniques are needed to solve or improve the above problems, thereby further improving the working efficiency of the existing devices and reducing the energy consumption. One such method is to grow a quantum well structure on the semipolar face of the group III nitride material. The semipolar plane has the advantages of low polarization field and large growth window, so it can be used to prepare high-efficiency LEDs and high-power LDs [2 ].
The most recently used for research and production are the (11-22) plane and (20-21) plane group III nitrides. Growing (20-21) plane III-nitride materials requires the use of costly homoepitaxial substrates or chemically etched patterned substrates [3 ]; while (11-22) plane III-nitride materials can be grown on heteroepitaxial substrates, and thus low cost semipolar (11-22) plane III-nitrides are expected. The grown semipolar group III nitride thin film has high penetrating defect density and rough surface due to the lattice mismatch between the (11-22) plane group III nitride and a foreign substrate and the like, and cannot meet the requirement of high-performance device preparation at present [4 ]. It is therefore of great interest to improve and develop growth techniques to achieve high quality semipolar (11-22) plane III-nitride and semipolar III-nitride LEDs.
Reference documents:
[1]Science 2005, 308, 1274−1278; Science 1997, 386, 351−359; Science1998, 281, 956; Mater. Today 2011, 14, 408−415.
[2]MRS Bulletin 2009, 34, 318−323; MRS Bulletin 2009, 34, 334−340;Appl. Phys. Lett. 2012, 100, 201108; Phys. Rev. Lett. 2015, 115, 085503.
[3]Appl. Phys. Lett. 2014, 104, 262105; ACS Appl. Mater. Interfaces2017, 9, 14088.
[4]Jpn. J. Appl. Phys., 2006, 45, L154–L157; Phys. Status Solidi C,2008, 5, 1815–1817; Jpn. J. Appl. Phys., Part 1, 2007, 46, 4089–4095; J.Appl. Phys. 2016, 119, 145303; Appl. Phys. Lett. 2009, 94, 161109; Sci. Rep.2016, 6, 20787。
disclosure of Invention
The invention aims to provide a preparation method of a high-quality semipolar (11-22) gallium-nitrogen (GaN) epitaxial wafer.
The invention provides a preparation method of a high-quality semi-polar (11-22) GaN epitaxial wafer, which adopts an MOCVD technology and comprises the following specific steps:
(1) growth of SiN on m-plane sapphire substratexThin layer, as a nano-mask layer:
placing the m-plane sapphire substrate into an MOCVD reaction chamber, cleaning and nitriding the surface of the m-plane sapphire substrate at high temperature, and then growing SiNxA thin layer; SiNxThe growth conditions of the thin layer are as follows: the pressure in the MOCVD reaction chamber is in the range of 350-580Torr, the substrate temperature is controlled at 450-650 ℃, and SiH is introduced4As a silicon source, SiH control4The flow rate of the growth medium is in the range of 0-200sccm, and the growth time is 50-300 s;
(2) in SiNxGrowing high-temperature GaN islands on the thin layer:
the pressure in the reaction chamber is stabilized within the range of 400-550Torr, the substrate temperature is controlled at 500-600 ℃ and ammonia (NH) is introduced3) And trimethylgaalane (TMGa) as nitrogen source and gallium source, NH3The ratio of TMGa is 500-; then raising the temperature to anneal the GaN nucleating layer, wherein the annealing temperature is 1000-1100 ℃;
growing on a low temperature GaN nucleation layerGrowing the high temperature GaN islands; adjusting the pressure in the reaction chamber and stabilizing the pressure in the range of 200-500Torr, controlling the substrate temperature at 1150 ℃ and introducing NH3And TMGa, NH3The TMGa ratio is 2000-4000, and the growth time is 500-800 s;
(3) controlling conditions to enable asymmetrical combination among islands:
adjusting the pressure in the reaction chamber and stabilizing the pressure in the range of 30-100Torr, controlling the substrate temperature at 1000 ℃ and 1150 ℃, and introducing NH3And TMGa, NH3The TMGa ratio is 400-2000, and the growth time is 700-1300 s;
(4) growing (11-22) GaN thin films using asymmetric growth conditions:
adjusting the pressure in the reaction chamber and stabilizing the pressure in the range of 60-150Torr, controlling the substrate temperature at 1000-3And TMGa, NH3the/TMGa ratio is 400-2000 and the growth time is 4500s or more.
The epitaxial structure of the semi-polar GaN epitaxial wafer grown by this method is shown in fig. 1.
The method of the present invention can be used for (11-22) GaN films grown on silicon substrates, in addition to (11-22) GaN films grown on sapphire substrates. The invention is characterized in that the transmission of penetrating defects in the semi-polar GaN material is blocked by combining asymmetrical islands, thereby improving the quality of the (11-22) GaN thin film crystal grown subsequently; the quality of the GaN film crystal grown by the technology is obviously improved.
On the basis of the epitaxial wafer prepared by the invention, a luminous indium gallium nitride (InGaN) quantum well epitaxial wafer can be further prepared, and one epitaxial structure of the luminous indium gallium nitride (InGaN) quantum well epitaxial wafer is shown in figure 2. On the basis of the prepared luminescent InGaN quantum well epitaxial wafer, high-efficiency semi-polar GaN-based LEDs such as Light Emitting Diodes (LEDs) from purple light to infrared wave bands can be further prepared. One such epitaxial structure is shown in figure 3.
Drawings
Fig. 1 shows the epitaxial structure of a semipolar (11-22) GaN epitaxial wafer.
Fig. 2 is an epitaxial structure of a semipolar (11-22) light emitting InGaN/GaN quantum well epitaxial wafer.
FIG. 3 is an epitaxial structure of a semi-polar (11-22) GaN-based LED.
Fig. 4 is a Scanning Electron Microscope (SEM) image of the GaN epitaxial wafer prepared in example 1.
Fig. 5 is an X-ray diffraction pattern (XRD) pattern of the GaN epitaxial wafer prepared in example 1.
Fig. 6 is a cathode fluorescence (CL) spectrum of the GaN epitaxial wafer prepared in example 1.
Fig. 7 is XRD of the GaN epitaxial wafer prepared in example 2.
Fig. 8 is XRD of the GaN epitaxial wafer prepared in example 3.
Fig. 9 shows CL of the InGaN epitaxial wafer prepared in example 3.
Detailed Description
Example 1: preparation of high quality semipolar (11-22) GaN thin films
(1) Growth of SiN on m-plane sapphire substratexThin layer:
placing the m-plane sapphire substrate into an MOCVD reaction chamber, cleaning and nitriding the surface of the m-plane sapphire substrate at high temperature, and then growing SiNxA thin layer. SiNxThe growth conditions of the thin layer are as follows: the pressure in the MOCVD reaction chamber is 500Torr, the substrate temperature is controlled at 570 ℃, and SiH is introduced4As a silicon source, SiH control4The flow rate of (2) was 40sccm, and the growth time was 200 s.
(2) In SiNxGrowing high-temperature GaN islands on the thin layer:
stabilizing the pressure in the reaction chamber at 500Torr, controlling the substrate temperature at 550 ℃, and introducing NH3And TMGa as nitrogen source and gallium source, NH3The ratio of/TMGa is 2200, and a low-temperature GaN nucleating layer is grown; then heating and annealing the GaN nucleating layer, wherein the annealing temperature is 1050 ℃;
growing a high-temperature GaN island on the low-temperature GaN nucleating layer; adjusting the pressure in the reaction chamber and stabilizing the pressure in the range of 250Torr, controlling the substrate temperature at 1050 ℃, and introducing NH3And TMGa, NH3the/TMGa ratio was 2600 and the growth time was 600 s.
(3) Controlling conditions to enable asymmetrical combination among islands:
adjust the pressure in the reaction chamber andstabilizing at 50Torr, controlling the substrate temperature at 1030 ℃, and introducing NH3And TMGa, NH3the/TMGa ratio was 1100 and the growth time was 1000 s.
(4) Growing (11-22) GaN thin films using asymmetric growth conditions:
adjusting the pressure in the reaction chamber and stabilizing at 100Torr, controlling the substrate temperature at 1030 ℃, and introducing NH3And TMGa, NH3the/TMGa ratio was 1100 and the growth time was 5500 s.
The surface topography of the sample exhibited a typical striated topography as shown in fig. 4. X-rays are respectively incident along two directions of [ -1-123] and [1-100], and the full widths at half maximum of XRD peaks of the GaN epitaxial wafer are respectively 0.03 degrees (110 arcsec) and 0.13 degrees (465 arcsec); the data diagram is shown in fig. 5. The low-temperature emission of the epitaxial wafer is shown in fig. 6, in which GaN excitons emit light strongly and defects emit light weakly.
Example 2: preparation of high quality semipolar (11-22) GaN thin films
(1) Growth of SiN on m-plane sapphire substratexThin layer:
placing the m-plane sapphire substrate into an MOCVD reaction chamber, cleaning and nitriding the surface of the m-plane sapphire substrate at high temperature, and then growing SiNxA thin layer. SiNxThe growth conditions of the thin layer are as follows: the pressure in the MOCVD reaction chamber is 500Torr, the substrate temperature is controlled at 570 ℃, and SiH is introduced4As a silicon source, SiH control4The flow rate of (2) was 40sccm, and the growth time was 200 s.
(2) In SiNxGrowing high-temperature GaN islands on the thin layer:
stabilizing the pressure in the reaction chamber at 500Torr, controlling the substrate temperature at 550 ℃, and introducing NH3And TMGa as nitrogen source and gallium source, NH3The ratio of/TMGa is 2100, and a low-temperature GaN nucleating layer is grown; then heating and annealing the GaN nucleating layer, wherein the annealing temperature is 1030 ℃;
growing a high-temperature GaN island on the low-temperature GaN nucleating layer; adjusting the pressure in the reaction chamber and stabilizing the pressure in the range of 250Torr, controlling the temperature of the substrate at 1030 ℃, and introducing NH3And TMGa, NH3the/TMGa ratio was 2500 and the growth time was 600 s.
(3) Controlling conditions to enable asymmetrical combination among islands:
adjusting the pressure in the reaction chamber and stabilizing at 50Torr, controlling the substrate temperature at 1010 ℃, and introducing NH3And TMGa, NH3the/TMGa ratio was 1000 and the growth time was 1000 s.
(4) Growing (11-22) GaN thin films using asymmetric growth conditions:
adjusting the pressure in the reaction chamber and stabilizing at 100Torr, controlling the substrate temperature at 1010 ℃, and introducing NH3And TMGa, NH3the/TMGa ratio was 1000 and the growth time was 5500 s.
X-rays are respectively incident along two directions of [ -1-123] and [1-100], and the full widths at half maximum of XRD peaks of the GaN epitaxial wafer are respectively 0.06 degree (216 arcsec) and 0.17 degree (612 arcsec); the data diagram is shown in fig. 7.
Example 3: InGaN quantum wells fabricated using semipolar (11-22) GaN as substrate
The epitaxial structure of the InGaN quantum well epitaxial wafer prepared in the example is shown in fig. 2.
(1) Growth of SiN on m-plane sapphire substratexThin layer:
placing the m-plane sapphire substrate into an MOCVD reaction chamber, cleaning and nitriding the surface of the m-plane sapphire substrate at high temperature, and then growing SiNxA thin layer. SiNxThe growth conditions of the thin layer are as follows: the pressure in the MOCVD reaction chamber is 500Torr, the substrate temperature is controlled at 570 ℃, and SiH is introduced4As a silicon source, SiH control4The flow rate of (2) was 40sccm, and the growth time was 200 s.
(2) In SiNxGrowing high-temperature GaN islands on the thin layer:
stabilizing the pressure in the reaction chamber at 500Torr, controlling the substrate temperature at 550 ℃, and introducing NH3And TMGa as nitrogen source and gallium source, NH3The ratio of/TMGa is 2200, and a low-temperature GaN nucleating layer is grown; then heating and annealing the GaN nucleating layer, wherein the annealing temperature is 1030 ℃;
growing a high-temperature GaN island on the low-temperature GaN nucleating layer; adjusting the pressure in the reaction chamber and stabilizing the pressure in the range of 250Torr, controlling the temperature of the substrate at 1030 ℃, and introducing NH3And TMGa, NH3the/TMGa ratio was 1100 and the growth time was 600 s.
(3) Controlling conditions to enable asymmetrical combination among islands:
adjusting the pressure in the reaction chamber and stabilizing at 100Torr, controlling the substrate temperature at 1030 ℃, and introducing NH3And TMGa, NH3the/TMGa ratio was 950 and the growth time was 800 s.
(4) Growing (11-22) GaN thin films using asymmetric growth conditions:
adjusting the pressure in the reaction chamber and stabilizing at 60Torr, controlling the substrate temperature at 1030 ℃, and introducing NH3And TMGa, NH3the/TMGa ratio was 950 and the growth time was 5500 s.
X-rays are respectively incident along two directions of [ -1-123] and [1-100], and the full widths at half maximum of XRD peaks of the GaN epitaxial wafer are respectively 0.05 degrees (180 arcsec) and 0.16 degrees (576 arcsec); the data diagram is shown in fig. 8.
(5) InGaN/GaN quantum wells are grown on the GaN template.
Growth parameters of the quantum well:
the growth temperature of the GaN layer is 860 ℃, and the growth thickness is 9.0 nm;
the growth temperature of the InGaN layer is 740 ℃, and the growth thickness is 4.5 nm.
The CL spectrum is shown in FIG. 9, and the central wavelength of the luminescence peak is 500 nm (cyan-green light).
The foregoing is a further description of the invention with reference to preferred embodiments, and the examples described are some, but not all, examples of the invention. It will be apparent to those skilled in the art that various modifications, additions, substitutions, and other embodiments can be made without departing from the spirit and scope of the invention.

Claims (5)

1. A preparation method of a semi-polar gallium-nitrogen epitaxial wafer is characterized in that an MOCVD technology is adopted, and the preparation method comprises the following specific steps:
(1) growth of SiN on a substratexThin layer, as a nano-mask layer:
placing the substrate into a MOCVD reaction chamber, cleaning and nitriding the surface of the substrate at high temperature, and then growing SiNxA thin layer; SiNxThe growth conditions of the thin layer are as follows: the pressure in the MOCVD reaction chamber is in the range of 350-580Torr, the substrate temperature is controlled to be 450-650 ℃, and SiH is introduced4As a silicon source, SiH control4The flow rate of the growth medium is 0-200sccm, and the growth time is 50-300 s;
(2) in SiNxGrowing high-temperature GaN islands on the thin layer:
the pressure in the reaction chamber is stabilized within the range of 400-550Torr, the substrate temperature is controlled at 500-600 ℃ and NH is introduced3And tri-TMGa as nitrogen source and gallium source, NH3The ratio of TMGa is 500-; then raising the temperature to anneal the GaN nucleating layer, wherein the annealing temperature is 1000-1100 ℃;
growing a high-temperature GaN island on the low-temperature GaN nucleating layer; adjusting the pressure in the reaction chamber and stabilizing the pressure in the range of 200-3And TMGa, NH3The TMGa ratio is 2000-4000, and the growth time is 500-800 s;
(3) controlling conditions to enable asymmetrical combination among islands:
adjusting the pressure in the reaction chamber and stabilizing the pressure in the range of 30-100Torr, controlling the substrate temperature at 1000-3And TMGa, NH3The TMGa ratio is 400-2000, and the growth time is 700-1300 s;
(4) growing (11-22) GaN thin films using asymmetric growth conditions:
adjusting the pressure in the reaction chamber and stabilizing the pressure in the range of 60-150Torr, controlling the substrate temperature at 1000-3And TMGa, NH3the/TMGa ratio is 400-2000 and the growth time is 4500s or more.
2. The method for preparing the semi-polar gallium-nitrogen epitaxial wafer according to claim 1, wherein the substrate material is m-plane sapphire or silicon.
3. A semipolar GaN epitaxial wafer obtained by the production method according to claim 1 or 2.
4. Use of a semi-polar GaN epitaxial wafer according to claim 3 in the preparation of a light emitting InGaN quantum well epitaxial wafer.
5. Use of the semi-polar GaN epitaxial wafer of claim 3 in the preparation of semi-polar GaN-based LEDs.
CN201811255304.7A 2018-10-26 2018-10-26 Semi-polar gallium-nitrogen epitaxial wafer and preparation method thereof Active CN109560172B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811255304.7A CN109560172B (en) 2018-10-26 2018-10-26 Semi-polar gallium-nitrogen epitaxial wafer and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811255304.7A CN109560172B (en) 2018-10-26 2018-10-26 Semi-polar gallium-nitrogen epitaxial wafer and preparation method thereof

Publications (2)

Publication Number Publication Date
CN109560172A CN109560172A (en) 2019-04-02
CN109560172B true CN109560172B (en) 2020-01-10

Family

ID=65865212

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811255304.7A Active CN109560172B (en) 2018-10-26 2018-10-26 Semi-polar gallium-nitrogen epitaxial wafer and preparation method thereof

Country Status (1)

Country Link
CN (1) CN109560172B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115377265B (en) * 2022-09-06 2023-06-30 兰州大学 Method for growing semi-polar (11-22) surface gallium nitride on silicon substrate

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005057253A1 (en) * 2005-11-29 2007-06-06 Universität Bremen Method for producing a semiconductor component
KR101105868B1 (en) * 2010-11-08 2012-01-16 한국광기술원 Method for preparing group iii-nitride substrate using chemical lift off
CN104037291B (en) * 2014-06-10 2017-06-20 广州市众拓光电科技有限公司 A kind of semi-polarity GaN film being grown on patterned silicon substrate and preparation method thereof
CN105576096B (en) * 2016-03-15 2018-08-10 河源市众拓光电科技有限公司 A kind of preparation method of the LED epitaxial wafer grown on a si substrate using SiN insert layers

Also Published As

Publication number Publication date
CN109560172A (en) 2019-04-02

Similar Documents

Publication Publication Date Title
US8455885B2 (en) Method for heteroepitaxial growth of high-quality N-face gallium nitride, indium nitride, and aluminum nitride and their alloys by metal organic chemical vapor deposition
US7566580B2 (en) Method for heteroepitaxial growth of high-quality N-face GaN, InN, and AIN and their alloys by metal organic chemical vapor deposition
KR101251443B1 (en) Growth of planar reduced dislocation density m-plane gallium nitride by hydride vapor phase epitaxy
JP5099763B2 (en) Substrate manufacturing method and group III nitride semiconductor crystal
KR100674829B1 (en) Nitride based semiconductor device and method for manufacturing the same
US20110003420A1 (en) Fabrication method of gallium nitride-based compound semiconductor
JP2004319711A (en) Porous substrate for epitaxial growth and its manufacturing method, and method of manufacturing group iii nitride semiconductor substrate
JP6966063B2 (en) Crystal substrate, ultraviolet light emitting device and their manufacturing method
US9443727B2 (en) Semi-polar III-nitride films and materials and method for making the same
JP2016145144A (en) Diamond laminated structure, substrate for forming diamond semiconductor, diamond semiconductor device, and production method of diamond laminated structure
WO2012043885A9 (en) Method for producing substrate for group iii nitride semiconductor element fabrication, method for producing group iii nitride semiconductor free-standing substrate or group iii nitride semiconductor element, and group iii nitride growth substrate
US7740823B2 (en) Method of growing III group nitride single crystal and III group nitride single crystal manufactured by using the same
CN109560172B (en) Semi-polar gallium-nitrogen epitaxial wafer and preparation method thereof
Liu et al. Structural and optical properties of quaternary AlInGaN epilayers grown by MOCVD with various TMGa flows
JP5814131B2 (en) Structure and manufacturing method of semiconductor substrate
JP4960621B2 (en) Nitride semiconductor growth substrate and manufacturing method thereof
CN100378255C (en) Growth control method for A-plane and M-plane GaN film material
CN115050860B (en) Preparation method and device of semiconductor light-emitting structure based on III-nitride quantum dots
JP2018121008A (en) Manufacturing apparatus and manufacturing method for nitride semiconductor
Moszak et al. Modulated Ammonia Flow—Low Temperature AlN Buffer LP-MOVPE Growth for High Quality AlGaN Layers
RU135186U1 (en) SEMICONDUCTOR LIGHT-RADIATING DEVICE
CN117096229A (en) AlN intrinsic layer for deep ultraviolet light-emitting diode and preparation method thereof
KR20220123780A (en) Process for production of thin film comprising multiple quantum well structure, thin film comprising multiple quantum well structure and semiconductor device comprising the same
RU2540446C1 (en) Method of forming gallium nitride template with semipolar (20-23) orientation on silicon substrate and semiconductor light-emitting device made using said method
JP2014110431A (en) Nitride semiconductor layer growth method and nitride semiconductor element manufacturing method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant