CN109558662A - Anti-fuse FPGA universal programmer and its programmed method - Google Patents
Anti-fuse FPGA universal programmer and its programmed method Download PDFInfo
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- CN109558662A CN109558662A CN201811396286.4A CN201811396286A CN109558662A CN 109558662 A CN109558662 A CN 109558662A CN 201811396286 A CN201811396286 A CN 201811396286A CN 109558662 A CN109558662 A CN 109558662A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/32—Circuit design at the digital level
- G06F30/33—Design verification, e.g. functional simulation or model checking
- G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
- G06F30/331—Design verification, e.g. functional simulation or model checking using simulation with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
- G06F15/7871—Reconfiguration support, e.g. configuration loading, configuration switching, or hardware OS
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
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Abstract
The present invention relates to a kind of anti-fuse FPGA universal programmer and its programmed methods, it is programmed for the anti-fuse FPGA device to multiple and different types, it is characterised in that turn DC module, multipath voltage regulation module, MCU main control chip, usb communication module, CPLD control module, multiway analog switch module, current detection module, programming drive module, programming indicating module, the adapter for carrying anti-fuse FPGA including AC.Anti-fuse FPGA device universal programmer is realized by USB interface is responsible for Row control and data processing with computer high-speed communication, computer, realizes that main control MCU chip controls program voltage VPP timing carries out the programming that is melt through to anti-fuse FPGA device to be programmed.The present invention has the characteristics that program speed is fast, easy to use, reliable performance, and at low cost, scalable, easy extension meets anti-fuse FPGA device programming demand to the maximum extent.
Description
Technical field
The present invention relates to a kind of universal programmers, also referred to as cd-rom recorder or fever writes, more particularly to a kind of anti-fuse FPGA
Device universal programmer and its programmed method.
Background technique
FPGA (field programmable gate array) be modern communication technology, electronic technology, computer technology, in automatic technology
The important tool being widely used occupies an important position in military and aerospace integrated circuit, is broadly divided into anti-fuse type, SRAM
Type and three kinds of Flash type.Anti-fuse FPGA configuration data is embedded in inside it, has that non-volatile (its configuration data is being
Still it is able to maintain when system power-off), external memory chip is not needed to store configuration data, and run low in energy consumption, intraconnection prolongs
It is small late, speed is fast, not only save additional component costs in this way, and save board area.
Anti-fuse FPGA is to use antifuse as switch element, these switch elements are in open-circuit condition when unprogrammed,
When programming, program voltage is added at the antifuse switch element both ends for needing junction, antifuse will become low-resistance from high impedance
It is anti-, realize the connection of point-to-point transmission, the antifuse mode after programming in device determines the logic function of corresponding device.Therefore, instead
Anti-fuse programming technique is also referred to as the programming technique that is melt through, and one time programming finishes, and function can not be changed, and need using special volume
Journey device carries out off-line programing.
A special antifuse can be arranged in anti-fuse FPGA, prevent from reading any configuration data from FPGA.Due to
All antifuse are all burned its internal metal layer, this, which allows reverse-engineering to crack, becomes almost impossible.Anti-fuse FPGA
Another most further advantage of note is that, inner interconnection structure is not influenced relatively by electromagnetic radiation.Because being answered in aerospace
There is a large amount of ray in outer space, under these high radiation environments, is hit based on SRAM type FPGA its configuration unit by ray
It may occur " to overturn " when middle.It in contrast, is not in " to turn over compared to SRAM type FPGA after anti-fuse FPGA programming
Turn ", it is well suited for aerospace applications.Therefore, anti-fuse FPGA has special attraction to military and aerospace applications.
Summary of the invention
The purpose of the present invention is to provide a kind of anti-fuse FPGA universal programmer and its programmed method, high reliablity and logical
Good with property, program speed is fast, universal programmer easy to operate.
Present invention technical solution used for the above purpose is: anti-fuse FPGA universal programmer, comprising: AC turns
DC module, multipath voltage regulation module, MCU main control chip, usb communication module, CPLD control module, multiway analog switch module, electricity
Flow detection module, programming drive module, the adapter for carrying anti-fuse FPGA；
MCU main control chip controls usb communication module and receives the control instruction of host computer, control CPLD control module to control
Instruction is decoded and is exported, controlled operating voltage VCC and the programming of multiway analog switch module offer anti-fuse FPGA device
Voltage VPP, control programming drive module turn on and off the access with the anti-fuse FPGA device of adapter carrying, control electric current
The anti-fuse FPGA that detection module carries adapter current value of antifuse switch element access in programming process is examined
It surveys, realizes that the anti-fuse FPGA universal programmer is programmed the anti-fuse FPGA device of multiple and different types.
The AC turns DC module and connect with alternating current 220V/50Hz power supply, generates direct current 24V power supply；The multipath voltage regulation mould
Direct current 24V power supply by multichannel, multistage LDO voltage regulation unit, is generated direct current 5V, 3.3V power supply and preset by block
8 DC voltage sources of 6V-22V different stalls voltage value；Direct current 5V, 3.3V power supply are electric to MCU main control chip and modules
Road power supply, 8 DC voltage sources of 6V-22V different stalls voltage value be anti-fuse FPGA device be melt through program provide it is required
Program voltage VPP.
The MCU main control chip generates control instruction according to program timing sequence, and control multiway analog switch module generates anti-molten
Silk FPGA device, which is melt through, programs required program voltage VPP, the electric current of storage and analysis anti-fuse FPGA device programming voltage VPP
Data are communicated by usb communication module with computer.
MCU main control chip is decoded the CPLD control module to its instruction inputted based on the received, Xiang Duolu mould
Quasi- switch module output control signal, and control programming drive module.
The multiway analog switch module control signal that CPLD control module is inputted to it based on the received is steady multichannel
8 DC voltage sources for presetting 6V-22V different stalls voltage value that die block generates select 1 to open by 8 inside switching
Output is closed, being melt through to program for anti-fuse FPGA device provides required program voltage VPP.
The programming drive module is relay, and the control signal that CPLD control module is inputted to it based on the received connects
The operating voltage VCC and program voltage VPP of logical or shutdown adapter carrying anti-fuse FPGA device.
It further include programming indicating module, indicate that anti-fuse FPGA universal programmer is idle by several indicator lights, run,
It communicates, the different working condition of program fail.
The method that anti-fuse FPGA universal programmer is programmed, comprising the following steps:
Step 1: anti-fuse FPGA program bit stream packets being imported by computer and are referred to by data frame dismantling, setting control
Order is distributed to usb communication module；The control instruction includes looking into empty or programming instruction；
Step 2:MCU main control chip activates the driver of usb communication module, is received and parsed through by usb communication module
Data；
Step 2.1: when the data of parsing are program bit stream packets, MCU main control chip stores program bit stream packets
Program code information；
Step 2.2: when the data of parsing be control instruction when, MCU main control chip send control instruction program code to
CPLD control module；CPLD control module decodes received control instruction, exports and controls to multiway analog switch module
Signal, and the logic circuit program code of programming drive module is controlled, the anti-molten of adapter carrying is turned on and off to realize
The operating voltage VCC and program voltage VPP of silk FPGA device；It is complete that programming Control timing is generated according to corresponding program code information
Pairs of anti-fuse FPGA device looks into do-nothing operation, programming operation.
Do-nothing operation of looking into the step 2.2 includes: that control instruction is when looking into do-nothing instruction, and CPLD control module is according to looking into sky
Voltage and timing requirements, control multiway analog switch module connect the anti-fuse FPGA device of adapter carrying with drive module is programmed
The operating voltage VCC of part fills the antifuse switch element completion of anti-fuse FPGA device inside with sky voltage VPP, realization is looked into
Electricity, discharge process；MCU main control chip passes through the data in current detection module readback anti-fuse FPGA device inside register chain
And sending computer to, computer judges whether anti-fuse FPGA device is not programmed " empty piece ".It completes once to look into sky
Process.
In the step 2.2 programming operation include: control instruction be programming instruction when, CPLD control module according to programming electricity
Pressure and timing requirements, control multiway analog switch module connect the anti-fuse FPGA device of adapter carrying with drive module is programmed
Apply program to preset the programming pulse voltage VPP of timing and program number, MCU main control chip obtains in real time according to current detection module
The program voltage VPP current data taken, which judges whether the antifuse switch element programs, to be terminated, to next anti-molten if terminating
Silk switch element is programmed, and completes the programming operation to all antifuse switch elements in the anti-fuse FPGA device.
The present invention has the advantages that by USB interface realize with computer high-speed communication, computer be responsible for Row control and
Data processing realizes that main control MCU chip controls program voltage VPP timing carries out the volume that is melt through to anti-fuse FPGA device to be programmed
Journey has the characteristics that program speed is fast, easy to use, reliable performance, and at low cost, scalable, easy extension meets to the maximum extent
Anti-fuse FPGA device programming demand.
Detailed description of the invention
Fig. 1 is each component connection relationship diagram of anti-fuse FPGA universal programmer of the present invention.
Specific embodiment
A specific embodiment of the invention is described with reference to the accompanying drawing, it should be understood that described herein specific
Embodiment is only used for understanding the present invention, is not intended to limit the present invention.
It is melt through programming as shown in Figure 1, carrying out anti-fuse FPGA device using anti-fuse FPGA universal programmer of the invention
When, it needs to connect with computer and alternating current 220V/50Hz power supply respectively.Wherein, universal programmer is connected by usb communication module
Computer realizes the communication of universal programmer MCU main control chip and computer and the high-speed transfer of instruction and data.
As shown in Figure 1, anti-fuse FPGA universal programmer of the invention includes that AC turns DC module, multipath voltage regulation module, MCU
Main control chip, usb communication module, CPLD control module, multiway analog switch module, current detection module, programming drive module,
Program indicating module, anti-fuse FPGA adapter.
Wherein, AC turns DC module and connect with alternating current 220V/50Hz power supply, generates direct current 24V power supply, completes alternating voltage and arrives
The transformation of DC voltage.
Multipath voltage regulation module turns DC module with AC and connect, and AC turns the direct current 24V power supply of DC module generation as its input electricity
Source generates direct current 5V, 3.3V power supply and preset 6V-22V different stalls voltage by multichannel, multistage LDO pressure stabilizing
8 DC voltage sources of value not only provide operating voltage for each module of programmable device, and provide for the anti-fuse FPGA programming that is melt through
Operating voltage VCC and program voltage VPP.
MCU main control chip is C8051F34x Series MCU chip, has internal storage, generates control according to program timing sequence
Instruction, control multiway analog switch module generation anti-fuse FPGA device, which is melt through, programs required program voltage VPP, and storage divides
Anti-fuse FPGA device programming voltage VPP current data is analysed, realizes that high-speed data exchanges with computer by usb communication module.
Usb communication module is used to support the communication of MCU main control chip and computer.MCU main control chip passes through usb communication mould
Block obtains control instruction from computer and send to CPLD control module, obtains the stream packets storage of anti-fuse FPGA program bit and arrives
MCU main control chip internal RAM data storage, while the current detecting data that current detection module obtains can also be passed through
Usb communication module sends computer to.
MCU main control chip is decoded CPLD control module to its instruction inputted based on the received, is opened to multi-channel analog
Close module output control signal, 8 direct currents for presetting 6V-22V different stalls voltage value that multipath voltage regulation module is generated
Voltage source selects 1 switch to export by switching 8, and being melt through to program for anti-fuse FPGA device provides required program voltage VPP, together
When control programming drive module, when adapter carrying anti-fuse FPGA operating voltage VCC and programming are connected in programming process
Voltage VPP, terminate in idle, programming, program fail state when turn off operating voltage VCC and program voltage VPP.
The multiway analog switch module control signal that CPLD control module is inputted to it based on the received, multipath voltage regulation mould
8 DC voltage sources for presetting 6V-22V different stalls voltage value that block generates select 1 switch to export, are anti-by switching 8
Fuse FPGA device, which is melt through to program, provides required program voltage VPP.
The anti-fuse FPGA that current detection module carries adapter antifuse switch element access in programming process
Current value is detected, and detection data is sent to MCU main control chip.
The drive module control signal that CPLD control module is inputted to it based on the received is programmed, control adapter carrying
Anti-fuse FPGA device connects operating voltage VCC and program voltage VPP being melt through in programming process, terminates in idle, programming, compiles
Operating voltage VCC and program voltage VPP is turned off when journey status of fail.
Indicating module is programmed according to anti-fuse FPGA device in the different phase being melt through in programming process, using red, green
Totally 3 indicator lights indicate the different work such as anti-fuse FPGA universal programmer free time, operation, communication, program fail for color, yellow
State.
Anti-fuse FPGA adapter carries programmed anti-fuse FPGA device in which can be convenient.For carrying antifuse
The adapter of FPGA device, the test fixture of corresponding multiple and different types, easily carries different types of anti-fuse FPGA device
Part is programmed.
Lower mask body introduces the course of work of anti-fuse FPGA universal programmer of the present invention.
(1) this programmable device is connect by USB interface cable with computer, by the external alternating current 220V of three phase mains cable/
50Hz power supply, opens alternating current 220V/50Hz power switch, and completion powers on online.Anti-fuse FPGA adapter, which carries, to be programmed
Anti-fuse FPGA device.
(2) power on it is online after, this programmable device is in idle state, and programming indicating module drives red indicating light point
It is bright.The working condition of this programmable device during idle time be such that power on it is online after, AC turns the work of DC module, external exchange
220V/50Hz power supply is converted to stable direct current 24V power supply, and multipath voltage regulation module turns AC the direct current 24V electricity of DC module generation
Source generates stable 5V, 3.3V DC voltage source by multichannel, multistage LDO pressure stabilizing as its input power respectively, and pre-
8 DC voltage sources of the 6V-22V different stalls voltage value first set.5V is controlled for this programmable device usb communication module, CPLD
Module, multiway analog switch module, current detection module, programming drive module, anti-fuse FPGA adapter carry to be programmed
The work of anti-fuse FPGA device, 3.3V is for MCU main control chip, programming indicating module work, preset 6V-22V difference shelves
8 DC voltage sources of position voltage value provide program voltage VPP for anti-fuse FPGA device to be programmed.MCU after power supply
(C8051F34x series) main control chip starts to reset and work normally, and completes program initialization, to CPLD (EPM7000 series)
Initial control instruction is exported, and is established and is communicated to connect by usb communication module and computer.At this point, programming drive module control
Anti-fuse FPGA adapter, by the operating voltage VCC and program voltage VPP of the anti-fuse FPGA device to be programmed of carrying all in
Off state.
(3) computer controls the operation of this programmable device by usb communication module, carries out looking into sky, compiling for anti-fuse FPGA device
Journey operation.When this programmable device is in operation working condition, programming indicating module driving green indicator light is lighted, and runs working condition
It is such that
A. power on it is online after, when this programmable device is in idle state, looking into for manipulation computer control interface be empty, programming
Window, computer pre-process anti-fuse FPGA program bit stream packets, are parsed into the format of data frame, pass through according to frame format
Usb communication module sends control instruction and program bit stream packets to this programmable device MCU main control chip.
The logical control instruction that will acquire of b.MCU main control chip is sent to CPLD control module, the program bit fluxion that will acquire
MCU main control chip internal RAM data storage is arrived according to packet storage.
The c.CPLD control module do-nothing instruction of looking into that MCU main control chip is inputted to it based on the received carries out check and control operation, presses
According to sky voltage and timing requirements are looked into, control signal is exported to multiway analog switch module, the generation of multipath voltage regulation module is set in advance
8 DC voltage sources of fixed 6V-22V different stalls voltage value select 1 switch to export by switching 8, are anti-fuse FPGA device
Program voltage VPP, CPLD control module needed for the programming that is melt through provides controls programming drive module simultaneously, connects adapter carrying
Anti-fuse FPGA device operating voltage VCC and look into sky voltage VPP, program is applied to anti-fuse FPGA device and presets timing
Window pulse voltage VPP is looked into, until charging, discharge process are completed to all antifuse switch elements of anti-fuse FPGA device inside,
The program voltage VPP current data that current detection module will acquire is sent to A/D inside MCU main control chip and is analyzed and processed.
Data in MCU main control chip readback anti-fuse FPGA device inside register chain, are passed back read data by usb communication module
Computer is given, computer analysis judges whether anti-fuse FPGA device is not programmed " empty piece ".It is controlled in computer
The display in empty window of looking at interface looks into empty success or looks into the corresponding information of empty failure, completes once to look into null process.This programmable device place
When communication work state, green indicator light flashing is lighted, and in when looking into sky status of fail, yellow indicator lamp is lighted.
D.CPLD control module based on the received MCU main control chip to its input programming instruction be programmed operation, press
According to program voltage and timing requirements, control signal is exported to multiway analog switch module, the generation of multipath voltage regulation module is set in advance
8 DC voltage sources of fixed 6V-22V different stalls voltage value select 1 switch to export by switching 8, are anti-fuse FPGA device
Program voltage VPP, CPLD control module needed for the programming that is melt through provides controls programming drive module simultaneously, connects adapter carrying
Anti-fuse FPGA device operating voltage VCC and program voltage VPP, program is applied to anti-fuse FPGA device and presets timing
Programming pulse voltage VPP and programming number, the program voltage VPP current data that current detection module will acquire in real time are sent to
A/D is analyzed and processed inside MCU main control chip.
The program voltage VPP current data that e.MCU main control chip obtains in real time according to current detection module, control CPLD control
Molding block, multiway analog switch module apply the programming pulse voltage VPP that program presets timing to anti-fuse FPGA device again
With programming number, until the programming of this antifuse switch element of anti-fuse FPGA device inside terminates, then pass through usb communication module
Program voltage VPP current data when verification sends computer, anti-fuse FPGA device programming electricity of the computer to acquisition to
Pressure VPP current data is analyzed and processed.
F. when program voltage VPP current data reaches preset requirement, computer judges that this antifuse switch element is compiled
Cheng Chenggong, computer send programming Control instruction to MCU main control chip again by usb communication module, repeat step d and step
E continues to program, and carries out the programming of the next antifuse switch element of anti-fuse FPGA device inside.
G. when program current data do not reach preset requirement, computer judges the programming of this antifuse switch element not
Success no longer carries out the programming of the next antifuse switch element of anti-fuse FPGA device inside, directly exits programing work shape
State sends MCU main control chip program fail control instruction to by usb communication module, controls this programmable device program fail, stops
Continue to program.
H. when all antifuse switch element programmings of anti-fuse FPGA device inside are completed, computer analyzes the programming obtained
Voltage VPP current data, judges whether anti-fuse FPGA device programs success.It is shown in the program window of computer control interface
Show and program successfully or the corresponding information of program fail, completes one-time programming process.It is green when this programmable device is in communication work state
The flashing of color indicator light is lighted, and when being in program fail state, yellow indicator lamp is lighted.
In addition, the circuit board of this programmable device uses two-panel design.Large area, which is carried out, in circuit board top layer and bottom spreads copper,
And paving copper is connected to ground together.The interference that high-frequency signal can not only be shielded in this way, also makes circuit board at work can
It is enough to radiate quickly.
Although the present invention carries out disclosure by above-mentioned better embodiment, these embodiments are not intended to limit
The present invention.Those skilled in the art is not it should be recognized that departing from appended claims of the invention present invention disclosed
In the case where scope and spirit, the modifications and variations done are belonged within the scope of protection of present invention.
Claims (10)
1. anti-fuse FPGA universal programmer, characterized by comprising: AC turns DC module, multipath voltage regulation module, MCU master control core
Piece, CPLD control module, multiway analog switch module, current detection module, programs drive module, for holding at usb communication module
Carry the adapter of anti-fuse FPGA；
MCU main control chip controls usb communication module and receives the control instruction of host computer, control CPLD control module to control instruction
Decoded and exported, controlled the operating voltage VCC and program voltage of multiway analog switch module offer anti-fuse FPGA device
VPP, control programming drive module turn on and off the access with the anti-fuse FPGA device of adapter carrying, control current detecting
The anti-fuse FPGA that module carries adapter current value of antifuse switch element access in programming process detects, real
Now the anti-fuse FPGA universal programmer is programmed the anti-fuse FPGA device of multiple and different types.
2. anti-fuse FPGA universal programmer according to claim 1, it is characterised in that: the AC turn DC module with exchange
The connection of 220V/50Hz power supply, generates direct current 24V power supply；Direct current 24V power supply is passed through multichannel, multistage by the multipath voltage regulation module
LDO voltage regulation unit, generate 8 direct currents of direct current 5V, 3.3V power supply and preset 6V-22V different stalls voltage value
Voltage source；Direct current 5V, 3.3V power supply are powered to MCU main control chip and modules circuit, and the 8 of 6V-22V different stalls voltage value
A DC voltage source, which is melt through to program for anti-fuse FPGA device, provides required program voltage VPP.
3. anti-fuse FPGA universal programmer according to claim 1, it is characterised in that: the MCU main control chip according to
Program timing sequence generates control instruction, and control multiway analog switch module generation anti-fuse FPGA device, which is melt through, programs required programming
Voltage VPP, the current data of storage and analysis anti-fuse FPGA device programming voltage VPP, passes through usb communication module and computer
Communication.
4. anti-fuse FPGA universal programmer according to claim 1, it is characterised in that: the CPLD control module according to
Received MCU main control chip is decoded to its instruction inputted, exports control signal to multiway analog switch module, and control
Program drive module.
5. anti-fuse FPGA universal programmer according to claim 1, it is characterised in that: the multiway analog switch module
The control signal that CPLD control module is inputted to it based on the received presets 6V-22V not what multipath voltage regulation module generated
With 8 DC voltage sources of gear voltage value, by switching it is internal 81 switch is selected to export, be that anti-fuse FPGA device is melt through volume
Journey provides required program voltage VPP.
6. anti-fuse FPGA universal programmer according to claim 1, it is characterised in that: the programming drive module be after
Electric appliance, the control signal that CPLD control module is inputted to it based on the received turn on and off the antifuse of adapter carrying
The operating voltage VCC and program voltage VPP of FPGA device.
7. anti-fuse FPGA universal programmer according to claim 1, it is characterised in that: it further include programming indicating module,
The different operating shape of idle anti-fuse FPGA universal programmer, operation, communication, program fail is indicated by several indicator lights
State.
8. the method that anti-fuse FPGA universal programmer described in -7 any one is programmed according to claim 1, feature
Be the following steps are included:
Step 1: anti-fuse FPGA program bit stream packets being imported by computer and by data frame dismantling, setting control instruction point
Issue usb communication module；The control instruction includes looking into empty or programming instruction；
Step 2:MCU main control chip activates the driver of usb communication module, receives and parses through data by usb communication module；
Step 2.1: when the data of parsing are program bit stream packets, MCU main control chip stores the journey of program bit stream packets
Sequence code information；
Step 2.2: when the data of parsing are control instruction, MCU main control chip sends the program code of control instruction to CPLD
Control module；CPLD control module decodes received control instruction, exports control signal to multiway analog switch module,
And the logic circuit program code of programming drive module is controlled, to realize the anti-fuse FPGA for turning on and off adapter carrying
The operating voltage VCC and program voltage VPP of device；Programming Control timing is generated according to corresponding program code information to complete to anti-
Fuse FPGA device looks into do-nothing operation, programming operation.
9. the method that anti-fuse FPGA universal programmer according to claim 8 is programmed, which is characterized in that the step
Do-nothing operation of looking into rapid 2.2 includes: that control instruction is when looking into do-nothing instruction, and CPLD control module is according to looking into sky voltage and timing is wanted
It asks, control multiway analog switch module connects the operating voltage for the anti-fuse FPGA device that adapter carries with drive module is programmed
VCC completes charging, discharge process to the antifuse switch element of anti-fuse FPGA device inside with sky voltage VPP, realization is looked into；
MCU main control chip is by the data in current detection module readback anti-fuse FPGA device inside register chain and sends calculating to
Machine, computer judge whether anti-fuse FPGA device is not programmed " empty piece ".It completes once to look into null process.
10. the method that anti-fuse FPGA universal programmer according to claim 8 is programmed, which is characterized in that described
In step 2.2 programming operation include: control instruction be programming instruction when, CPLD control module is wanted according to program voltage and timing
It asks, the anti-fuse FPGA device application program that control multiway analog switch module connects adapter carrying with programming drive module is pre-
If the programming pulse voltage VPP of timing and programming number, the programming electricity that MCU main control chip obtains in real time according to current detection module
Pressure VPP current data, which judges whether the antifuse switch element programs, to be terminated, to next antifuse switch element if terminating
It is programmed, completes the programming operation to all antifuse switch elements in the anti-fuse FPGA device.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110988649A (en) * | 2019-11-22 | 2020-04-10 | 中国电子科技集团公司第五十八研究所 | Anti-fuse type FPGA programming waveform generation circuit and anti-fuse detection method |
| CN113033138A (en) * | 2021-03-08 | 2021-06-25 | 电子科技大学 | Novel FPGA structure based on power gating technology controlled by anti-fuse device |
| CN115396349A (en) * | 2022-07-25 | 2022-11-25 | 杭州锐格思科技有限公司 | Intelligent detection method and system for PSE equipment, electronic device and storage medium |
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