CN201196777Y - External connection interface test card - Google Patents
External connection interface test card Download PDFInfo
- Publication number
- CN201196777Y CN201196777Y CNU2008200468632U CN200820046863U CN201196777Y CN 201196777 Y CN201196777 Y CN 201196777Y CN U2008200468632 U CNU2008200468632 U CN U2008200468632U CN 200820046863 U CN200820046863 U CN 200820046863U CN 201196777 Y CN201196777 Y CN 201196777Y
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- card
- add
- test card
- programming device
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Abstract
The utility model discloses an external interface test card, which comprises a body, a plurality of external clamping pins with various specifications, and a display element, wherein the body is provided with a programmable device with a plurality of gate circuits, and program codes with different functions are written into the programmable device and are simulated into processors with different functions; the clamping pins are arranged at the periphery of the body and are electrically connected with the programmable device; and the display element is connected with the programmable device, and a test result can be obtained by observing the display element. The test card is simulated into external cards with various functions by utilizing the coordination between the programmable device and the external clamping pins with various specifications to substitute various external function cards for tests.
Description
Technical field
The utility model relates to a kind of test card, particularly relates to a kind of external interface test card.
Background technology
The desire measurement obtains the PCI-X/PCI Express signal (Signals) of PCI-X slot (Slot) and PCI Express slot (Slot) in the mainboard in the prior art, must insert the function card that the lastblock specialized function can operate, as 10/100/1000 network card, SAS card, display card.And if when on same case, needing the function card of PCI Express X1/X4/X8/X16 and PCI-X interface, be not easy to assort the above-mentioned functions card, and make test can finish with a test card, and the test card that needs constantly to change all size is tested, not only bother time-consuming, and the operation on make mistakes easily.
Therefore, if having a function card that has multiple interfaces concurrently, when test, carrying and preparing all is very easily.
Summary of the invention
The utility model proposes a kind of test card that has multiple add-on card function concurrently, solved the problem that the function card when simultaneously a plurality of external interfaces being tested is difficult for assorting.
The technical solution of the utility model is: a kind of external interface test card, and it is provided with: a body, this body are provided with the programming device of a tool majority gate circuit, and it can carry out coding/decoding to the communication data on the bus; In this programming device, write the program code of difference in functionality, but emulation becomes the processor of difference in functionality, serve as the function of processing, unscrambling data; The add-on card pin of some all sizes, this kind pin are arranged on this body, and simultaneously, this kind pin and this programming device electrically connect; One display element, this display element and this programming device link, and show this programming device institute information transmitted, can obtain test result by observing this display element.
The utility model utilizes this programming device to cooperate with the add-on card pin of all size, can be modeled to the add-on card of various functions, to carry out test to external interface, reach the purpose that an alternative multiple external function card of add-on card is tested, convenient test is carried out.
Description of drawings
Fig. 1 is the utility model test card structural representation.
Embodiment
Below in conjunction with accompanying drawing in detail embodiment of the present utility model is described in detail.
As shown in Figure 1, a kind of external interface test card, it is provided with: a body 10, this test card body 10 are provided with a field programmable gate array 11 (FPGA), and it has the majority gate circuit, can carry out coding/decoding to the communication data on the bus; In this field programmable gate array 11, write the program code of difference in functionality, but emulation becomes the processor of difference in functionality, serve as the function of processing, unscrambling data; Field programmable gate array 11 in this piece test card is control cores, have according to the required programmable general programmable input/output port 111 of purposes (General Purpose Input Output, GPIO) and PCI Express mouth 110.PCI Express in this field programmable gate array 11 (Peripheral ComponentInterconnection Express) mouth 110 is for serving as the ability of processing/deciphering.
The add-on card pin of some all sizes, this kind pin are arranged on this body 10, and simultaneously, this kind pin and this field programmable gate array 11 electrically connect; In the present embodiment, four kinds of PCI Express pins are arranged: PCI ExpressX1/X4/X8/X16 is separately positioned on above-mentioned body 10 peripheries, and is electrically connected to the PCI Express mouth 110 of this field programmable gate array 11.
Also can articulate a PCI-X pin 30 on this body 10, this PCI-X pin 30 connects with the general programmable input/output port 111 of field programmable gate array 11.The general programmable input/output port 111 of this field programmable gate array 11 can be planned the process chip that is modeled to a specific function on the PCI-X bus, as bus data coding/decoding (Coder/Decoder).Owing to structural limitations this PCI-X pin 30 is set to pivot joint, detachable, it is convenient for changing.
One display element 12, this display element 12 links with this field programmable gate array 11, shows 11 information transmitted of this field programmable gate array, can obtain test result by observing this display element 12; This display element 12 can be a LCD 121 (LCD) and a light emitting diode 120 (LED), and this LCD 121 can show the relevant information that this field programmable gate array 11 is transmitted; This light emitting diode 120 can with bright, go out and represent whether normally operation of circuit.
Between this field programmable gate array 11 and each add-on card pin, be provided with the switch that a changeable pin is communicated with field programmable gate array 11, this switch can be PCI and selects chip 20 (PeripheralComponent Interconnection Express Switch Integrated Circuit, PCIe SwitchIC), it can be under this situation that wherein a PCI Express pin connects, cut off being communicated with of other pins and this field programmable gate array 11, to ensure the communication quality of the pin in using.Select chip 20 so between the pin of all size and field programmable gate array 11, add a PCI; This PCI selects chip 20 that but several pin driven for emitting lights diodes 120 are arranged simultaneously, and when its PCIe bus normal operation, light emitting diode 120 is bright; Otherwise, then go out; With bright, the whether normal operation of the pin tested of expression and circuit of going out.
This general programmable input/output port 111 also may command LCD 121 shows relevant information and selects chip 20 to be formulated for required switching channels pattern PCI.
Also have a power supply changeover device 40 (DC/DC), each element that needs to power on the one end and the electric connection of each pin, the other end and this test card is connected; In order to adjusting, and after adjustment, be supplied to each element (LCD, LED, IC etc.) of required power supply by the voltage of mainboard through pin institute transmission current.
This test card is at first selected and the corresponding pin of tested interface when test, is inserted in the tested interface, as: when testing PCI ExpressX1 interface, earlier PCI ExpressX1 pin is inserted the interface conducting; Then, this PCI selects chip 20 can receive the information of this PCI ExpressX1 pin conducting, and under the control of general programmable input/output port 111, each the pin circuit except that PCI ExpressX1 pin is closed, only make PCI ExpressX1 pin and field programmable gate array 11 UNICOMs; Be again, 11 couples of PCI ExpressX1 of this field programmable gate array interface is tested, this field programmable gate array 11 can receive the signal that pci bus sends to PCI ExpressX1 interface by PCI ExpressX1 pin, this field programmable gate array 11 is to the identification of decoding of these signals, to determine whether this PCI ExpressX1 interface circuit can normally move; Bright as normal 120 of this light emitting diodes, otherwise go out; Data messages such as this PCIExpressX1 interface running status then show by LCD 121; But these field programmable gate array 11 feedback coded messages are to bus simultaneously.
As need test PCI-X interface, can on body 10, insert this PCI-X pin 30, operate according to step in the epimere.
The utility model design makes this test card to carry out vertical, horizontal plug-in card test by the layout of mainboard interface.
During test, see through through sign and the literal of specially arranging point arranged and add and indicate, more can promptly finish for its test point.
Claims (7)
1. an external interface test card is characterized in that, this kind test card comprises:
One body, this body are provided with the programming device of a tool majority gate circuit, can carry out coding/decoding to the communication data on the bus;
The add-on card pin of some all sizes, this kind pin are arranged on this body, and simultaneously, this kind pin and this programming device electrically connect;
One display element, this display element and this programming device link, and show this programming device institute information transmitted.
2. add-on card interface test card according to claim 1 is characterized in that, between this programming device and each add-on card pin, is provided with the switch that a changeable pin is communicated with programming device.
3. add-on card interface test card according to claim 1 is characterized in that this programming device can be field programmable gate array.
4. add-on card interface test card according to claim 1 is characterized in that, also can articulate a PCI-X pin on this body, and this pin connects with programming device.
5. add-on card interface test card according to claim 1 is characterized in that this display element can be a LCD and a light emitting diode.
6. add-on card interface test card according to claim 2 is characterized in that, this switch can be a PCIe Switch IC.
7. add-on card interface test card according to claim 1 is characterized in that, also has a power supply changeover device, and one end and each pin electrically connect, and the other end and each need power supply component to electrically connect.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008200468632U CN201196777Y (en) | 2008-04-25 | 2008-04-25 | External connection interface test card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNU2008200468632U CN201196777Y (en) | 2008-04-25 | 2008-04-25 | External connection interface test card |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201196777Y true CN201196777Y (en) | 2009-02-18 |
Family
ID=40416410
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNU2008200468632U Expired - Fee Related CN201196777Y (en) | 2008-04-25 | 2008-04-25 | External connection interface test card |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201196777Y (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102591831A (en) * | 2011-01-08 | 2012-07-18 | 鸿富锦精密工业（深圳）有限公司 | Serial interface card with loop test function |
| CN103699017A (en) * | 2013-12-24 | 2014-04-02 | 中广核核电运营有限公司 | Simulation test system and simulation test method for interface equipment of simulator in nuclear power station |
-
2008
- 2008-04-25 CN CNU2008200468632U patent/CN201196777Y/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102591831A (en) * | 2011-01-08 | 2012-07-18 | 鸿富锦精密工业（深圳）有限公司 | Serial interface card with loop test function |
| CN103699017A (en) * | 2013-12-24 | 2014-04-02 | 中广核核电运营有限公司 | Simulation test system and simulation test method for interface equipment of simulator in nuclear power station |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090218 Termination date: 20120425 |