CN206515660U - Modularized digital power supply platform based on DSP and FPGA - Google Patents
Modularized digital power supply platform based on DSP and FPGA Download PDFInfo
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- CN206515660U CN206515660U CN201720177785.9U CN201720177785U CN206515660U CN 206515660 U CN206515660 U CN 206515660U CN 201720177785 U CN201720177785 U CN 201720177785U CN 206515660 U CN206515660 U CN 206515660U
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Abstract
Modularized digital power supply platform based on DSP and FPGA, includes the terminal that main control module, sampling module, input/output interface module matched by identical with interface board respectively and is inserted in the electrical connection that modules are set up on interface expansion board.Interface expansion board reserves slot for extra sampling module and input/output interface module on demand, realizes the extension of polylith sampling module and input/output interface module.The utility model uses the modularity control platform that DSP is combined with FPGA; the threshold value of protection circuit is set in FPGA inside programmings; on the premise of external sampling circuit and protection circuit is not changed; adapt to the demand of different capacity grade type; also optimize circuit system simultaneously; originally it is exposed to function outside and that cumbersome protection circuit is realized to be incorporated into inside FPGA, not only make it that hardware circuit is more compact, it may have more preferable EMC characteristic.
Description
Technical field
The utility model belongs to power electronics digital power control technology field and is based on TMS320F280x systems there is provided one kind
The Modularized digital power supply of compatible two level and three Level Technologies based on the FPGA of DSP and the MAX10 series of row is put down
Platform, it is adaptable to UPS, inverter, frequency converter, the digital power equipment such as charging pile.
Background technology
The control chip of current power electronics digital power equipment all carries out algorithm using DSP (Digital Signal Processing)
Control, control object is more, and algorithm is more complicated, and the real-time of processor response is more delayed, from fault-signal (such as：Overvoltage, mistake
Stream, excess temperature etc.) course of emergency sample circuit filtering to DSP ADC (analog-digital converter) perform conversion through true after a while
Stop PWM after recognizing again and export this process at least time-consuming 10ms in DSP, this process can not be protected quickly under indivedual operating modes
Shield machine down causes aircraft bombing.
Extensively, such as photovoltaic DC-to-AC converter and energy storage inverter also have UPS to power electronics digital power equipment application, different
Machine typically has different control program and signal deteching circuit, therefore, being needed when in face of the fast-changing market demand
The development that input is a large amount of and repeats, can draw after comprehensive analysis in fact, remove the difference of control object and control algolithm, its
He is partly such as loop of power circuit, sample circuit, and communicating circuit etc. all has common ground.
Another situation is exactly, the type of same application field there is also the demand of different capacity grade, such as 500KW's
The inverter of inverter and 250KW, because power grade is different also just different corresponding to the protection point of over-voltage and over-current,
For this, simply the reference voltage of protection circuit is different, and some schemes, which do not make compatibility, will change resistance value, will then do two sets
BOM, some schemes are the reference voltages for changing protection circuit by wire jumper, so in production assembling and the process of O＆M
In easily malfunction, while this protection circuit based on comparator is susceptible to electromagnetic interference, there is misoperation situation.
The power equipment of current two Level Technology obtains wide with its lesser amount of switch, the control technology of mature and reliable
General application, but three Level Technology equipment have the advantages that output capacity is bigger, current harmonic content is smaller and are also widely used
Prospect, current control platform is all two level and three level each special control platform.
Utility model content
In order to solve above-mentioned problems of the prior art, the utility model provides a kind of modularization number of novel universal
Word power supply platform, compatible two level and three-level control principle technology, with powerful versatility and abundant autgmentability and
Quick response speed in real time, modular versatility control platform is set up based on this, and can more effectively respond market difference needs
Ask, shorten the construction cycle.
The utility model solves the technical scheme that its technical problem used：
Modularized digital power supply platform based on DSP and FPGA, main control module, sampling module, input/output interface
The terminal that module is matched by identical with interface board respectively is inserted on interface expansion board, set up the electrical connection of modules；
Interface expansion board reserves slot for extra sampling module and input/output interface module on demand.Main control module using DSP with
FPGA is combined, and DSP provides various communication interfaces, including the one or more in RS485, RS232 or CAN for system；Master control mould
Block contains the uninterrupted timing of clock after electricity under real time clock unit and super capacitor, feasible system；Main control module contains parallel interface
FeRAM memory chip, DSP passes through data/address bus and address bus and accesses；Main control module contains display module, and display system can be achieved
The human-computer interaction function for running status of uniting；Main control module FPGA carries ADC analog conversion functions, and sample rate is maximum up to 1M；It is main
Module dsp operation control algolithm is controlled, the PWM sent passes through FPGA output control switch pipes, and controlling switch pipe is IGBT or MOS
Pipe；Main control module DSP ADC real-time samplings voltage, electric current and temperature feedback signal, the value detected is more than the guarantor of software set
During shield value and continue a segment fault acknowledging time, stop PWM outputs；The hardware protection thresholding of programming setting in main control module FPGA
Value is different according to type difference, sets on demand；Voltage, electric current and the temperature information of ADC samplings inside main control module FPGA
During more than the hardware protection threshold value for programming setting, after one section of filtering time confirms, the PWM outputs that block DSP is sent；It is defeated
Enter on output interface module that all input ports are all through light-coupled isolation, the driving of optocoupler is powered by insulating power supply；All delivery outlets
Driving is all isolated by relay；Input/output interface module CPLD on plate is controlled, and reset circuit is in module power-on and power-off wink on plate
Between ensure delivery outlet be low level；There is toggle switch in input/output module, realized by different dial-up states in bus
The response of different chip selection signals.
The utility model also has following additional technical feature：
Further specifically optimize as the utility model scheme, it is total that interface board provides unified extension for each functional module
Line interface；Expansion bus interface selects control signal wire, universal input output containing data/address bus, address bus, read-write control line, piece
Signal wire, ADC sampled signals line, power line and ground potential, supply path is provided for power panel to other functional module plates.
Further specifically optimize as the utility model scheme, voltage, electric current and the temperature of sampling module acquisition system
Feedback quantity；Sampling module is with the high tension voltage of difference channel sampling system；Sampling module provides Hall type current sensor standard
The current sampling circuit of interface；Sampling module provides the current sampling circuit of mutual inductance type current sensor standard interface；Sampling
Module provides the temperature sampling circuit of the interface of temperature sensor PT100 0；All sampled signals are all through operational amplifier combinational circuit
Nurse one's health sampled signal.
Further specifically optimize as the utility model scheme, main control module DSP passes through data/address bus and address bus
Read and write FPGA；Voltage, electric current, the temperature sampling signal of sampling module output are sent to main control module, are carried out respectively by DSP and FPGA
ADC is changed.
Further specifically optimize as the utility model scheme, conditioned sampled signal is cut by analog switch packet
Change, realize the ADC channel time-sharing multiplex of main control module；Enable signal CS_EN1, CS_EN2 of analog switch is by main control module control
System, enables signal low level effectively, and enabling signal high level, then corresponding analog switch is output as tri-state.
Further specifically optimize as the utility model scheme, polylith input/output interface module is by main control module through connecing
Data/address bus and address bus, chip selection signal line, read-write capability control line on mouth expansion bus realize read and write access.
Compared to the prior art the utility model, the advantage is that：
The utility model uses the modularity control platforms that are combined with FPGA of DSP, by DSP and FPGA to feedback signal simultaneously
Sampled, the response of protection circuit is not required to handle by DSP and logic circuit parallel directly inside FPGA performs hardware
Protection circuit is acted, and is responded rapider.
The utility model uses the modularity control platform that DSP is combined with FPGA, and the threshold value of protection circuit is in FPGA
Portion's programming setting, on the premise of external sampling circuit and protection circuit is not changed, adapts to the need of different capacity grade type
Ask, while also optimizing circuit system, be originally exposed to function outside and that cumbersome protection circuit is realized and be incorporated into FPGA
Inside, not only make it that hardware circuit is more compact, it may have more preferable EMC characteristics.
It is compatible with FPGA Modularized digital power supply platform its main control module energy based on DSP that the utility model is provided
Two level and three Level Technologies, PWM delivery outlets up to 12 tunnels also meet three on the premise of meeting two level PWMs driving mouth demand
Level PWM drives mouth quantity demand.The signal sampling passage of its signal sampling module supports the sampling of multichannel high tension voltage and multichannel
Hall type current sensor interface circuit and multichannel transformer type current sensor interface circuit, and temperature sensor PT100 0
Interface, this set control platform supports the insertion of polylith signal sampling module to extend sampling channel.The control of input/output interface module
System is extended using EBI, and DSP and FPGA can be by Interface Expanding bus marco polylith input/output interface board
CPLD, based on this expansible polylith input/output interface board.Modular function is divided and unified bus type interface is enhanced
The durability of the control platform, is that developer improves efficiency, reduces maintenance cost.
Additional aspect and advantage of the present utility model will be set forth in part in the description, partly by from following description
In become obvious, or by it is of the present utility model practice recognize.
Brief description of the drawings
, below will be to embodiment in order to illustrate more clearly of the utility model embodiment or technical scheme of the prior art
Or the accompanying drawing used required in description of the prior art is briefly described, it should be apparent that, drawings in the following description are only
It is some embodiments of the present utility model, for those of ordinary skill in the art, is not paying the premise of creative work
Under, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is Modularized digital power supply platform feature sketch；
Fig. 2 expansion bus interface schematic diagrames；
Fig. 3 is FPGA internal combinational logic schematic block circuit diagrams；
Fig. 4 is sampling module extension schematic diagram；
Fig. 5 is input/output interface module extension schematic diagram.
Embodiment
The exemplary embodiment of the disclosure is more fully described below with reference to accompanying drawings.Although showing the disclosure in accompanying drawing
Exemplary embodiment, it being understood, however, that may be realized in various forms the disclosure without should be by embodiments set forth here
Limited.On the contrary, these embodiments are provided to facilitate a more thoroughly understanding of the present invention, and can be by the scope of the present disclosure
Complete conveys to those skilled in the art.
In description of the present utility model, it is to be understood that term " longitudinal direction ", " transverse direction ", " on ", " under ", " preceding ",
The orientation or position relationship of the instruction such as " rear ", "left", "right", " vertical ", " level ", " top ", " bottom ", " interior ", " outer " be based on
Orientation shown in the drawings or position relationship, are for only for ease of description the utility model, rather than indicate or imply signified dress
Put or element there must be specific orientation, with specific azimuth configuration and operation, therefore it is not intended that to the utility model
Limitation.
The function connects of Modularized digital power supply platform based on DSP and FPGA, as shown in figure 1, main control module, adopting
The terminal that egf block, input/output interface module are matched by identical with interface board respectively, which is inserted on interface expansion board, sets up each
The electrical connection of individual module.Interface expansion board reserves slot for extra sampling module and input/output interface module on demand,
Realize the extension of polylith sampling module and input/output interface module.
As shown in figure 1, main control module is combined using DSP with FPGA, abundant outer of DSP is set to system and provides various communications to connect
Mouth is such as：RS485, RS232, CAN etc..Main control module contains real time clock unit and super capacitor, clock after electricity under feasible system
The uninterrupted function of timing.FeRAM memory chip of the main control module containing parallel interface, DSP is visited by array bus and address bus
Ask, feasible system catastrophic failure stop moment records the failure wave-recording function of service data.Main control module contains display module, can
Realize the human-computer interaction function for showing system running state.
Main control module FPGA carries ADC analog conversion functions, and sample rate is maximum up to 1M.Main control module dsp operation is controlled
Algorithm, the PWM sent passes through FPGA output control switch pipes, such as IGBT, the electronic power switch device such as metal-oxide-semiconductor.Main control module
The feedback signals such as DSP ADC real-time samplings voltage, electric current, temperature, the value detected be more than software set protection value when and hold
A continuous segment fault acknowledging time, stops PWM outputs.This is software protection action.Main control module software protection is the system first order
Protection act, hardware protection is system second level protection act, and hardware protection action acts more rapid, hardware than software protection
Protect thresholding one-level higher than software protection thresholding.When failure is triggered to hardware protection point thresholding, hardware protection circuit is direct
Block PWM outputs.The hardware protection threshold value of programming setting is different according to type difference in main control module FPGA, can be on demand
Setting.
As shown in figure 1, all input ports are all through light-coupled isolation on input/output interface module, the driving of optocoupler is by isolation electricity
Source powers.The driving of all delivery outlets is all isolated by relay.Ensure reliable safety characteristic.Input/output interface module is by plate
Reset circuit electrical part above and below module ensures that delivery outlet is low level on upper CPLD controls, plate, realizes that the power-on and power-off of safety are patrolled
Volume.There is toggle switch in input/output module, the response to different chip selection signals in bus is realized by different dial-up states.
Therefore the expanded function of input/output module is also realized.
As shown in Fig. 2 expansion interface plate provides unified expansion bus interface for each functional module, expansion bus interface contains
Data/address bus, address bus, read-write control line, piece select control signal wire, universal input output signal line, ADC sampled signals line,
Power line and ground potential etc..For power panel supply path is provided to other functional module plates.
The feedback quantities such as voltage, electric current, the temperature of the main acquisition system of sampling module.Sampling module is sampled with difference channel
The high tension voltage of system.Sampling module provides the current sampling circuit of Hall type current sensor standard interface.Sampling module is provided
The current sampling circuit of mutual inductance type current sensor standard interface.Sampling module provides the temperature of the interface of temperature sensor PT100 0
Spend sample circuit.All sampled signals all nurse one's health sampled signal through operational amplifier combinational circuit.
As Fig. 3 shows, main control module DSP passes through data/address bus and address bus reads and writes FPGA.The voltage of sampling module output,
The sampled signals such as electric current, temperature are sent to main control module, and ADC conversions are carried out respectively by DSP and FPGA.It can be compiled in main control module FPGA
The combination logic function of journey realizes the envelope wave energy of failure in real time more quicker than DSP envelopes ripple.FPGA is with 1M hertz of conversion speed
Sampled voltage, electric current, temperature signal are spent, when failure occurs, voltage that such as FPGA is sampled, electric current, temperature signal persistently surpass
Protection value set in advance in FPGA is crossed, and after filtering after the time, FPGA blocks PWM output.This is hardware protection action.
Switch as shown in figure 4, conditioned sampled signal is grouped by analog switch, realize the ADC channel point of main control module
Shi Fuyong.Enable the signal CS_EN1, CS_EN2 of analog switch are enabled signal low level effectively, enabled by master control module controls
Then corresponding analog switch is output as the gating for the sampled signal being grouped on tri-state, same analog switch by simulating to signal high level
The state switching of the low and high level of the channel selecting signal of switch.So the output of polylith sampling module is by analog switch control,
Realize the time-sharing multiplex of ADC channel in extension mouth bus.Therefore the expanded function of sampling module is also achieved.
Because sampled signal adds up as many as 22 tunnels in monolithic sampling module, realized by analog switch packet switching to extension
The time-sharing multiplex of ADC channel in mouth bus.Wherein ADCS1 switch-over control signals are by master control module controls, and when enabling, signal is effective
When, when ADCS1 is low level, sampled signal A groups gating, when ADCS1 is high level, sampled signal B groups gating.
As shown in figure 5, polylith input/output interface module by main control module through the data/address bus in Interface Expanding bus and
Address bus, chip selection signal line, read-write capability control line etc. realize read and write access.
While there has been shown and described that embodiment of the present utility model, it will be understood by those skilled in the art that：
These embodiments can be carried out with a variety of changes, modification in the case where not departing from principle of the present utility model and objective, replaced
And modification, scope of the present utility model limits by claim and its equivalent.
Claims (6)
1. the Modularized digital power supply platform based on DSP and FPGA, it is characterised in that main control module, sampling module, input
The terminal that output interface module is matched by identical with interface board respectively is inserted on interface expansion board, set up the electricity of modules
Gas is connected；Interface expansion board reserves slot provided with extra sampling module and input/output interface module on demand；
Main control module is combined using DSP with FPGA, and DSP provides various communication interfaces, including RS485, RS232 or CAN for system
In one or more；Main control module contains real time clock unit and super capacitor, and clock is uninterruptedly counted after electricity under feasible system
When；FeRAM memory chip of the main control module containing parallel interface, DSP is accessed by data/address bus and address bus；Main control module contains
Display module, can be achieved the human-computer interaction function of display system running state；Main control module FPGA carries ADC digital-to-analogue conversion work(
Can, sample rate is maximum up to 1M；Main control module dsp operation control algolithm, the PWM sent passes through FPGA output control switch pipes,
Controlling switch pipe is IGBT or metal-oxide-semiconductor；Main control module DSP ADC real-time samplings voltage, electric current and temperature feedback signal, detection
To value be more than the protection value of software set when and continue a segment fault acknowledging time, stop PWM outputs；In main control module FPGA
The hardware protection threshold value for programming setting is different according to type difference, sets on demand；ADC samplings inside main control module FPGA
Voltage, electric current and temperature information when being more than the hardware protection threshold value of programming setting, after one section of filtering time confirms, envelope
The PWM outputs that lock DSP is sent；
All input ports are all through light-coupled isolation on input/output interface module, and the driving of optocoupler is powered by insulating power supply；It is all defeated
The driving of outlet is all isolated by relay；Input/output interface module CPLD on plate is controlled, and reset circuit is in module on plate
Lower electric moment will ensure that delivery outlet is low level；There is toggle switch in input/output module, pass through different dial-up state realizations pair
The response of different chip selection signals in bus.
2. the Modularized digital power supply platform according to claim 1 based on DSP and FPGA, it is characterised in that connect
Oralia provides unified expansion bus interface for each functional module；Expansion bus interface is containing data/address bus, address bus, read-write control
Line processed, piece select control signal wire, universal input output signal line, ADC sampled signals line, power line and ground potential, are power panel
Supply path is provided to other functional module plates.
3. the Modularized digital power supply platform according to claim 1 based on DSP and FPGA, it is characterised in that adopt
Voltage, electric current and the temperature feedback amount of egf block acquisition system；Sampling module is with the high tension voltage of difference channel sampling system；Adopt
Egf block provides the current sampling circuit of Hall type current sensor standard interface；Sampling module provides mutual inductance type current sense
The current sampling circuit of device standard interface；Sampling module provides the temperature sampling circuit of the interface of temperature sensor PT100 0；It is all
Sampled signal all nurses one's health sampled signal through operational amplifier combinational circuit.
4. the Modularized digital power supply platform according to claim 1 based on DSP and FPGA, it is characterised in that main
Control module DSP and FPGA is read and write by data/address bus and address bus；Voltage, electric current, the temperature sampling signal of sampling module output
Main control module is sent to, ADC conversions are carried out by DSP and FPGA respectively.
5. the Modularized digital power supply platform according to claim 1 based on DSP and FPGA, it is characterised in that warp
The sampled signal of conditioning is grouped by analog switch to be switched, and realizes the ADC channel time-sharing multiplex of main control module；The enable of analog switch
Signal CS_EN1, CS_EN2 are by master control module controls, and chip enables signal low level effectively, and it is then right that chip enables signal high level
In analog switch be output as tri-state.
6. the Modularized digital power supply platform according to claim 1 based on DSP and FPGA, it is characterised in that many
Block input/output interface module by main control module through the data/address bus and address bus in Interface Expanding bus, chip selection signal line,
Read-write capability control line realizes read and write access.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107908584A (en) * | 2017-11-30 | 2018-04-13 | 四川泛华航空仪表电器有限公司 | A kind of 485 communication networks of multichannel RS |
| CN110501990A (en) * | 2018-09-30 | 2019-11-26 | 国核自仪系统工程有限公司 | Digitize the control circuit of I&C system |
| CN111522693A (en) * | 2020-04-20 | 2020-08-11 | 中国航天科工集团八五一一研究所 | On-line reconstruction method for enhancing reliability of satellite platform |
| CN111897732A (en) * | 2020-08-04 | 2020-11-06 | 北京师范大学 | Embedded fatigue detection platform and fatigue detection method |
| CN113433846A (en) * | 2021-05-24 | 2021-09-24 | 核工业理化工程研究院 | Modular combined type frequency converter power module control board based on DSP |
| CN117827725A (en) * | 2024-03-04 | 2024-04-05 | 山东华翼微电子技术股份有限公司 | EMC interface expansion module, system and method based on FPGA |
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2017
- 2017-02-24 CN CN201720177785.9U patent/CN206515660U/en active Active
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107908584A (en) * | 2017-11-30 | 2018-04-13 | 四川泛华航空仪表电器有限公司 | A kind of 485 communication networks of multichannel RS |
| CN107908584B (en) * | 2017-11-30 | 2021-04-02 | 四川泛华航空仪表电器有限公司 | Multi-path RS-485 communication network |
| CN110501990A (en) * | 2018-09-30 | 2019-11-26 | 国核自仪系统工程有限公司 | Digitize the control circuit of I&C system |
| CN110501990B (en) * | 2018-09-30 | 2024-03-12 | 国核自仪系统工程有限公司 | Control circuit of digital instrument control system |
| CN111522693A (en) * | 2020-04-20 | 2020-08-11 | 中国航天科工集团八五一一研究所 | On-line reconstruction method for enhancing reliability of satellite platform |
| CN111522693B (en) * | 2020-04-20 | 2024-01-09 | 中国航天科工集团八五一一研究所 | On-line reconstruction method for enhancing reliability of satellite platform |
| CN111897732A (en) * | 2020-08-04 | 2020-11-06 | 北京师范大学 | Embedded fatigue detection platform and fatigue detection method |
| CN111897732B (en) * | 2020-08-04 | 2021-11-12 | 北京师范大学 | Embedded fatigue detection platform and fatigue detection method |
| CN113433846A (en) * | 2021-05-24 | 2021-09-24 | 核工业理化工程研究院 | Modular combined type frequency converter power module control board based on DSP |
| CN113433846B (en) * | 2021-05-24 | 2022-10-28 | 核工业理化工程研究院 | Modular combined type frequency converter power module control board based on DSP |
| CN117827725A (en) * | 2024-03-04 | 2024-04-05 | 山东华翼微电子技术股份有限公司 | EMC interface expansion module, system and method based on FPGA |
| CN117827725B (en) * | 2024-03-04 | 2024-05-14 | 山东华翼微电子技术股份有限公司 | EMC interface expansion module, system and method based on FPGA |
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