CN109557447A - A kind of power management class IC test macro - Google Patents
A kind of power management class IC test macro Download PDFInfo
- Publication number
- CN109557447A CN109557447A CN201811067791.4A CN201811067791A CN109557447A CN 109557447 A CN109557447 A CN 109557447A CN 201811067791 A CN201811067791 A CN 201811067791A CN 109557447 A CN109557447 A CN 109557447A
- Authority
- CN
- China
- Prior art keywords
- test
- module
- interface
- power management
- output voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
- G01R19/0084—Arrangements for measuring currents or voltages or for indicating presence or sign thereof measuring voltage only
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R23/00—Arrangements for measuring frequencies; Arrangements for analysing frequency spectra
- G01R23/02—Arrangements for measuring frequency, e.g. pulse repetition rate; Arrangements for measuring period of current or voltage
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The invention discloses a kind of power management class IC test macros characterized by comprising OS parametric testing module, output voltage test module, frequency parameter test module, interface communication module, display module, function selecting module and cpu function module；The interface communication module specifically includes that TTL interface and RS232 interface, TTL interface is mainly used to manipulator or sorting machine is communicated, realize the quality classification in batch production process, RS232 interface is mainly used for communicating with PC machine, for realizing that the related data in test process, which is uploaded to the end PC, to be received；The frequency parameter test module exactly tests the actual operating frequency and other frequencies for needing to test of power management chip；The output voltage test module is mainly used for testing the output end voltage value of power management chip.For the present invention compared with universal test system, this test macro adds frequency test module and output voltage test module, has lacked the time for needing to wait, has improved the qualification rate of test.
Description
Technical field
The present invention relates to power management class IC the field of test technology more particularly to a kind of power management class IC test macros.
Background technique
Energy management center when power management chip in electronic apparatus system is responsible for chip or out-put supply
The responsibilities such as distribution, voltage conversion, detection and battery protection, power management chip are the important supports of electronic system power consumption performance,
Good power management can substantially reduce the power consumption of electronic equipment, increase the cruising ability of battery, improve user experience, power supply
Management class chip refers mainly to the power management IC of lithium battery here, in actual IC test production process, needs to its property
Energy parameter is completely tested, to determine its quality.
Tradition generallys use manipulator using the test method of general purpose test equipment or equipment is surveyed in sorting machine connection
Examination, this test method testing time is long, and the qualification rate of test is low, and production cost is higher.
Summary of the invention
The purpose of the present invention is to solve long to testing time when managing class IC test in the prior art, the conjunctions of test
Lattice rate is low, the higher problem of production cost, and a kind of power management class IC test macro proposed.
To achieve the goals above, present invention employs following technical solutions:
A kind of power management class IC test macro, comprising: OS parametric testing module, output voltage test module, frequency ginseng
Number test module, interface communication module, display module, function selecting module and cpu function module；
The display module is mainly used for showing the test data in production process, and display content includes: production test
Product type, actual Parameter divides Bin situation, non-defective unit percentage；
The function selecting module is mainly used to realize test and debugging and control in actual test production process；
The interface communication module specifically includes that TTL interface and RS232 interface, TTL interface be mainly used to manipulator or
Sorting machine is communicated, and realizes the quality classification in batch production process, and RS232 interface is mainly used for communicating with PC machine, be used to
Realize that the related data in test process, which is uploaded to the end PC, to be received；
Whether the OS parametric testing module, i.e. protection diode on test IC pin are intact；
The frequency parameter test module, exactly test power management chip actual operating frequency and other need to survey
The frequency of examination；
The output voltage test module is mainly used for testing the output end voltage value of power management chip；
The cpu function module is using STM32 as microcontroller, and main realization is to whole system all functional modules
Control, realize chip testing function.
Preferably, the chip in output voltage test module is powered using 12V, and output voltage can be directly to two section 4.2V
Lithium battery serial connection charge, the voltage of output is between 7.9--8.7V, after attenuator circuit, is directly inputted to the ADC of STM32
Part carries out voltage acquisition, is ultimately converted to the output voltage values of actual chips.
Preferably, the RS232 interface is mainly used for communicating with PC machine, for realizing the dependency number in test process
It is received according to the end PC is uploaded to, which is mainly used for actual test parameter item debugging.
Preferably, the model STM32F103, STM32F103 of the STM32 microcontroller are sealed using QFP100
Dress.
Preferably, the function selecting module includes 5 function buttons: mode setting, START, PAUSE, STOP, point
It surveys；Mode setting: test pattern and the switching of debugging mode both of which；START: production " beginning " function；PAUSE: production
" pause " function, then by can once resume production；STOP: production " stopping " function；Point survey: to a certain chip to be tested into
Row manual test, it is effectively primary, it tests one time, this process mechanism hand not will do it result action.
Preferably, a kind of test method of power management class IC test macro the following steps are included:
6.1) system initialization is carried out first, TTL interface, RS232 interface, key-press input, display module and other are all
The initialization of interlock circuit parameter；
6.2) it is determined whether to enable RS232 serial ports, if opening, are terminated using PC by data.Otherwise next step journey is carried out
Sequence；
6.3) start the test in order of chip parameters；
6.4) OS test is carried out, judging result after the completion of test: such as FAIL, then leaps to " test is completed ", carry out down
One test；Such as PASS, then the next item down parameter testing is carried out；
6.5) frequency test is carried out, judging result after the completion of test: such as FAIL, then leaps to " test is completed ", carry out
Next test；Such as PASS, then the next item down parameter testing is carried out；
6.6) output voltage test is carried out, judging result after the completion of test: such as FAIL, then leaps to " test is completed ",
Carry out next test；Such as PASS, then the next item down parameter testing is carried out；
6.7) after the completion of the test of all parameter items, illustrate the chips preferably product, then carry out next test, program
It is repeated since third step.
Compared with prior art, the present invention provides a kind of power management class IC test macros, have following beneficial to effect
Fruit:
1, a kind of power management class IC test macro, by the way that compared with universal test system, this test macro is added
Frequency test module and output voltage test module, output voltage test module are used to test the output end of power management chip
Voltage value, frequency parameter test module are exactly to test the actual operating frequency and other frequencies for needing to test of power management chip
Rate, principle are the period of big clock to be measured to be measured with one section of small standard time, and then calculate frequency, and reducing needs
The time to be waited improves the qualification rate of test.
2, a kind of power management class IC test macro, is made of modules, reduces production to a certain extent
Cost.
Part is not directed in the device to be the same as those in the prior art or can be realized by using the prior art.
Detailed description of the invention
Fig. 1 is a kind of logi function chart of power management class IC test macro proposed by the present invention；
Fig. 2 is a kind of test method flow chart of power management class IC test macro proposed by the present invention；
Fig. 3 is a kind of circuit diagram of power management class IC test macro TLT interface proposed by the present invention；
Fig. 4 is a kind of partial circuit of power management class IC test macro frequency parameter test module proposed by the present invention
Figure；
Fig. 5 is a kind of circuit diagram of power management class IC test macro output voltage test module proposed by the present invention.
In figure: 1, cpu function module；2, OS parametric testing module；3, frequency parameter test module；4, output voltage is surveyed
Die trial block；5, display module；6, function selecting module；7, interface communication module.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.
In the description of the present invention, it is to be understood that, term " on ", "lower", "front", "rear", "left", "right",
The orientation or positional relationship of the instructions such as "top", "bottom", "inner", "outside" is to be based on the orientation or positional relationship shown in the drawings, and is only
For the convenience of describing the present invention and simplifying the description, rather than the device or element of indication or suggestion meaning must have specifically
Orientation is constructed and operated in a specific orientation, therefore is not considered as limiting the invention.
Embodiment 1:
With reference to Fig. 1-5, a kind of power management class IC test macro, comprising: OS parametric testing module 2, output voltage test
Module 4, frequency parameter test module 3, interface communication module 7, display module 5, function selecting module 6 and cpu function module 1；
The display module 5 is mainly used for showing the test data in production process, and display content includes: the product of production test
Model, actual Parameter divide Bin situation, non-defective unit percentage；The function selecting module 6 is mainly used to realize practical
Test test and debugging and control in production process；
The interface communication module 7 specifically includes that TTL interface and RS232 interface, TTL interface be mainly used to manipulator or
Sorting machine is communicated, and realizes the quality classification in batch production process, and RS232 interface is mainly used for communicating with PC machine, be used to
Realize that the related data in test process, which is uploaded to the end PC, to be received；TTL interface used opto-coupler chip to signal carry out every
From, to enhance the anti-interference ability of signal, improve the stability of communication process, used two kinds of opto-coupler chip TLP281-1 and
TLP281-4 realizes signal isolation, is indicated using LED light test result, more illustrative simplicity, specific test philosophy electricity
Road figure is auspicious to see Fig. 3；RS232 interface uses the MAX3232 chip with standard serial communications protocol to realize, transceiver MAX3232
It is equipped with proprietary Low-Volt Leakage transmitter output state, is shown true by dual charge pump in 3.0V to 5.5V for pressure
Positive RS-232 agreement device performance, these devices only need the external small capacitances of 4 0.1 μ F, are used for charge pump.Keeping RS-
Under the premise of 232 agreement output levels, MAX3232 can ensure that the message transmission rate of 120kbps, specific test philosophy circuit
Scheme auspicious to see Fig. 4；
Whether the OS parametric testing module 2, i.e. protection diode on test IC pin are intact；
The frequency parameter test module 3, exactly test power management chip actual operating frequency and other need to survey
The frequency of examination；Its working principle is that measuring the period of big clock to be measured with one section of small standard time, and then calculate frequency
Rate, Fig. 5 are the circuits of frequency test, and comparative level is provided that+0.75V (electric resistance partial pressure acquisition), with comparing when actual measurement
Device (LM339) is shaped to square wave, then is measured.PD0--PD2 therein is frequency input, is used inside STM32
The measurement of frequency is completed using timer interruption, then calculate be converted to it is actually required as a result, using the frequency test method
It can measure 700K frequency below, test scope is larger；
The output voltage test module 4 is mainly used for testing the output end voltage value of power management chip；This chip
Using when using 12V power, output voltage can directly to the lithium battery serial connection charge of two section 4.2V, therefore test when need to simulate
Practical application condition out.Its circuit as shown in figure 5, output voltage between 7.9--8.7V, after attenuator circuit, directly it is defeated
The ADC portion entered to STM32 carries out voltage acquisition, is ultimately converted to the output voltage values of actual chips；
The cpu function module 1 is using STM32 as microcontroller, and main realization is to whole system all functional modules
Control, realize that chip testing function, this system use STM32F103 model, STM32F103 has the characteristics that, kernel:
ARM32 Cortex-M3CPU, maximum operating frequency 72MHz, 1.25DMIPS/MHz, monocycle multiplication and hardware division；When
Clock, reset and power management: the power supply power supply of 2.0-3.6V and the driving voltage of I/O interface, electrification reset (POR), power down are multiple
Position (PDR) and programmable voltage detector (PVD), the crystal oscillator of 4-16MHz, the 8MHz RC for embedding adjustment before dispatching from the factory vibrate electricity
Road, the RC oscillating circuit of internal 40kHz, the crystal oscillator for the PLL of cpu clock, with calibration for the 32kHz of RTC；Low function
Consumption: 3 kinds of low-power consumption modes: suspend mode stops, standby mode, is RTC and the VBAT of back-up registers power supply；Maximum of up to 112
A quick port I/O, the port I/O may map to 16 external interrupt vectors, and in addition to simulation input, all is ok
Receive the input within 5V；The performance for testing it in test is high, and the cost of test is low, and power consumption is smaller.
Embodiment 2:
It includes: OS parametric testing module 2, interface communication module 7, display module that multiple power source, which manages class IC test macro,
5, function selecting module 6 and cpu function module 1, the display module 5 are mainly used for showing the test number in production process
According to display content includes: the product type of production test, actual Parameter divide Bin situation, non-defective unit percentage；
The function selecting module 6 is mainly used to realize test and debugging and control in actual test production process；
The interface communication module 7 specifically includes that TTL interface and RS232 interface, TTL interface be mainly used to manipulator or
Sorting machine is communicated, and realizes the quality classification in batch production process, and RS232 interface is mainly used for communicating with PC machine, be used to
Realize that the related data in test process, which is uploaded to the end PC, to be received；
The cpu function module 1 is using STM32 as microcontroller, and main realization is to whole system all functional modules
Control, realize chip testing function, the RS232 interface be mainly used for PC machine communicate, will be in test process for realizing
Related data upload to the reception of the end PC, which is mainly used for the debugging of actual test parameter item；
The model STM32F103 of the STM32 microcontroller, STM32F103 are packaged using QFP100；
The function selecting module 6 includes 5 function buttons: mode setting, START, PAUSE, STOP, point are surveyed；Mode
Setting: test pattern and the switching of debugging mode both of which；START: production " beginning " function；PAUSE: production " pause " function
Can, then by can once resume production；STOP: production " stopping " function；Point is surveyed: being surveyed manually to a certain chip to be tested
Examination, it is effectively primary, it tests one time, this process mechanism hand not will do it result action；
Multiple power source manages the test method of class IC test macro, and step includes:
6.1) system initialization, TTL interface, RS232 interface, key-press input, display module 5 and other institutes are carried out first
There is the initialization of interlock circuit parameter；
6.2) it is determined whether to enable RS232 serial ports, if opening, are terminated using PC by data.Otherwise next step journey is carried out
Sequence；
6.3) start the test in order of chip parameters；
6.4) OS test is carried out, judging result after the completion of test: such as FAIL, then leaps to " test is completed ", carry out down
One test；Such as PASS, then the next item down parameter testing is carried out；
6.5) after the completion of the test of all parameter items, illustrate the chips preferably product, then carry out next test, program
It is repeated since third step
Embodiment 3:
This test platform voltage source manages class IC test, comprising: OS parametric testing module 2, output voltage test module 4, frequency
Rate parametric testing module 3, interface communication module 7, display module 5, function selecting module 6 and cpu function module 1；
The display module 5 is mainly used for showing the test data in production process, and display content includes: production test
Product type, actual Parameter divides Bin situation, non-defective unit percentage；
The function selecting module 6 is mainly used to realize test and debugging and control in actual test production process；
The interface communication module 7 specifically includes that TTL interface and RS232 interface, TTL interface be mainly used to manipulator or
Sorting machine is communicated, and realizes the quality classification in batch production process, and RS232 interface is mainly used for communicating with PC machine, be used to
Realize that the related data in test process, which is uploaded to the end PC, to be received；The OS parametric testing module 2, i.e., on test IC pin
Protection diode it is whether intact；
The frequency parameter test module 3, exactly test power management chip actual operating frequency and other need to survey
The frequency of examination；The output voltage test module 4 is mainly used for testing the output end voltage value of power management chip；
The cpu function module 1 is using STM32 as microcontroller, and main realization is to whole system all functional modules
Control, realize chip testing function；
Chip in output voltage test module 4 is powered using 12V, and output voltage can be directly to the lithium electricity of two section 4.2V
Pond serial connection charge, the voltage of output is between 7.9--8.7V, after attenuator circuit, be directly inputted to the ADC portion of STM32 into
Row voltage acquisition is ultimately converted to the output voltage values of actual chips.
The RS232 interface is mainly used for communicating with PC machine, uploads to the related data in test process for realizing
The end PC receives, which is mainly used for actual test parameter item debugging.
The model STM32F103 of the STM32 microcontroller, STM32F103 are packaged using QFP100；It is described
Function selecting module 6 includes 5 function buttons: mode setting, START, PAUSE, STOP, point are surveyed；Mode setting: test mould
Formula and the switching of debugging mode both of which；START: production " beginning " function；PAUSE: production " pause " function, then by primary
It can resume production；STOP: production " stopping " function；Point is surveyed: manual test carried out to a certain chip to be tested, effective one
It is secondary, it tests one time, this process mechanism hand not will do it result action.
This test platform voltage source manages class IC test method, and step includes:
6.1) system initialization, TTL interface, RS232 interface, key-press input, display module 5 and other institutes are carried out first
There is the initialization of interlock circuit parameter；
6.2) it is determined whether to enable RS232 serial ports, if opening, are terminated using PC by data.Otherwise next step journey is carried out
Sequence；
6.3) start the test in order of chip parameters；
6.4) 0S test is carried out, judging result after the completion of test: such as FAIL, then leaps to " test is completed ", carry out down
One test；Such as PASS, then the next item down parameter testing is carried out；
6.5) frequency test is carried out, judging result after the completion of test: such as FAIL, then leaps to " test is completed ", carry out
Next test；Such as PASS, then the next item down parameter testing is carried out；
6.6) output voltage test is carried out, judging result after the completion of test: such as FAIL, then leaps to " test is completed ",
Carry out next test；Such as PASS, then the next item down parameter testing is carried out；
6.7) after the completion of the test of all parameter items, illustrate the chips preferably product, then carry out next test, program
It is repeated since third step.
| This test macro | Universal test system | |
| Test quantity | 2327 | 2327 |
| BIN1(Pass) | 2121 | 2115 |
| BIN2(OS) | 163 | 167 |
| BIN3 (frequency) | 42 | 44 |
| BIN4 (voltage) | 1 | 1 |
| Qualification rate | 91.15% | 90.89% |
| Testing time | 2.5S | 2.55S |
Compared with Example 2, output voltage test module 4, frequency parameter test module 3 are increased in embodiment 3,
Output voltage test module 4 is used to test the output end voltage value of power management chip, and frequency parameter test module 3 is exactly to survey
Try power management chip actual operating frequency and other need frequencies for testing, principle be with one section of small standard time come
The period of big clock to be measured is measured, and then calculates frequency, is increasing output voltage test module 4, frequency as can be seen from the table above
After rate parametric testing module 3, this measuring system qualification rate is higher than the qualification rate of universal test system, and tests the time used
It is few.
The foregoing is only a preferred embodiment of the present invention, but protection scope of the present invention be not limited to
This, anyone skilled in the art in the technical scope disclosed by the present invention, according to the technique and scheme of the present invention
And its inventive concept is subject to equivalent substitution or change, should be covered by the protection scope of the present invention.
Claims (6)
1. a kind of power management class IC test macro characterized by comprising OS parametric testing module, output voltage test mould
Block, frequency parameter test module, interface communication module, display module, function selecting module and cpu function module；
The display module is mainly used for showing the test data in production process, and display content includes: the product of production test
Model, actual Parameter divide Bin situation, non-defective unit percentage；
The function selecting module is mainly used to realize test and debugging and control in actual test production process；
The interface communication module specifically includes that TTL interface and RS232 interface, and TTL interface is mainly used to manipulator or sorting machine
Communicated, realize batch production process in quality classification, RS232 interface be mainly used for PC machine communicate, for realize by
Related data in test process uploads to the reception of the end PC；
Whether the OS parametric testing module, i.e. protection diode on test IC pin are intact；
The frequency parameter test module exactly tests the actual operating frequency and other frequencies for needing to test of power management chip
Rate；
The output voltage test module is mainly used for testing the output end voltage value of power management chip；
The cpu function module is using STM32 as microcontroller, the main control realized to whole system all functional modules
System realizes chip testing function.
2. a kind of power management class IC test macro according to claim 1, which is characterized in that output voltage test module
In chip powered using 12V, output voltage can exist directly to the lithium battery serial connection charge of two section 4.2V, the voltage of output
Between 7.9--8.7V, after attenuator circuit, the ADC portion for being directly inputted to STM32 carries out voltage acquisition, is ultimately converted to reality
The output voltage values of border chip.
3. a kind of power management class IC test macro according to claim 1, which is characterized in that the RS232 interface master
It is used to communicate with PC machine, for realizing that the related data in test process, which is uploaded to the end PC, to be received, the interface module is main
It is debugged for actual test parameter item.
4. a kind of power management class IC test macro according to claim 1, which is characterized in that the STM32 microcontroller
The model STM32F103 of device, STM32F103 are packaged using QFP100.
5. a kind of power management class IC test macro according to claim 1, which is characterized in that the function selecting module
Including 5 function buttons: mode setting, START, PAUSE, STOP, point are surveyed；Mode setting: test pattern and debugging mode two
Kind pattern switching；START: production " beginning " function；PAUSE: production " pause " function, then by can once resume production；STOP:
Produce " stopping " function；Point is surveyed: manual test is carried out to a certain chip to be tested, it is effectively primary, and it tests one time, this process machine
Tool hand not will do it result action.
6. a kind of test method of any power management class IC test macro, feature exist according to claim 1-5
In, comprising the following steps:
6.1) system initialization, TTL interface, RS232 interface, key-press input, display module and other all correlations are carried out first
The initialization of circuit parameter；
6.2) it is determined whether to enable RS232 serial ports, if opening, are terminated using PC by data.Otherwise next step program is carried out；
6.3) start the test in order of chip parameters；
6.4) OS test is carried out, judging result after the completion of test: such as FAIL, then " test is completed " is leapt to, carries out next
Test；Such as PASS, then the next item down parameter testing is carried out；
6.5) frequency test is carried out, judging result after the completion of test: such as FAIL, then leaps to " test is completed ", carry out next
Test；Such as PASS, then the next item down parameter testing is carried out；
6.6) output voltage test is carried out, judging result after the completion of test: such as FAIL, then leaps to " test is completed ", carry out
Next test；Such as PASS, then the next item down parameter testing is carried out；
6.7) after the completion of the test of all parameter items, illustrate the chips preferably product, then carry out next test, program is from third
Step starts to repeat.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811067791.4A CN109557447A (en) | 2018-09-13 | 2018-09-13 | A kind of power management class IC test macro |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811067791.4A CN109557447A (en) | 2018-09-13 | 2018-09-13 | A kind of power management class IC test macro |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109557447A true CN109557447A (en) | 2019-04-02 |
Family
ID=65864557
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811067791.4A Pending CN109557447A (en) | 2018-09-13 | 2018-09-13 | A kind of power management class IC test macro |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109557447A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112034376A (en) * | 2020-08-24 | 2020-12-04 | Oppo广东移动通信有限公司 | Power management apparatus and method |
| CN112816897A (en) * | 2020-12-30 | 2021-05-18 | 浪潮电子信息产业股份有限公司 | Detection system |
| CN113740716A (en) * | 2021-11-08 | 2021-12-03 | 深圳英集芯科技股份有限公司 | Charging chip test system and method |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5204837A (en) * | 1990-08-16 | 1993-04-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device having test mode |
| US5956350A (en) * | 1997-10-27 | 1999-09-21 | Lsi Logic Corporation | Built in self repair for DRAMs using on-chip temperature sensing and heating |
| JP2000036200A (en) * | 1998-07-02 | 2000-02-02 | Internatl Business Mach Corp <Ibm> | Integrated circuit chip, its operating method and dram |
| US20030226076A1 (en) * | 2002-05-30 | 2003-12-04 | Jong-Gu Kang | PC and ATE integrated chip test equipment |
| CN102354537A (en) * | 2011-07-06 | 2012-02-15 | 华中科技大学 | Method and system for testing chip of phase change memory |
| CN104485135A (en) * | 2014-12-04 | 2015-04-01 | 中国科学院微电子研究所 | Multimode SRAM single-particle testing method and device |
| CN204832267U (en) * | 2015-08-14 | 2015-12-02 | 万高(杭州)科技有限公司 | Chip test platform |
| CN207074250U (en) * | 2017-08-17 | 2018-03-06 | 深圳市思恩技术有限公司 | A kind of OS test systems and device |
-
2018
- 2018-09-13 CN CN201811067791.4A patent/CN109557447A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5204837A (en) * | 1990-08-16 | 1993-04-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device having test mode |
| US5956350A (en) * | 1997-10-27 | 1999-09-21 | Lsi Logic Corporation | Built in self repair for DRAMs using on-chip temperature sensing and heating |
| JP2000036200A (en) * | 1998-07-02 | 2000-02-02 | Internatl Business Mach Corp <Ibm> | Integrated circuit chip, its operating method and dram |
| US20030226076A1 (en) * | 2002-05-30 | 2003-12-04 | Jong-Gu Kang | PC and ATE integrated chip test equipment |
| CN102354537A (en) * | 2011-07-06 | 2012-02-15 | 华中科技大学 | Method and system for testing chip of phase change memory |
| CN104485135A (en) * | 2014-12-04 | 2015-04-01 | 中国科学院微电子研究所 | Multimode SRAM single-particle testing method and device |
| CN204832267U (en) * | 2015-08-14 | 2015-12-02 | 万高(杭州)科技有限公司 | Chip test platform |
| CN207074250U (en) * | 2017-08-17 | 2018-03-06 | 深圳市思恩技术有限公司 | A kind of OS test systems and device |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112034376A (en) * | 2020-08-24 | 2020-12-04 | Oppo广东移动通信有限公司 | Power management apparatus and method |
| CN112034376B (en) * | 2020-08-24 | 2023-08-29 | 哲库科技(北京)有限公司 | Power management apparatus and method |
| CN112816897A (en) * | 2020-12-30 | 2021-05-18 | 浪潮电子信息产业股份有限公司 | Detection system |
| CN112816897B (en) * | 2020-12-30 | 2022-07-08 | 浪潮电子信息产业股份有限公司 | Detection system |
| CN113740716A (en) * | 2021-11-08 | 2021-12-03 | 深圳英集芯科技股份有限公司 | Charging chip test system and method |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109557447A (en) | A kind of power management class IC test macro | |
| CN107689691A (en) | A kind of magnetic resonance type wireless charging sensor network nodes design method | |
| CN101707018B (en) | Electric energy metering verification simulating system | |
| CN103324163A (en) | Visible controllable wireless intelligent monitor | |
| CN101908012A (en) | Clock signal testing device and testing method thereof | |
| CN209591246U (en) | A kind of three-phase three-wire electric energy meter device for simulating false wiring with self-checking function | |
| CN204758693U (en) | A electrical measurement device for building intelligent electric system of using | |
| CN201805277U (en) | Domestic electric energy monitoring and managing device | |
| CN104284403A (en) | Low power consumption node design method for wireless sensor network | |
| CN208873259U (en) | A kind of smart home security system | |
| CN204214526U (en) | A kind of gas meter, flow meter multifunctional production test verification device | |
| CN109490749A (en) | A kind of eMMC FLASH class chip test system | |
| CN109490746A (en) | A kind of SPI FLASH class chip test system | |
| CN202083511U (en) | Intelligent wireless capacitive pressure transmitter | |
| CN103983864A (en) | Device used for graphic-card testing | |
| Molina-Robles et al. | An affordable post-silicon testing framework applied to a RISC-V based microcontroller | |
| CN201689579U (en) | Electric energy metering detection simulation system | |
| CN215870905U (en) | Micro power supply monitoring device | |
| CN205594155U (en) | Phased array radar antenna testing arrangement's pulse -generating circuit | |
| CN216411914U (en) | CAN bus and network interface data conversion device and control system | |
| CN205229797U (en) | A intelligent test appearance that is used for function test on cloud air conditioner line | |
| CN203415038U (en) | Card-swiping and coin-feeding dual-purpose electric car charging device | |
| Dong et al. | The design of wireless automatic meter reading system based on sopc | |
| CN203287516U (en) | Metering pulse simulation system for electric energy meter of electrical-information collection device | |
| CN204836358U (en) | Linear array CCD drive arrangement |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190402 |
|
| RJ01 | Rejection of invention patent application after publication |