CN109542840A

CN109542840A - A kind of SoC system

Info

Publication number: CN109542840A
Application number: CN201910068704.5A
Authority: CN
Inventors: 周清睿; 王海力
Original assignee: Jingwei Qili (shenzhen) Technology Co Ltd
Current assignee: Jingwei Qili (shenzhen) Technology Co Ltd
Priority date: 2019-01-24
Filing date: 2019-01-24
Publication date: 2019-03-29

Abstract

This application provides a kind of SoC system, including: on-site programmable gate array FPGA, micro-control unit MCU, the MCU include: special function register SFR unit；MCU is connect with FPGA, for the vacant address of cache in SFR unit into FPGA, to be expanded SFR in FPGA.The application is by increasing FPGA, utilize the programmable principle of FPGA, the hollow leeway location of SFR unit is mapped in FPGA, a new available SFR is constituted in FPGA, extend the number and function of SFR in MCU system, it realizes SoC system and extends SFR according to practical application request, while keeping the programming of SoC system and control function stronger, more flexible.

Description

A kind of SoC system

Technical field

The present invention relates to computer memory technical more particularly to a kind of SoC systems.

Background technique

With the development of computer technology, micro-control unit (Microcontroller Unit, MCU) has obtained swift and violent Development.In MCU system, special function register (Special Function Register, SFR) is each function in MCU system The corresponding register of energy component, for dynamically storing some status informations of computer operational process, and is used according to status information In the functions such as control and arithmetic and logical unit (ALU), I/O mouthfuls of parallel series, the Timer/counter interruption system of management MCU system.Such as In the port P0-P3, Timer/Counter T0, T1, TMOD, TCON, PCON, SCON, PSW, IE, A, B, IP etc. are SFR.

SFR is part most special in MCU system, existing system on chip (System on Chip, SoC) function Increase and extension is manufactured almost exclusively by and increases SFR to realize.So SFR is more, programming and control function are stronger, more flexible, But with increasing for SFR, required hardware resources are also more, and which adds costs.

For general SoC, when design, can determine the number of SFR as needed, in this way SFR in MCU system Number and function are fixed up, and SFR cannot be flexibly extended according to practical application request, therefore cannot realize other function Energy.

Summary of the invention

To solve the above-mentioned problems, the present invention provides a kind of SoC systems.

A kind of SoC system, including on-site programmable gate array FPGA, micro-control unit MCU, the MCU include: special function It can register SFR unit；The MCU is connect with the FPGA, for by the vacant address of cache in the SFR unit to described In FPGA, SFR is expanded in the FPGA.

In a kind of possible embodiment, the MCU is connected by dedicated bus with the SFR, and the MCU is to described SFR carries out write operation.

In a kind of possible embodiment, the MCU is connected by dedicated bus with the SFR, and the MCU is to described SFR carries out read operation.

In a kind of possible embodiment, the dedicated bus includes address bus and data/address bus, and the address is total Line is used to for the address information of the MCU data for being stored or being read being sent to the SFR, and the data/address bus is used for will The data stored in the MCU are sent to the SFR or the data read in the SFR are sent to the MCU.

The hollow leeway location of SFR unit is mapped to by increasing FPGA using the programmable principle of FPGA by the application In FPGA, a new available SFR is constituted in FPGA, the number and function of SFR in MCU system is extended, realizes SoC System extends SFR according to practical application request, while keeping the programming of SoC system and control function stronger, more flexible.

Detailed description of the invention

The attached drawing used required in embodiment or description of the prior art is briefly described below.

Fig. 1 is a kind of structural schematic diagram of SoC system provided by the embodiments of the present application；

Fig. 2 is the schematic diagram that MCU provided by the embodiments of the present application carries out read/write operation.

Specific embodiment

Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application is described.

It should be noted that the embodiment of the present invention is by taking 8051 single-chip microcontrollers as an example, but it is not limited only to 8051 single-chip microcontrollers, Ke Yiwei The MCU being arbitrarily applicable in.

Existing 8051 single-chip microcontroller has the program storage unit (PSU) of 4KB, address 0000H-0FFFH.Wherein from 80H-FFH Address location (and 128 bytes) is SFR unit, and 128 SFR are at most stored in internal data store area.And 8051 single-chip microcontrollers In available 21 SFR be discontinuously to be distributed in the SFR unit of 128 bytes, for the SFR in other vacant addresses User cannot be written and read.

The application proposes as shown in Figure 1 to extend the hollow remaining address of the SFR unit in existing 8051 single-chip microcontroller A kind of SoC system comprising: micro-control unit MCU and on-site programmable gate array FPGA, wherein micro-control unit MCU packet SFR unit is included, the MCU is connected with FPGA.

Field programmable gate array FPGA is patrolled in programmable logic array, Universal Array Logic, complex programmable Collect the product further developed on the basis of the programming devices such as device.It is as one in application-specific integrated circuit ASIC field It plants semi-custom circuit and occurs, not only solved the deficiency of custom circuit, but also overcome original programming device gate circuit number to have The shortcomings that limit.FPGA has regular internal logic array and interconnection resources abundant, and programmability and height, can around the general character Very flexibly and easily user is helped to distribute peripheral hardware pin, farthest adapts to the different application scenarios of different user.

SFR unit is working method, condition, the state for controlling, selecting, manage, storing each section inside single-chip microcontroller With the register cell of result.For SFR in SFR unit, different SFR manages different hardware modules, is responsible for difference Function.

The hollow leeway location of SFR unit is mapped to by increasing FPGA using the programmable principle of FPGA by the application In FPGA, a new available SFR is constituted.Wherein this new SFR is the vacant address mapped by SFR unit and FPGA structure At.The vacant address can carry out read/write operation in SFR unit in this way.

Thus the number and function for extending SFR in MCU system realize SoC system according to practical application request to expand SFR is opened up, while keeping the programming of SoC system and control function stronger, more flexible.

Fig. 2 is the schematic diagram that MCU provided by the embodiments of the present application carries out read/write operation.As shown in Fig. 2, in the application SoC In system, MCU is carried out in the detailed process of write operation:

Firstly, vacant address can be used according in SFR unit when MCU will carry out data storage, for the data that will be stored Storage address is configured, the address information of the data of storage is then sent to by FPGA by address bus, while MCU passes through data Bus sends the data to FPGA.

Then, after the data that FPGA receives address information and MCU is sent, the data that MCU is sent are stored into FPGA In the new SFR that corresponding mapping address is constituted.

Finally, sending ACK information to MCU, to inform that write operation is completed after to FPGA storage.

Wherein, ACK information includes the address information that data are stored in FPGA, to be read out for MCU.

In the application SoC system, MCU is carried out in the detailed process of read operation:

Firstly, being stored in the address information in FPGA when MCU will be read out data according to data in ACK, passing through address Bus sends the address information of data/program to FPGA, while sending reading instruction to FPGA.

It then,, will be corresponding in FPGA according to address information after FPGA receives the address information of data and reads instruction The data that MCU to be read are stored in the new SFR that mapping address is constituted, and MCU is sent to by data/address bus.

Finally, sending ACK information to MCU, to inform that read operation is completed after reading to FPGA.

Wherein, ACK information includes the ground for the new SFR that corresponding mapping address is constituted in the FPGA of corresponding storing data Location is blank, can be used for the storage of data.

The application constitutes a new available SFR by increasing FPGA in FPGA, and MCU can pass through new SFR pairs Additional data are stored and are read, and to realize execution additional functionality, keep the programming of SoC system and control function stronger, more Flexibly.

Those of ordinary skill in the art will appreciate that realizing that all or part of the steps of above-described embodiment can pass through hardware It completes, relevant hardware can also be instructed to complete by program, the program can store in a kind of computer-readable In storage medium, storage medium mentioned above can be read-only memory, disk or CD etc..

Above-described specific embodiment has carried out further the purpose of the present invention, technical scheme and beneficial effects It is described in detail, it should be understood that being not intended to limit the present invention the foregoing is merely a specific embodiment of the invention Protection scope, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should all include Within protection scope of the present invention.

Claims

1. a kind of SoC system characterized by comprising

On-site programmable gate array FPGA,

Micro-control unit MCU, the MCU include: special function register SFR unit；

The MCU is connect with the FPGA, for by the vacant address of cache in the SFR unit into the FPGA, in institute It states and expands SFR in FPGA.

2. SoC system according to claim 1, which is characterized in that the MCU is connected by dedicated bus with the SFR, The MCU carries out write operation to the SFR.

3. SoC system according to claim 1, which is characterized in that the MCU is connected by dedicated bus with the SFR, The MCU carries out read operation to the SFR.

4. SoC system according to claim 2 or 3, which is characterized in that the dedicated bus includes address bus and data Bus, the address bus are used to the address information of the MCU data for being stored or being read being sent to the SFR, institute Data/address bus is stated for the data stored in the MCU to be sent to the SFR or are sent to the data read in the SFR The MCU.