CN109524304B - Method for processing silicon carbide gate dielectric fluorine plasma and silicon carbide power device - Google Patents

Method for processing silicon carbide gate dielectric fluorine plasma and silicon carbide power device Download PDF

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CN109524304B
CN109524304B CN201811392399.7A CN201811392399A CN109524304B CN 109524304 B CN109524304 B CN 109524304B CN 201811392399 A CN201811392399 A CN 201811392399A CN 109524304 B CN109524304 B CN 109524304B
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silicon carbide
oxidation
gate dielectric
fluorine
fluorine plasma
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CN109524304A (en
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刘佳佳
樊帆
高渊
毕胜赢
崔玉兴
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Beijing union peoples Semiconductor Technology Co., Ltd.
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Beijing Guolian Wanzhong Semiconductor Technology Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3247Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering for altering the shape, e.g. smoothing the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42364Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

The invention provides a method for treating a silicon carbide gate dielectric fluorine plasma and a silicon carbide power device, which comprises the following steps of cleaning a wafer; performing electron cyclotron resonance-fluorine plasma treatment on the surface of the cleaned wafer; putting the mixture into an oxidation furnace for oxidation. According to the method for treating the fluorine-containing plasma of the silicon carbide gate dielectric, the fluorine-containing plasma is treated before the silicon carbide is subjected to dry oxygen oxidation, and the treated silicon carbide can be oxidized in low-temperature oxidation equipment, so that toxic gas in the traditional annealing process is avoided, specific high-temperature oxidation annealing equipment is avoided, the reliability of the gate dielectric is ensured, the process and equipment cost is reduced, and the thermal budget of the process is also reduced.

Description

Method for processing silicon carbide gate dielectric fluorine plasma and silicon carbide power device
Technical Field
The invention belongs to the technical field of semiconductor devices, and particularly relates to a method for processing a silicon carbide gate dielectric fluorine plasma and a silicon carbide power device.
Background
The third generation semiconductor material represented by silicon carbide (SiC) has the superior performances of large forbidden band width, high critical field intensity, high thermal conductivity and the like, and is one of ideal materials for preparing high-voltage, high-power and anti-radiation devices. Capable of directly growing SiO by thermal oxidation2The development of SiC MOSFET devices (Metal-Oxide-Semiconductor Field-Effect Transistor, Metal-Oxide-Semiconductor Field-Effect Transistor for short) is accelerated by the advantages of the medium, but SiO obtained by pure dry oxygen oxidation is adopted2Poor interface quality of gate dielectric, SiC/SiO2The problems of low carrier mobility of a device channel, large grid leakage, poor device reliability and the like caused by high interface state density restrict the SiC MOSThe development of FET devices. How to prepare high-quality SiC gate dielectrics is one of the current research hotspots.
In order to improve SiC/SiO2The main research on the quality of the interface, the reduction of the density of the interface state and the improvement of the reliability of the gate dielectric is focused on the annealing process at present, including NO or N2O gas annealing, POCl3Gas annealing, Cl2Annealing, and the like. Wherein nitrogen or phosphorus can react with SiC/SiO2Dangling bonds or carbon cluster bonds at the interface to passivate SiC/SiO2An interface state at the interface. The gas adopted by the traditional annealing process is mostly toxic gas, and the traditional annealing process needs to be carried out in a specific oxidation furnace, the oxidation temperature is as high as 1300 ℃ or above, and the preparation cost and difficulty of the process are increased.
Disclosure of Invention
The invention aims to provide a method for treating a silicon carbide gate dielectric fluorine plasma, which can avoid the problems of toxic gas, high-temperature process and the like.
In order to achieve the purpose, the invention adopts the technical scheme that: the method for treating the silicon carbide gate dielectric fluorine plasma comprises the following steps:
cleaning the wafer;
performing electron cyclotron resonance-fluorine plasma treatment on the surface of the cleaned wafer;
putting the mixture into an oxidation furnace for oxidation, wherein the oxidation temperature is not more than 1200 ℃.
Further, the performing electron cyclotron resonance-fluorine plasma treatment on the cleaned wafer surface comprises:
the treatment time is 8min-10min, the fluorine-containing gas flow is 50ml/min-70ml/min, the treatment temperature is 400-600 ℃, and the vacuum degree of the cavity is 10-4Pa, microwave power of 500W-700W.
Further, the treatment time is 9min-10min, the fluorine-containing gas flow is 55ml/min-65ml/min, the treatment temperature is 450 ℃ -550 ℃, and the vacuum degree of the cavity is 10-4Pa, microwave power of 550W-650W.
Further, the treatment time is 9min, the fluorine-containing gas flow is 60ml/min, the treatment temperature is 500 ℃, and the vacuum degree of the cavity isIs 10-4Pa, microwave power of 600W.
Further, the oxidation in an oxidation furnace comprises:
the oxidation temperature is not more than 1200 ℃, and the oxidation time is 100min-150 min.
Further, the oxidation temperature is not more than 1100 ℃, and the oxidation time is 110min-130 min.
Further, the oxidation temperature is 1000 ℃, and the oxidation time is 120 min.
Further, the wafer comprises silicon carbide N from bottom to top+Substrate and silicon carbide N-An epitaxial layer.
Further, the wafer is cleaned by an RCA cleaning method, and the RCA cleaning method mainly comprises the following steps:
firstly, carrying out acid oxidation cleaning by using acid hydrogen peroxide containing sulfuric acid;
then alkaline oxidation cleaning is carried out by alkalescent hydrogen peroxide containing amine;
then cleaning with dilute hydrofluoric acid solution;
finally, acid oxidation cleaning is carried out by using acid hydrogen peroxide containing hydrochloric acid;
rinsing with ultrapure water in the middle of each cleaning, and finally drying with a low-boiling-point organic solvent.
The method for treating the silicon carbide gate dielectric fluorine plasma has the beneficial effects that: compared with the prior art, the method for treating the silicon carbide gate dielectric fluorine plasma carries out fluorine-containing plasma treatment before silicon carbide is subjected to dry oxygen oxidation, the treated silicon carbide can realize silicon carbide oxidation in low-temperature oxidation equipment, toxic gas and high-temperature process are effectively avoided, and SiC/SiO does not have high-temperature process2The surface dielectric has better appearance, the grid leakage current is lower, the process cost is greatly reduced, and the reliability of the grid dielectric is improved.
It is another object of the present invention to provide a silicon carbide power device comprising silicon carbide N+Substrate, silicon carbide N-An epitaxial layer and a silicon dioxide layer. The device is prepared by the methodThe gate dielectric has better appearance, lower gate leakage current and reliable work.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed for the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a wafer used in the processing method according to an embodiment of the present invention;
FIG. 2 is a schematic view of a process for treating the surface of a silicon carbide wafer with fluorine-containing plasma;
FIG. 3 shows the oxidation growth of SiO by silicon carbide2Schematic medium process diagram.
Wherein, in the figure:
1-silicon carbide N+A substrate; 2-silicon carbide N-An epitaxial layer; 3-silicon dioxide layer.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1 to 3, a method for forming a silicon carbide gate dielectric fluorine plasma according to the present invention will now be described. The treatment method of the silicon carbide gate dielectric fluorine plasma comprises the following steps:
step 1: cleaning the wafer;
step 2: performing electron cyclotron resonance-fluorine plasma treatment, namely electron cyclotron resonance-plasma enhanced metal organic chemical vapor deposition (ECR-pemvd), on the surface of the cleaned wafer, see fig. 2;
and step 3: and putting the silicon dioxide layer into an oxidation furnace for oxidation, wherein the oxidation temperature does not exceed 1200 ℃, and forming the silicon dioxide layer 3 as a protective layer, which is shown in figure 3.
Compared with the prior art, the method for treating the silicon carbide gate dielectric fluorine plasma adopts a fluorine-containing plasma treatment technology, the fluorine-containing plasma treatment is carried out before the dry oxygen oxidation of SiC, the treated SiC can be oxidized in common oxidation equipment, the oxidation temperature does not exceed 1200 ℃, toxic gas and high-temperature process are effectively avoided, and the SiC/SiO medium fluorine plasma treatment method has no high-temperature process2The surface dielectric appearance is better, the grid leakage current is lower, and the reliability of the grid dielectric is improved.
Therefore, the invention provides a method for processing a low-temperature SiC gate dielectric, which comprises the steps of carrying out fluorine-containing plasma processing before carrying out dry oxygen oxidation on SiC, and carrying out SiC oxidation on the processed SiC in low-temperature oxidation equipment. The method is mainly used for manufacturing a gate dielectric of the SiC MOSFET device, the SiC MOSFET device and similar devices in the field of microelectronics.
The invention has the advantages that: fluorine can be mixed with SiC/SiO by a fluorine-containing plasma treatment instead of an annealing process with toxic gases2The interface state of the interface is combined, so that the effect of reducing the density of the interface state is achieved. In addition, the SiC surface treated by the fluorine-containing gas can be oxidized in a conventional oxidation furnace, so that a high-temperature oxidation process is avoided, and the production cost is greatly reduced.
Referring to fig. 2, as an embodiment of the method for processing a silicon carbide gate dielectric fluorine plasma provided by the present invention, the performing an electron cyclotron resonance-fluorine plasma process on the surface of the cleaned wafer includes: the treatment time is 8min-10min, the fluorine-containing gas flow is 50ml/min-70ml/min, the treatment temperature is 400-600 ℃, and the vacuum degree of the cavity is 10-4Pa, microwave power of 500W-700W.
Optionally, the treatment time is 9min to 10min, the fluorine-containing gas flow is 55ml/min to 65ml/min, the treatment temperature is 450 ℃ to 550 ℃, and the vacuum degree of the cavity is 10-4Pa, microwaveThe power is 550W-650W.
Optionally, the treatment time is 9min, the fluorine-containing gas flow is 60ml/min, the treatment temperature is 500 ℃, and the vacuum degree of the cavity is 10-4Pa, microwave power of 600W.
Referring to fig. 3, as a specific embodiment of the method for processing a silicon carbide gate dielectric fluorine plasma according to the present invention, the silicon carbide gate dielectric fluorine plasma is placed in an oxidation furnace to perform an oxidation process, wherein an oxidation temperature does not exceed 1200 ℃, and an oxidation time is 100min to 150 min.
Optionally, the oxidation temperature is not more than 1100 ℃, and the oxidation time is 110min-130 min.
Optionally, the oxidation temperature is 1000 ℃ and the oxidation time is 120 min.
Referring to fig. 1, as an embodiment of the method for processing a silicon carbide gate dielectric fluorine plasma provided by the present invention, a wafer comprises silicon carbide N from bottom to top+Substrate 1 and silicon carbide N-An epitaxial layer 2.
Referring to fig. 1, as a specific embodiment of the method for processing a silicon carbide gate dielectric fluorine plasma provided by the present invention, an RCA cleaning method is adopted to clean a wafer, and the RCA cleaning method mainly includes:
firstly, carrying out acid oxidation cleaning by using acid hydrogen peroxide containing sulfuric acid;
then alkaline oxidation cleaning is carried out by alkalescent hydrogen peroxide containing amine;
then cleaning with dilute hydrofluoric acid solution;
finally, acid oxidation cleaning is carried out by using acid hydrogen peroxide containing hydrochloric acid;
rinsing with ultrapure water in the middle of each cleaning, and finally drying with a low-boiling-point organic solvent.
The method comprises standard RCA cleaning on silicon carbide epitaxial material, performing fluorine-containing plasma treatment on the surface of the SiC epitaxial material, and oxidizing in an oxidation furnace to grow SiO2A medium.
The invention provides a specific implementation mode of a method for treating a silicon carbide gate dielectric fluorine plasma, which comprises the following steps of:
step 1: subjecting the wafer to standard RCA cleaning, wherein FIG. 1 is a schematic structural diagram of silicon carbide material, wherein 1 is silicon carbide N+Substrate, 2 is silicon carbide N-And (3) epitaxial material.
Step 2: placing the cleaned wafer on ECR fluorine plasma surface for treating for 8min-10min, wherein the fluorine-containing gas flow is 60ml/min, the treatment temperature is 500 deg.C, and the vacuum degree of the cavity is 10-4Pa, microwave power of 600W. FIG. 2 is a schematic structural diagram of a SiC material after fluorine plasma treatment.
And step 3: placing the wafer treated by the fluorine-containing plasma into an oxidation furnace for oxidation treatment at an oxidation temperature of not more than 1200 ℃ for 120min, wherein FIG. 3 is a structural schematic diagram of a silicon carbide material after oxidation, and 3 is SiO grown by oxidation2A medium.
The silicon wafer cleaning process adopts an RCA method which is a standard cleaning method of the silicon wafer in the semiconductor industry, and is not described herein again.
Referring to fig. 3, the present invention also provides a silicon carbide power device, which is prepared by the method and comprises silicon carbide N+Substrate 1, silicon carbide N-The epitaxial layer 2 and the silicon dioxide layer 3 have good appearance, the grid leakage current is low, and the work of the grid medium is reliable.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.

Claims (9)

1. The method for treating the silicon carbide gate dielectric fluorine plasma is characterized by comprising the following steps of:
cleaning the wafer;
performing electron cyclotron resonance-fluorine plasma treatment on the surface of the cleaned wafer;
putting the mixture into an oxidation furnace for oxidation, wherein the oxidation temperature is not more than 1200 ℃;
the electron cyclotron resonance-fluorine plasma treatment on the surface of the cleaned wafer comprises the following steps:
the treatment time is 8min-10min, the fluorine-containing gas flow is 50ml/min-70ml/min, the treatment temperature is 400-600 ℃, and the vacuum degree of the cavity is 10-4Pa, microwave power of 500W-700W.
2. The silicon carbide gate dielectric fluorine plasma processing method of claim 1, wherein the processing time is 9min to 10min, the fluorine-containing gas flow is 55ml/min to 65ml/min, the processing temperature is 450 ℃ to 550 ℃, and the vacuum degree of the cavity is 10-4Pa, microwave power of 550W-650W.
3. The silicon carbide gate dielectric fluorine plasma processing method of claim 2, wherein the processing time is 9min, the fluorine-containing gas flow rate is 60ml/min, the processing temperature is 500 ℃, and the cavity vacuum degree is 10-4Pa, microwave power of 600W.
4. The silicon carbide gate dielectric fluorine plasma treatment method of claim 1 wherein said oxidizing in an oxidation furnace comprises:
the oxidation temperature is not more than 1200 ℃, and the oxidation time is 100min-150 min.
5. The silicon carbide gate dielectric fluorine plasma processing method of claim 4, wherein the oxidation temperature is not more than 1100 ℃ and the oxidation time is 110min to 130 min.
6. The silicon carbide gate dielectric fluorine plasma treatment method according to claim 5, wherein the oxidation temperature is 1000 ℃ and the oxidation time is 120 min.
7. The silicon carbide gate dielectric fluorine plasma processing method of claim 1 wherein the wafer comprises silicon carbide N from bottom to top+Substrate and silicon carbide N-An epitaxial layer.
8. The silicon carbide gate dielectric fluorine plasma processing method as claimed in claim 1, wherein the wafer is cleaned by an RCA cleaning method, and the RCA cleaning method mainly comprises:
firstly, carrying out acid oxidation cleaning by using acid hydrogen peroxide containing sulfuric acid;
then alkaline oxidation cleaning is carried out by alkalescent hydrogen peroxide containing amine;
then cleaning with dilute hydrofluoric acid solution;
finally, acid oxidation cleaning is carried out by using acid hydrogen peroxide containing hydrochloric acid;
rinsing with ultrapure water in the middle of each cleaning, and finally drying with a low-boiling-point organic solvent.
9. Silicon carbide power device, produced by a method according to any of claims 1 to 8, comprising silicon carbide N+Substrate, silicon carbide N-An epitaxial layer and a silicon dioxide layer.
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CN112820639B (en) * 2021-01-02 2024-05-31 大连理工大学 Improved silicon carbide MOSFET device preparation process

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US4865685A (en) * 1987-11-03 1989-09-12 North Carolina State University Dry etching of silicon carbide
TW473857B (en) * 1996-04-26 2002-01-21 Hitachi Ltd Method of manufacturing semiconductor device
CN1429400A (en) * 2000-04-11 2003-07-09 克里公司 Method for forming vias in silicon carbide and resulting devices and circuit
CN101109077A (en) * 2007-08-21 2008-01-23 西安电子科技大学 Method of plasma chemistry vapor depositing fluoridation amorphous carbon membrane and membrane layer structure thereof
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