CN109243973A - A kind of method of etching silicon carbide - Google Patents

A kind of method of etching silicon carbide Download PDF

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Publication number
CN109243973A
CN109243973A CN201811288752.7A CN201811288752A CN109243973A CN 109243973 A CN109243973 A CN 109243973A CN 201811288752 A CN201811288752 A CN 201811288752A CN 109243973 A CN109243973 A CN 109243973A
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China
Prior art keywords
sic
sio
epitaxial wafer
passed
sic epitaxial
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Inventor
邵锦文
侯同晓
孙致祥
贾仁需
元磊
张秋洁
刘学松
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Qinhuangdao Jinghe Science And Technology Research Institute Co Ltd
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Qinhuangdao Jinghe Science And Technology Research Institute Co Ltd
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Priority to CN201811288752.7A priority Critical patent/CN109243973A/en
Publication of CN109243973A publication Critical patent/CN109243973A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/0475Changing the shape of the semiconductor body, e.g. forming recesses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66053Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/66068Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

The present invention relates to a kind of methods of etching silicon carbide, and the method includes the steps 1: cleaning SiC epitaxial wafer;Step 2: growing SiO on the SiC epitaxial wafer2Mask layer;Step 3: the SiC epitaxial wafer being put into SiC etching machine and is performed etching, SiC grid slot is obtained;Step 4: being passed through chlorine and oxidizing gas and anneal to the SiC grid slot;Step 5: removing the SiO2Mask layer.A kind of method that the present invention proposes mixed gas annealing SiC grid slot formed using chlorine and oxidizing gas.This method can use Cl under 1000 DEG C of cryogenic conditions below2It is chemically reacted with surface of SiC, by Cl2After oxidizing gas annealing SiC grid slot, SiC grid rooved face roughness can be reduced to 0.5nm hereinafter, to greatly improve SiC UMOS device channel mobility and breakdown electric field.

Description

A kind of method of etching silicon carbide
Technical field
The invention belongs to silicon carbide device manufacturing technology fields, and in particular to a kind of method of etching silicon carbide.
Background technique
Silicone carbide metal oxide semiconductor field effect transistor (MOSFET) is a kind of widely used silicon carbide power Device.Gate electrode is wherein supplied control signals to, which is separated semiconductor surface by the insulator being inserted into, and is insulated Body such as silica.Electric current conduction is carried out by the transmission of majority carrier, without making when bipolar junction transistor works Use Minority carrier injection.Silicon carbide MOSFET is capable of providing very big safety operation area, and multiple cellular constructions can It is parallel to use.
Existing, the method for the groove etched mainstream of silicon carbide trench metal oxide semiconductor device gate is induction coupling Plasma etching is closed, however this dry etching can damage groove side wall and bottom, lead to rough surface and very low power The defects of appearance, meanwhile, etching process can leave the etch residues such as fluorine carbon by etching surface again.Therefore the groove-shaped gold of silicon carbide Belong to oxide semiconductor element causes channel mobility lower, has biggish conducting resistance, and energy loss is big.
Therefore, how to reduce silicon carbide etching injury is those skilled in the art's technical problem urgently to be solved.
Summary of the invention
In order to solve the above-mentioned problems in the prior art, the present invention provides a kind of methods of etching silicon carbide.Tool Body technique scheme is as follows:
The embodiment of the invention provides a kind of methods of etching silicon carbide, the described method comprises the following steps:
Step 1: cleaning SiC epitaxial wafer;
Step 2: growing SiO on the SiC epitaxial wafer2Mask layer;
Step 3: the SiC epitaxial wafer being put into SiC etching machine and is performed etching, SiC grid slot is obtained;
Step 4: being passed through chlorine and oxidizing gas and anneal to the SiC grid slot;
Step 5: removing the SiO2Mask layer.
In one embodiment of the invention, the temperature range of the annealing is 800-900 DEG C.
In one embodiment of the invention, the step 2 specifically:
2~4 μm of SiO is deposited on the SiC epitaxial wafer2Exposure mask;
In the SiO2Coating photoresist on exposure mask, and litho pattern is formed by photoetching, development;
To the SiO2Exposure mask performs etching, and forms mask layer;
Remove the photoresist.
In one embodiment of the invention, the step 3 includes:
SF is passed through into the etching machine6/O2It is groove etched to carry out grid.
In one embodiment of the invention, the step 3 includes:
CF is passed through into the etching machine4/O2It is groove etched to carry out grid.
In one embodiment of the invention, the oxidizing gas includes oxygen, nitric oxide or nitrogen dioxide.
In one embodiment of the invention, the step 4 specifically:
The rate for being passed through the chlorine is 2~20sccm;
The rate for being passed through the oxidizing gas is 10~50sccm.
In one embodiment of the invention, the step 4 further include:
It is passed through carrier gas, the rate of the carrier gas is 20~100sccm.
In one embodiment of the invention, the carrier gas is argon gas.
In one embodiment of the invention, the step 5 includes: using 1~10min of HF acid soak SiC epitaxial wafer.
Compared with prior art, beneficial effects of the present invention:
The present invention proposes a kind of using Cl2With oxidizing gas (O2, NO or N2O the side of mixed gas annealing SiC grid slot) Method.This method can use Cl under 1000 DEG C of cryogenic conditions below2It is chemically reacted with surface of SiC, by Cl2And oxygen After the property changed gas annealing SiC grid slot, SiC grid rooved face roughness can be reduced to 0.5nm hereinafter, to greatly improve SiC UMOS device channel mobility and breakdown electric field.
Detailed description of the invention
Fig. 1 a is the schematic diagram of SiC epitaxial wafer;
Fig. 1 b is to form SiO2The schematic diagram of mask layer;
Fig. 1 c is the schematic diagram to form SiC grid slot;
Fig. 1 d is the schematic diagram for removing the SiC grid slot after exposure mask.
Specific embodiment
Further detailed description is done to the present invention combined with specific embodiments below, but embodiments of the present invention are not limited to This.
Embodiment one
1) SiC epitaxial wafer is cleaned;
As shown in Figure 1a, SiC epitaxial wafer includes SiC substrate and the N-type grown on sic substrates or p-type SiC epitaxial layer, Be using RCA standard cleaning method (wet chemical cleans method) purpose in order to remove SiC epitaxial wafer surface organic matter that may be present, The pollutants such as particle and metal impurities.The presence of these pollutants will affect the electrology characteristic of SiC device.
2) SiO is grown on SiC epitaxial wafer2Mask layer, as shown in Figure 1 b, SiO2Protection of the mask layer as non-etched area Layer.Specifically,
4 μm of SiO is deposited on SiC epitaxial wafer2Exposure mask, in SiO2Coating photoresist on exposure mask, photoresist simultaneously pass through light It carves, development forms litho pattern.The litho pattern corresponds to SiO2The non-etched area of exposure mask, then using photoresist as mask etching SiO2Exposure mask forms SiO2Mask layer.Then photoresist is removed.
2) growth there is into SiO2The SiC epitaxial wafer of mask layer is put into SiC etching machine, is passed through: the SF of 50sccm6With The O of 10sccm2Mixed gas carry out grid groove etched 5 minutes, the silicon carbide after etching is as illustrated in figure 1 c.
3) chlorine and oxidizing gas are passed through to anneal to the SiC grid slot, the SiC epitaxial wafer for forming SiC grid slot is put into In quartz ampoule, it is heated to 800 DEG C of annealing temperature, then passes to the chlorine of 2sccm, the oxygen of 10sccm and 20sccm argon gas, It is kept for 10 minutes, then stops being passed through chlorine, be continually fed into 30sccm oxygen, kept for 20 minutes.
Cl under 1000 DEG C of cryogenic conditions below2It can be chemically reacted with the surface of SiC of damage, generate SiCl4And C Layer.SiCl4Surface of SiC is left in gaseous form.The C layers of dioxygen oxidation being then passed into are at CO or CO2, leave surface of SiC.It is logical The oxygen that enters while also SiO can be formd in grid rooved face and bottom2.By Cl2After oxygen annealing SiC grid slot, SiC grid slot Surface roughness can be reduced to 0.5nm hereinafter, to greatly improve SiC UMOS device channel mobility and breakdown electric field.
4) SiO is removed2Mask layer: HF acid soak SiC epitaxial wafer 10min is used.This process can also will be in annealing process In the SiO that is formed in grid slot2It is removed, the schematic diagram for silicon carbide products that treated is as shown in Figure 1 d.
Embodiment 2
1) SiC epitaxial wafer is cleaned;
2) SiO is grown on SiC epitaxial wafer2Mask layer, SiO2Protective layer of the mask layer as non-etched area.Specifically,
2 μm of SiO is deposited on SiC epitaxial wafer2Exposure mask, in SiO2Coating photoresist on exposure mask, photoresist simultaneously pass through light It carves, development forms litho pattern.The litho pattern corresponds to SiO2The non-etched area of exposure mask, then using photoresist as mask etching SiO2Exposure mask forms SiO2Mask layer.Then photoresist is removed.
2) growth there is into SiO2The SiC epitaxial wafer of mask layer is put into SiC etching machine, is passed through: the SF of 60sccm6With The O of 15sccm2Mixed gas carry out grid groove etched 3 minutes.
3) chlorine and oxidizing gas are passed through to anneal to the SiC grid slot, the SiC epitaxial wafer for forming SiC grid slot is put into In quartz ampoule, it is heated to 900 DEG C of annealing temperature, then passes to the chlorine of 20sccm, the oxygen of 50sccm and 100sccm argon Gas is kept for 7 minutes, is then stopped being passed through chlorine, is continually fed into 30sccm oxygen, is kept for 20 minutes.
4) SiO is removed2Mask layer: HF acid soak SiC epitaxial wafer 2min is used.This process can also will be in annealing process The SiO formed in grid slot2It is removed.
Embodiment three
1) SiC epitaxial wafer is cleaned;
2) SiO is grown on SiC epitaxial wafer2Mask layer, SiO2Protective layer of the film layer as non-etched area.Specifically,
3 μm of SiO is deposited on SiC epitaxial wafer2Exposure mask, in SiO2Coating photoresist on exposure mask, photoresist simultaneously pass through light It carves, development forms litho pattern.The litho pattern corresponds to SiO2The non-etched area of exposure mask, then using photoresist as mask etching SiO2Exposure mask forms SiO2Mask layer.Then photoresist is removed.
2) growth there is into SiO2The SiC epitaxial wafer of mask layer is put into SiC etching machine, is passed through: the SF of 60sccm6With The O of 15sccm2Mixed gas carry out grid groove etched 3 minutes.
3) chlorine and oxidizing gas are passed through to anneal to the SiC grid slot, the SiC epitaxial wafer for forming SiC grid slot is put into In quartz ampoule, it is heated to 900 DEG C of annealing temperature, then passes to the chlorine of 20sccm, the nitric oxide of 50sccm and 20sccm Argon gas is kept for 7 minutes, is then stopped being passed through chlorine, is continually fed into 30sccm argon gas, is kept for 20 minutes.
4) SiO is removed2Mask layer: HF acid soak SiC epitaxial wafer 10min is used.This process can also will be in annealing process In the SiO that is formed in grid slot2It is removed.
Example IV
1) SiC epitaxial wafer is cleaned;
2) SiO is grown on SiC epitaxial wafer2Mask layer, SiO2Protective layer of the mask layer as non-etched area.Specifically,
4 μm of SiO is deposited on SiC epitaxial wafer2Exposure mask, in SiO2Coating photoresist on exposure mask, photoresist simultaneously pass through light It carves, development forms litho pattern.The litho pattern corresponds to SiO2The non-etched area of exposure mask, then using photoresist as mask etching SiO2Exposure mask forms SiO2Mask layer.Then photoresist is removed.
2) growth there is into SiO2The SiC epitaxial wafer of mask layer is put into SiC etching machine, is passed through: the CF of 50sccm4With The O of 10sccm2Mixed gas carry out grid groove etched 5 minutes.
3) chlorine and oxidizing gas are passed through to anneal to the SiC grid slot, the SiC epitaxial wafer for forming SiC grid slot is put into In quartz ampoule, it is heated to 850 DEG C of annealing temperature, then passes to the chlorine of 12sccm, the nitric oxide of 2sccm and 80sccm argon Gas is kept for 8 minutes, is then stopped being passed through chlorine, is continually fed into 30sccm nitric oxide, is kept for 20 minutes.
4) SiO is removed2Mask layer: HF acid soak SiC epitaxial wafer 8min is used.This process can also will be in annealing process The SiO formed in grid slot2It is removed.
Embodiment five
1) SiC epitaxial wafer is cleaned;
2) SiO is grown on SiC epitaxial wafer2Mask layer, SiO2Protective layer of the mask layer as non-etched area.Specifically,
2 μm of SiO is deposited on SiC epitaxial wafer2Exposure mask, in SiO2Coating photoresist on exposure mask, photoresist simultaneously pass through light It carves, development forms litho pattern.The litho pattern corresponds to SiO2The non-etched area of exposure mask, then using photoresist as mask etching SiO2Exposure mask forms SiO2Mask layer.Then photoresist is removed.
2) growth there is into SiO2The SiC epitaxial wafer of mask layer is put into SiC etching machine, is passed through: the CF of 60sccm4With The O of 15sccm2Mixed gas carry out grid groove etched 4 minutes.
3) chlorine and oxidizing gas are passed through to anneal to the SiC grid slot, the SiC epitaxial wafer for forming SiC grid slot is put into In quartz ampoule, it is heated to 700 DEG C of annealing temperature, then passes to the chlorine of 20sccm, the nitrogen dioxide of 50sccm and 80sccm Argon gas is kept for 7 minutes, is then stopped being passed through chlorine, is continually fed into 30sccm argon gas, is kept for 20 minutes.
4) SiO is removed2Mask layer: HF acid soak SiC epitaxial wafer 10min is used.This process can also will be in annealing process In the SiO that is formed in grid slot2It is removed.
Embodiment six
1) SiC epitaxial wafer is cleaned;
2) SiO is grown on SiC epitaxial wafer2Mask layer, SiO2Protective layer of the mask layer as non-etched area.Specifically,
3 μm of SiO is deposited on SiC epitaxial wafer2Exposure mask, in SiO2Coating photoresist on exposure mask, photoresist simultaneously pass through light It carves, development forms litho pattern.The litho pattern corresponds to SiO2The non-etched area of exposure mask, then using photoresist as mask etching SiO2Exposure mask forms SiO2Mask layer.Then photoresist is removed.
2) growth there is into SiO2The SiC epitaxial wafer of mask layer is put into SiC etching machine, is passed through: the CF of 55sccm4With The O of 12sccm2Mixed gas carry out grid groove etched 5 minutes.
3) chlorine and oxidizing gas are passed through to anneal to the SiC grid slot, the SiC epitaxial wafer for forming SiC grid slot is put into In quartz ampoule, it is heated to 750 DEG C of annealing temperature, then passes to the chlorine of 10sccm, the nitrogen dioxide of 2sccm and 100sccm Argon gas is kept for 10 minutes, is then stopped being passed through chlorine, is continually fed into the nitrogen dioxide of 30sccm, is kept for 20 minutes.
4) SiO is removed2Mask layer: HF acid soak SiC epitaxial wafer 8min is used.This process can also will be in annealing process The SiO formed in grid slot2It is removed.
Finally, it should be noted that the above embodiments are merely illustrative of the technical solutions of the present invention, rather than its limitations;Although Present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that: it still may be used To modify the technical solutions described in the foregoing embodiments or equivalent replacement of some of the technical features; And these are modified or replaceed, technical solution of various embodiments of the present invention that it does not separate the essence of the corresponding technical solution spirit and Range.

Claims (10)

1. a kind of method of etching silicon carbide, which is characterized in that the described method comprises the following steps:
Step 1: cleaning SiC epitaxial wafer;
Step 2: growing SiO on the SiC epitaxial wafer2Mask layer;
Step 3: the SiC epitaxial wafer being put into SiC etching machine and is performed etching, SiC grid slot is obtained;
Step 4: being passed through chlorine and oxidizing gas and anneal to the SiC grid slot;
Step 5: removing the SiO2Mask layer.
2. the method according to claim 1, wherein the temperature range of the annealing is 700-900 DEG C.
3. according to the method described in claim 2, it is characterized in that, the step 2 specifically:
2~4 μm of SiO is deposited on the SiC epitaxial wafer2Exposure mask;
In the SiO2Coating photoresist on exposure mask, and litho pattern is formed by photoetching, development;
To the SiO2Exposure mask performs etching, and forms SiO2Mask layer;
Remove the photoresist.
4. according to the method described in claim 3, it is characterized in that, the step 3 includes:
SF is passed through into the etching machine6/O2It is groove etched to carry out grid.
5. according to the method described in claim 3, it is characterized in that, the step 3 includes:
CF is passed through into the etching machine4/O2It is groove etched to carry out grid.
6. according to the method described in claim 2, it is characterized in that, the oxidizing gas includes oxygen, nitric oxide or two Nitrogen oxide.
7. according to the method described in claim 2, it is characterized in that, the step 4 specifically:
The rate for being passed through the chlorine is 2~20sccm;
The rate for being passed through the oxidizing gas is 10~50sccm.
8. the method according to the description of claim 7 is characterized in that the step 4 further include:
It is passed through carrier gas, the rate of the carrier gas is 20~100sccm.
9. according to the method described in claim 8, it is characterized in that, the carrier gas is argon gas.
10. the method according to claim 1, wherein the step 5 includes: using HF acid soak SiC epitaxial wafer 1~10min.
CN201811288752.7A 2018-10-31 2018-10-31 A kind of method of etching silicon carbide Pending CN109243973A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113410136A (en) * 2021-06-15 2021-09-17 西安微电子技术研究所 Silicon carbide groove etching method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105405749A (en) * 2015-11-02 2016-03-16 株洲南车时代电气股份有限公司 Method for etching silicon carbide

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105405749A (en) * 2015-11-02 2016-03-16 株洲南车时代电气股份有限公司 Method for etching silicon carbide

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113410136A (en) * 2021-06-15 2021-09-17 西安微电子技术研究所 Silicon carbide groove etching method

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Application publication date: 20190118