CN109509728A - Electronic package - Google Patents
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- Publication number
- CN109509728A CN109509728A CN201711062669.3A CN201711062669A CN109509728A CN 109509728 A CN109509728 A CN 109509728A CN 201711062669 A CN201711062669 A CN 201711062669A CN 109509728 A CN109509728 A CN 109509728A
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- Prior art keywords
- ground
- electronic
- packing piece
- piece according
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- 238000012856 packing Methods 0.000 claims description 41
- 238000009826 distribution Methods 0.000 claims description 8
- 230000005611 electricity Effects 0.000 claims 1
- 239000010410 layer Substances 0.000 description 24
- 239000004065 semiconductor Substances 0.000 description 19
- 235000012431 wafers Nutrition 0.000 description 14
- 239000000758 substrate Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 5
- 239000004642 Polyimide Substances 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 239000000084 colloidal system Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000000465 moulding Methods 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- XLTRGZZLGXNXGD-UHFFFAOYSA-N benzene;1h-pyrazole Chemical compound C=1C=NNC=1.C1=CC=CC=C1 XLTRGZZLGXNXGD-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000012792 core layer Substances 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000012774 insulation material Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920002577 polybenzoxazole Polymers 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/32—Holders for supporting the complete device in operation, i.e. detachable fixtures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4943—Connecting portions the connecting portions being staggered
- H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
An electronic package is provided, and a plurality of grounding areas with grounding contacts are defined on the surface of a bearing structure, so that an electronic element can be selectively and electrically connected with the grounding contact of at least one grounding area according to the functional specification of the electronic element, and the larger or smaller grounding potential required by the electronic element is met.
Description
Technical field
The present invention is in relation to a kind of encapsulation technology, espespecially a kind of electronic packing piece that can promote electrical functionality.
Background technique
With the evolution of semiconductor technology, semiconductor product has developed different encapsulating products kenels, and is to be promoted electrically
Quality, a variety of semiconductor products have shielded function, to prevent electromagnetic interference (Electromagnetic
Interference, abbreviation EMI) it generates.
As illustrated in figures 1A and ib, existing semiconductor package part 1 is that semiconductor wafer 11 is located to a package substrate 10
On, then with the cladding of packing colloid 12 semiconductor wafer 11, later in the packing colloid 12 and the side 10c of the package substrate 10
One metal screen layer 13 of upper formation, to be electrically connected the side 10c for exposing to the package substrate 10 by the metal screen layer 13
Grounding parts 102, then with external system be grounded, use protect the semiconductor wafer 11 from extraneous EMI influence and be damaged.
Existing package substrate 10 usually have multiple line layers 100, respectively between the line layer 100 by insulating layer mutually every
From, and in forming multiple conductive blind holes in the insulating layer to be electrically connected between the respectively line layer 100.Downside line layer 100
Also there are multiple plant ball pads 101 to be external to printed circuit board (figure omits) for the semiconductor package part 1, and upside line layer 100
It include an access area G and a signal region S, to enable the ground contact 103 of access area G be electrically connected connecing for the line layer 100
Ground portion 102 and the ground mat 110 that the semiconductor wafer 11 is electrically connected by multiple bonding wires 14, and enable the signal of signal region S
Contact 104 is electrically connected the signal pad 111 of the semiconductor wafer 11 by multiple bonding wires 14.
However, function needed for the semiconductor wafer 11 is more and more, so that this is partly led in existing semiconductor package part 1
Body chip 11 needs the more signals of transmitting/reception, therefore is increased via the signal pad 111 by the electric current of the semiconductor wafer 11, causes
Earthing potential needed for making the semiconductor wafer 11 increases therewith, causes the single access area G of the package substrate 10 that can not expire
The demand of the earthing potential of the foot semiconductor wafer 11.
Therefore, how to overcome above-mentioned problem of the prior art, have become the project for wanting to solve at present in fact.
Summary of the invention
In view of the missing of the above-mentioned prior art, the present invention provides a kind of electronic packing piece, to meet needed for the electronic component
Larger or smaller earthing potential.
Electronic packing piece of the invention includes: bearing structure, and definition has the first ground area and the second ground area,
In, which is equipped at least one first ground contact, and second ground area is equipped at least one second and connects
Point;And electronic component, it is set in the bearing structure and is electrically connected first and/or second ground contact, and the electronics
Element is located in first ground area, enable part first ground area be located at second ground area and the electronic component it
Between.
In electronic packing piece above-mentioned, the distribution area of first ground area is greater than or equal to second ground area
Distribution area.
In electronic packing piece above-mentioned, which is equipped with multiple first ground contacts and multiple this second connects
Point.
In electronic packing piece above-mentioned, which has weld pad, to be electrically connected the weldering by the first conducting element
Pad and first ground contact.For example, first conducting element is bonding wire.Further, which passes through second
Conducting element is electrically connected the second ground contact, for example, second conducting element is bonding wire.
In electronic packing piece above-mentioned, which is additionally provided with an at least signal contact, passes through third conduction
Element is electrically connected the signal contact and the electronic component.For example, the third conducting element is bonding wire.Further, the electronics
Element, which has, is for electrically connecting to the electronic pads of the third conducting element, and the electronic pads and the signal contact be arranged in it is same straight
On line.
In electronic packing piece above-mentioned, which, which has, is for electrically connecting to first and/or second ground contact
Weld pad, and the weld pad and first ground contact and second ground contact are arranged on same straight line.
It further include the encapsulated layer for being formed in the bearing structure and coating the electronic component in electronic packing piece above-mentioned.
In electronic packing piece above-mentioned, signal line is formed between first ground area and second ground area.
In electronic packing piece above-mentioned, which has weld pad, and the weld pad is electrically connected with the 4th conducting element
Second ground contact.
From the foregoing, it will be observed that electronic packing piece of the invention, mainly there are multiple ground areas (i.e. the by bearing structure definition
One ground area and the second ground area), so that the electronic component alternative is electrically connected this and first and/or second connects
Point, therefore compared to the prior art, when the electric current by having multi-functional electronic component increases, which can electrically be connected
First and second ground contact is connect, to meet the demand of the earthing potential of the electronic component.
Detailed description of the invention
Figure 1A is existing diagrammatic cross-section with a semiconductor package;
Figure 1B is the local upper schematic diagram of Figure 1A;
Fig. 2A is the diagrammatic cross-section of electronic packing piece of the invention;
Fig. 2 B and Fig. 2 C are the local upper schematic diagram of Fig. 2A;
Fig. 2 D is another diagrammatic cross-section of electronic packing piece of the invention;
Fig. 3 is the local upper schematic diagram of another embodiment of electronic packing piece of the invention;
Fig. 4 A is the diagrammatic cross-section of the another embodiment of electronic packing piece of the invention;And
Fig. 4 B is the local upper schematic diagram of Fig. 4 A.
Symbol description:
1 semiconductor package part
10 package substrates
The side 10c
100 line layers
101 plant ball pad
102 grounding parts
103 ground contacts
104,200b signal contact
11 semiconductor wafers
110 ground mats
111 signal pads
12 packing colloids
13 metal screen layers
14 bonding wires
2,3 electronic packing pieces
20 bearing structures
The surface 20a
200 routes
200a conductive trace
200c electrical property endpoint
201 first ground contacts
202 second ground contacts
21,51 first conducting elements
22 second conducting elements
23 third conducting elements
24 electronic components
240 weld pads
241 electronic pads
25 encapsulated layers
300 signal line
54 the 4th conducting elements
The first ground area A
The second ground area B
C, D dotted line
L, r, t length
The access area G
The signal region S.
Specific embodiment
Illustrate embodiments of the present invention below by way of particular specific embodiment, those skilled in the art can be by this explanation
The revealed content of book is understood other advantages and efficacy of the present invention easily.
It should be clear that this specification structure depicted in this specification institute accompanying drawings, ratio, size etc., only to cooperate specification to be taken off
The content shown is not intended to limit the invention enforceable qualifications for the understanding and reading of those skilled in the art, therefore
Do not have technical essential meaning, the modification of any structure, the change of proportionate relationship or the adjustment of size are not influencing the present invention
Under the effect of can be generated and the purpose that can reach, it should all still fall in disclosed technology contents and obtain the model that can cover
In enclosing.Meanwhile cited such as "upper" in this specification, " first ", " second " and " one " term, be also only convenient for narration
Be illustrated, rather than to limit the scope of the invention, relativeness is altered or modified, and is changing technology without essence
It inside holds, when being also considered as the enforceable scope of the present invention.
Fig. 2A to Fig. 2 D is the schematic diagram of the first embodiment of electronic packing piece 2 of the invention.
As shown in Fig. 2A to Fig. 2 D, the electronic packing piece 2 include: a bearing structure 20, an at least electronic component 24,
At least one first conducting element 21, at least one second conducting element 22 and an encapsulated layer 25.
The bearing structure 20 has the ground connection of the first ground area A being separated from each other and second in definition on a surface 20a
Region B, and the electronic component 24 is located in the A of first ground area, and part first ground area A is enabled to be located at second ground connection
Between region B and the electronic component 24, that is, the first ground area A compared with the second ground area B adjacent to the electronic component
24, wherein be laid with multiple (as shown in the figure three) first ground contacts 201 on the A of first ground area, and in this second
Multiple (the as shown in the figure three) routes 200 being separated from each other and multiple (as shown in the figure three) are laid on the B of ground area
Second ground contact 202.
In this present embodiment, which is circuit configurations or seedless central layer (coreless) with core layer
Circuit configurations, and with multiple line layers (figure omits, and can refer to the line layer 100 of the 1st figure), for example, core substrate, coreless
Substrate is fanned out to (fan out) type rewiring road floor (redistribution layer, abbreviation RDL), and the line layer is in this
It include those first ground contacts 201, route 200 and the second ground contact 202 on the surface 20a of bearing structure 20.
In addition, the bearing structure 20 is as poly- to diazole benzene to the material of zone isolation line layer
(Polybenzoxazole, abbreviation PBO), polyimides (Polyimide, abbreviation PI), prepreg (Prepreg, abbreviation PP) etc.
Dielectric material.It should be appreciated that ground, which can also be the load-bearing part of other bearing wafers, such as organic board, wafer
(wafer) or other support plates with metal line (routing), however it is not limited to above-mentioned.
Also, the distribution area (the ㄩ font area that the imaginary line of Fig. 2 B is surrounded) of first ground area A be greater than this
The distribution area (rectangular area that the imaginary line of Fig. 2 B is surrounded) of two ground area B.It should be appreciated that ground, first access area
The distribution area of domain A also can be equal to the distribution area of second ground area B.
In addition, the route 200 includes conductive trace 200a and is located at the signal at the both ends conductive trace 200a and connects
Point 200b and electrical endpoint 200c.
The electronic component 24 is set in the bearing structure 20 and with multiple (as shown in the figure three) to electrical property
The weld pad 240 and multiple (as shown in the figure three) for connecting the first and/or second ground contact 201,202 are for electrically connecting to this
The electronic pads 241 of route 200.
In this present embodiment, which is active member, passive device or combinations thereof etc., wherein the active element
Part is, for example, semiconductor wafer, and the passive device is, for example, resistance, capacitor and inductance.
Furthermore the weld pad 240 is the ground mat of the electronic component 24, and the electronic pads 241 are the news of the electronic component 24
Number pad.
Also, the electronic pads 241 of the electronic component 24 are electrically connected those signal contacts by multiple third conducting elements 23
200b, wherein the third conducting element 23 is bonding wire.
In addition, as shown in Figure 2 C, the weld pad 240, first ground contact 201 and second ground contact 202 are arranged in
On same straight line (dotted line C as shown in fig. 2 c), and the signal contact 200b and the electronic pads 241 are located at same straight line (as schemed
Dotted line D shown in 2C) on.
First conducting element 21 is bonding wire, contacts and be electrically connected the weld pad 240 and first ground contact
201。
Second conducting element 22 be bonding wire, contact and be electrically connected first ground contact 201 and this second
Ground contact 202.
In this present embodiment, the length t of the length r of first conducting element 21 and second conducting element 22 be less than this
The length L of three conducting elements 23.
In addition, in another embodiment, as shown in figure 3, the weld pad 240 of the electronic component 24 can also pass through the of such as bonding wire
Four conducting elements 54 are directly electrically connected second ground contact 202, without being jumped via first ground contact 201
Line;Alternatively, as shown in figure 3, the weld pad 240 of the electronic component 24 only can also electrically be connected by the first conducting element 51 such as bonding wire
Connect first ground contact 201, and no longer jumper connection is to second ground contact 202.
The encapsulated layer 25 is formed on the surface 20a of the bearing structure 20, with coat the electronic component 24, this first
Conducting element 21, second conducting element 22 and the third conducting element 23.
In this present embodiment, which is insulation material, such as polyimides (polyimide, abbreviation PI), dry film (dry
Film), epoxy resin (epoxy) or package material (molding compound) can be used pressing (lamination) or be molded
(molding) mode is formed on the surface 20a of the bearing structure 20.However, material and production in relation to the encapsulated layer 25
Mode is not limited to above-mentioned.
Therefore, electronic packing piece 2 of the invention has the ground connection of the first ground area A and second by the bearing structure 20 definition
Region B makes the electronic component 24 is alternative to be electrically connected first and/or second ground contact 201,202, therefore compared to existing
There is technology, it, can be by electronics member when the function of the electronic component 24 increases and makes the electric current increase by the electronic component 24
Part 24 is electrically connected first and second ground contact 201,202, to meet the demand of the earthing potential of the electronic component 24.
Furthermore when the function of the electronic component 24 is few, which can be only electrically connected to first ground connection
Contact 201 (or second ground contact 202), to meet the demand of the smaller earthing potential of the electronic component 24.
Fig. 4 A and Fig. 4 B are the schematic diagram of the another embodiment of electronic packing piece 3 of the invention.The present embodiment and aforementioned reality
The difference for applying example is only that the wiring of the bearing structure 20, and other components are roughly the same, therefore only illustrates deviation below, and no longer
It repeats and mutually exists together.
As shown in fig. 4 a and fig. 4b, the bearing structure 20 shape between the first ground area A and second ground area B
Cheng Youyi signal line 300.
In this present embodiment, which is electrically connected the route 200 by the line layer in the bearing structure 20,
To enable the electronic component 24 pass through routing to the signal contact 200b to electrically conduct to the signal line 300, configuration is promoted
Flexibility ratio.
In conclusion electronic packing piece of the invention, has the first ground area to connect with second by bearing structure definition
Ground region makes the electronic component that can be selectively electrically connected with first and/or second ground contact according to its functional specification, to meet
Larger or smaller earthing potential needed for the electronic component, therefore the practicability of the electronic packing piece can be promoted.
Above-described embodiment is only to be illustrated the principle of the present invention and its effect, and is not intended to limit the present invention.Appoint
What one of ordinary skill in the art without departing from the spirit and scope of the present invention, modifies to above-described embodiment.Therefore
The scope of the present invention, should be as listed in the claims.
Claims (14)
1. a kind of electronic packing piece, it is characterized in that, which includes:
Bearing structure, definition have the first ground area and the second ground area, wherein first ground area is equipped at least one
First ground contact, and second ground area is equipped at least one second ground contact;And
Electronic component is set in the bearing structure and is electrically connected first ground contact and/or second ground contact, and
The electronic component is located in first ground area, and part first ground area is enabled to be located at second ground area and the electronics
Between element.
2. electronic packing piece according to claim 1, it is characterized in that, the distribution area of first ground area is greater than or waits
Distribution area in second ground area.
3. electronic packing piece according to claim 1, it is characterized in that, first ground area and second ground area it
Between be formed with signal line.
4. electronic packing piece according to claim 1, it is characterized in that, which has weld pad, to lead by first
Electric device is electrically connected the weld pad and first ground contact.
5. electronic packing piece according to claim 4, it is characterized in that, which is bonding wire.
6. electronic packing piece according to claim 4, it is characterized in that, which passes through the second conducting element electricity
Property connects second ground contact.
7. electronic packing piece according to claim 6, it is characterized in that, which is bonding wire.
8. electronic packing piece according to claim 1, it is characterized in that, which is additionally provided with an at least signal and connects
Point, and the signal contact and the electronic component are electrically connected by third conducting element.
9. electronic packing piece according to claim 8, it is characterized in that, which is bonding wire.
10. electronic packing piece according to claim 8, it is characterized in that, the electronic component have be for electrically connecting to this
The electronic pads of three conducting elements, and the electronic pads and the signal contact are arranged on same straight line.
11. electronic packing piece according to claim 1, it is characterized in that, the electronic component have be for electrically connecting to this
The weld pad of one ground contact and/or second ground contact, and the weld pad and first ground contact and second ground contact
It is arranged on same straight line.
12. electronic packing piece according to claim 1, it is characterized in that, which further includes being formed in the carrying
In structure and coat the encapsulated layer of the electronic component.
13. electronic packing piece according to claim 1, it is characterized in that, which has weld pad, and with the 4th conduction
Element is electrically connected the weld pad and second ground contact.
14. electronic packing piece according to claim 13, it is characterized in that, the 4th conducting element is bonding wire.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW106131573 | 2017-09-14 | ||
TW106131573A TW201916182A (en) | 2017-09-14 | 2017-09-14 | Electronic package |
Publications (2)
Publication Number | Publication Date |
---|---|
CN109509728A true CN109509728A (en) | 2019-03-22 |
CN109509728B CN109509728B (en) | 2021-05-04 |
Family
ID=65745408
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201711062669.3A Active CN109509728B (en) | 2017-09-14 | 2017-11-02 | Electronic package |
Country Status (2)
Country | Link |
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CN (1) | CN109509728B (en) |
TW (1) | TW201916182A (en) |
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JP2014229679A (en) * | 2013-05-21 | 2014-12-08 | 株式会社リコー | Semiconductor device |
CN104617000A (en) * | 2013-11-01 | 2015-05-13 | 爱思开海力士有限公司 | Semiconductor package and method for fabricating the same |
JP2016171157A (en) * | 2015-03-12 | 2016-09-23 | 株式会社東芝 | High frequency semiconductor package |
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2017
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