CN109490751A - A kind of EMMC test method and test circuit - Google Patents
A kind of EMMC test method and test circuit Download PDFInfo
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- CN109490751A CN109490751A CN201811239193.0A CN201811239193A CN109490751A CN 109490751 A CN109490751 A CN 109490751A CN 201811239193 A CN201811239193 A CN 201811239193A CN 109490751 A CN109490751 A CN 109490751A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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Abstract
The embodiment of the present application provides a kind of EMMC test method and test circuit, wherein, test method includes: the test instruction that the test chip output tested in circuit follows local bus agreement, and it is transmitted to EMMC particle to be measured after protocol conversion chip is converted to the test instruction for following EMMC agreement, to be tested for the property to EMMC particle to be measured;EMMC particle to be measured, which executes, to be followed the test of EMMC agreement and instruct and export and follows EMMC agreement implementation result, it then follows EMMC agreement implementation result is converted to by protocol conversion chip follow local bus agreement implementation result after output to testing chip;Test chip is according to following the determination of local bus agreement implementation result to the test result of EMMC particle to be measured.Accordingly, it can be achieved that test chip tests one-touch, comprehensive, the intelligentized fault in production of EMMC particle to be measured.
Description
Technical field
This application involves technical field of memory more particularly to a kind of EMMC test method and test circuits.
Background technique
EMMC (Embedded Multi Media Card, embedded multi-media card), using unified MMC standard interface,
High density NAND (NOT AND, with non-) flash memory and controller are encapsulated in a BGA (Ball Grid Array
Package, ball grid array) in chip.With the development of EMMC specification standards, EMMC will be in smartphone and tablet computer
Etc. become one of the main application standard of embedded storage media in intelligent mobile devices.
In order to promote use of the EMMC in the intelligent mobile devices such as smartphone and tablet computer, one kind is needed
The testing scheme of EMMC tests the fault in production of EMMC, checks early, reduces EMMC when using in intelligent mobile device
Repair rate.
Summary of the invention
The many aspects of the application provide a kind of EMMC test method and test circuit, to carry out fault in production survey to EMMC
Examination.
The embodiment of the present application provides a kind of EMMC test method, is suitable for EMMC and tests circuit, method includes:
Test chip output in test circuit follows the test instruction of local bus agreement, and through protocol conversion chip
It is transmitted to EMMC particle to be measured after being converted to the test instruction for following EMMC agreement, to carry out performance survey to EMMC particle to be measured
Examination;
The test that EMMC particle execution to be measured follows EMMC agreement, which is instructed and exported, follows the EMMC agreement implementation as a result, abiding by
Follow EMMC agreement implementation result be converted to by protocol conversion chip follow local bus agreement implementation result after output to survey
Try chip;
Test chip is according to following the determination of local bus agreement implementation result to the test result of EMMC particle to be measured.
The embodiment of the present application also provides a kind of EMMC test circuit, comprising: test chip, protocol conversion chip and to be measured
EMMC particle, protocol conversion chip are connected between test circuit and EMMC particle to be measured;
Test chip is used to export the test for following local bus local bus agreement instruction, turns through protocol conversion chip
It is transmitted to EMMC particle to be measured after being changed to the test instruction for following EMMC agreement, to be tested for the property to EMMC particle to be measured;
EMMC particle to be measured is used to execute the test for following EMMC agreement and instructs and export and follow EMMC agreement implementation knot
Fruit, it then follows EMMC agreement implementation result is converted to by protocol conversion chip follow localbus agreement implementation result after transmit
To test chip, the test result to EMMC particle to be measured is determined for test chip.
In the embodiment of the present application, the communication timing of local bus agreement is simulated by test chip, it is to be measured to simulate
The products application environment of EMMC particle;Protocol conversion is carried out by protocol conversion chip, to guarantee test chip and EMMC to be measured
Normal communication between particle.Accordingly, it can be achieved that test chip is to the one-touch, comprehensive, intelligentized of EMMC particle to be measured
Fault in production test.
Detailed description of the invention
The drawings described herein are used to provide a further understanding of the present application, constitutes part of this application, this Shen
Illustrative embodiments and their description please are not constituted an undue limitation on the present application for explaining the application.In the accompanying drawings:
Fig. 1 is the structural schematic diagram that a kind of EMMC that one embodiment of the application provides tests circuit;
Fig. 2 is a kind of communication interface connection relationship diagram for each chip chamber that one embodiment of the application provides;
Fig. 3 is the pin function schematic diagram on a kind of STM32 series monolithic that one embodiment of the application provides;
Fig. 4 is a kind of header pin functional schematic for EMMC module that one embodiment of the application provides;
Fig. 5 is the structural schematic diagram that another EMMC that one embodiment of the application provides tests circuit;
Fig. 6 is the circuit diagram for the first power circuit of one kind that one embodiment of the application provides;
Fig. 7 is a kind of circuit diagram for second source circuit that one embodiment of the application provides;
Fig. 8 is the structural schematic diagram that another EMMC that one embodiment of the application provides tests circuit;
Fig. 9 is a kind of circuit diagram for buzzer circuit that one embodiment of the application provides;
Figure 10 is a kind of circuit diagram for LED display circuit that one embodiment of the application provides;
Figure 11 is a kind of circuit diagram for serial port circuit that one embodiment of the application provides;
Figure 12 is a kind of flow diagram for EMMC test method that another embodiment of the application provides.
Specific embodiment
To keep the purposes, technical schemes and advantages of the application clearer, below in conjunction with the application specific embodiment and
Technical scheme is clearly and completely described in corresponding attached drawing.Obviously, described embodiment is only the application one
Section Example, instead of all the embodiments.Based on the embodiment in the application, those of ordinary skill in the art are not doing
Every other embodiment obtained under the premise of creative work out, shall fall in the protection scope of this application.
In order to promote use of the EMMC in the intelligent mobile devices such as smartphone and tablet computer, one kind is needed
The testing scheme of EMMC tests the fault in production of EMMC, checks early, reduces EMMC when using in intelligent mobile device
Repair rate.In this regard, in some embodiments of the application: the communication timing of local bus agreement is simulated by test chip, with
Simulate the products application environment of EMMC particle to be measured;By protocol conversion chip carry out protocol conversion, with guarantee test chip with
Normal communication between EMMC particle to be measured.Accordingly, it can be achieved that test chip to EMMC particle to be measured it is one-touch, comprehensive,
Intelligentized fault in production test.
Below in conjunction with attached drawing, the technical scheme provided by various embodiments of the present application will be described in detail.
Fig. 1 is the structural schematic diagram that a kind of EMMC that one embodiment of the application provides tests circuit.As shown in Figure 1, the survey
Examination circuit includes: that test chip 10, protocol conversion chip 20 and EMMC particle 30 to be measured, protocol conversion chip 20 are connected to test
Between circuit and EMMC particle 30 to be measured;
Test chip 10 is used to export the test for following local bus local bus agreement instruction, it then follows local bus association
The test instruction of view is transmitted to EMMC particle to be measured after protocol conversion chip 20 is converted to the test instruction for following EMMC agreement
30, to be tested for the property to EMMC particle 30 to be measured;
EMMC particle 30 to be measured is used to execute the test for following EMMC agreement and instructs and export and follow the EMMC agreement implementation
As a result, it then follows EMMC agreement implementation result is converted to by protocol conversion chip 20 follows local bus agreement implementation result
After be transmitted to test chip 10, so that test chip 10 is determined to the test result of EMMC particle 30 to be measured.
In the present embodiment, test chip 10 can be used micro-control unit (Microcontroller Unit, MCU) and realize phase
The test function of pass.For example, MCS-51 series monolithic, STM32 series monolithic etc., this implementation can be used in test chip 10
Example is not construed as limiting this.Herein, emphasis is carried out to the explanation of technical solution by taking STM32 series monolithic as an example, but it should reason
Solution, the present embodiment are not limited to this.
In the present embodiment, preset test software, test chip 10 test can be run after the power-up in test chip 10
Software, to realize output test instruction, determine the functions such as test result.It can also preset protocol conversion journey in protocol conversion chip 20
Sequence carries out the functions such as protocol conversion according to protocol conversion rule to realize.Accordingly, in the present embodiment, it can be achieved that one-touch test,
Simple and quick, testing efficiency is high.
EMMC particle is as embedded multi-media card, in products application, it may be necessary to various types of CPU
It is communicated.In the present embodiment, the products application ring of EMMC particle can be simulated by test chip 10 and protocol conversion chip 20
Border.
EMMC particle can be by the local bus interface of access CPU in products application, and the local bus interface of CPU is right
Local bus agreement can be followed when outer communication.In the present embodiment, the logical of the local bus interface of 10 analog CPU of chip is tested
Timing is believed, to export the test instruction for following local bus local bus agreement, for example, STM32 series monolithic can pass through C
The communication timing of vorbal model local bus interface.EMMC particle usually follows EMMC agreement, the present embodiment in products application
In, protocol conversion can be carried out between test chip 10 and EMMC particle 30 to be measured, is surveyed with realizing by protocol conversion chip 20
Try the normal communication of chip 10 and EMMC particle 30 to be measured.
In some practical applications, protocol conversion chip 20 may include local bus bus interface and EMMC bus interface,
The I/O interface that localbus bus is simulated in local bus bus interface and test chip 10 in protocol conversion chip 20 connects
It connects, the EMMC bus interface in protocol conversion chip 20 is connect with the bus interface of EMMC particle 30 to be measured.Wherein, protocol conversion
Chip 20 can be used Complex Programmable Logic Devices (Complex Programmable Logic Device, CPLD) and realize phase
The protocol conversion function of pass.
STM32 series monolithic is used to test chip 10, it is a kind of each for protocol conversion chip 20 is using CPLD realization
The communication interface connection relationship of chip chamber as shown in Fig. 2, it is worth noting that, the part pin on each chip is only shown in Fig. 2.
Wherein, pin BOOT_AD0~BOOT_AD12 between STM32 and CPLD is address I/O, pin BOOT_DA0~BOOT_DA7
It is control I/O for data I/O, pin BOOT_CMD, pin BOOT_CLK is clock I/O, and pin BOOT_RESET is to reset I/
O.Pin EMMC DA0~EMMC DA7 between CPLD and EMMC particle is data I/O, and pin EMMC CMD is control I/O,
Pin EMMC CLK is clock I/O, and pin EMMC RESET is to reset I/O.
In order to be more convenient for understanding, Fig. 3 shows the pin function schematic diagram on STM32 series monolithic.As shown in figure 3,
Pin BOOT_AD0~BOOT_AD12 is address I/O, and pin BOOT_DA0~BOOT_DA7 is data I/O, pin BOOT_CMD
To control I/O, pin BOOT_CLK is clock I/O, and pin BOOT_RESET is to reset I/O, these pins are connect with CPLD, with
Follow the communication of local bus agreement.In addition, also showing several buzzer circuit connectivity ports in Fig. 3, LED is shown
Circuit connection port and serial port circuit connectivity port, these ports are connect with peripheral circuit hereinafter respectively.For example, buzzer
Circuit connection port can connect buzzer circuit hereinafter, with control buzzer circuit to test result and/test-types into
Row auditory cues.Power port is also shown in Fig. 3, power port can be connect with the first power circuit 40 hereinafter.In Fig. 3
Also show short-circuit test port, test port in place, frequency test port, hardware fool proof test port and the test of software fool proof
Port, these ports can be respectively used to the test of different test-types.Such as: short-circuit test port is used for short-circuit test, can
It is connect with short-circuit test resistance hereinafter.It is worth noting that the part for illustrating only STM32 series monolithic in Fig. 3 is drawn
Foot.
It can be EMMC module by CPLD and EMMC particle integral packaging to be measured in some practical applications, EMMC module
Row's aciculiform formula can be used in communication interface, and Fig. 4 shows the functional schematic of each header pin in EMMC module.Wherein, pin
BOOT_AD0~BOOT_AD12 is address I/O, and pin BOOT_DA0~BOOT_DA7 is data I/O, and pin BOOT_CMD is control
I/O processed, pin BOOT_CLK are clock I/O, and pin BOOT_RESET is to reset I/O, these pins are connect with test chip, with
Follow the communication of local bus agreement.In addition, also showing rate-adaptive pacemaker port and power port in Fig. 4.Wherein, frequency
Rate output port can be connected to the frequency test port of STM32 in Fig. 3 by stand J6, by CPLD and EMMC particle to be measured it
Between working pulse signal export to STM32.Wherein, power port can then connect second source circuit 50 hereinafter, with for
CPLD and EMMC particle to be measured power supply.It is worth noting that illustrating only the part pin of EMMC module in Fig. 4.In addition, Fig. 4
In stand J6 be the stand comprising two interface CON (1 and 2 in Fig. 4 respectively indicate two interfaces), but the present embodiment is not
It is limited to this, the stand that other specifications also can be used in test circuit believes the working pulse between CPLD and EMMC particle to be measured
Number output is to STM32.
In the present embodiment, test process at least may include test instruction transmission process, test execution process instruction, execute knot
Fruit feedback procedure and test result generating process.
In test instruction transmission process, test chip 10 exports the test instruction for following local bus agreement, and test refers to
Order can be sent to protocol conversion chip 20 first, and protocol conversion chip 20 will comply with according to preset protocol conversion rule
The test instruction of local bus agreement is converted to the test instruction for following EMMC agreement, and protocol conversion chip 20 will comply with EMMC
The test instruction of agreement is sent to EMMC particle 30 to be measured.
In test execution process instruction, EMMC particle 30 to be measured can be referred to based on the test for following EMMC agreement received
Order carries out instruction response, and generates implementing result, and the form that implementing result can follow EMMC agreement is sent to protocol conversion core
Piece 20.
In implementing result feedback procedure, EMMC particle 30 to be measured can will comply with the transmission of EMMC agreement implementation result first
To protocol conversion chip 20, protocol conversion chip 20 can will comply with EMMC agreement implementation knot according to preset protocol conversion rule
Fruit, which is converted to, follows the local bus agreement implementation as a result, protocol conversion chip 20 can will comply with the local bus agreement implementation
As a result it is sent to test chip 10.
In test result generating process, test chip 10 can follow the local bus agreement implementation based on what is received
As a result it carries out such as comparing, inquire logic analysis, and generate test result.
In the present embodiment, the communication timing of local bus agreement is simulated, by test chip 10 to simulate EMMC to be measured
The products application environment of particle 30;By protocol conversion chip 20 carry out protocol conversion, with guarantee test chip 10 with it is to be measured
Normal communication between EMMC particle 30.Accordingly, it can be achieved that testing chip 10 to one-touch, the Quan Fang of EMMC particle 30 to be measured
Position, the test of intelligentized fault in production.
In above-mentioned or following embodiments, test circuit can execute various performance tests to EMMC particle 30 to be measured, including
But be not limited to readwrite tests, partition management (enhance) test, volume test, frequency test or formatting test etc..Below will
Illustrate to test circuit by taking readwrite tests, partition management test, volume test and frequency test as an example to EMMC particle 30 to be measured
Performance test scheme, but it is to be understood that, the present embodiment is not limited to these types of performance test.Wherein, it can refer to hereinafter
Described, EMMC particle to be measured is usually packaged on connecting plate, and in the present embodiment, test circuit can be to where EMMC particle to be measured
Connecting plate carry out integrated testability, this make EMMC particle to be measured 30 and connecting plate where it and other units on connecting plate it
Between performance issue all can be tested out.
When executing partition management test to EMMC particle 30 to be measured, chip 10 is exportable follows localbus agreement for test
Partition management state verification instruction, wherein partition management state verification instruction is used to indicate EMMC to be measured and provides status indicator
Value.The partition management state verification instruction that protocol conversion chip 20 can will comply with local bus agreement, which is converted to, follows EMMC association
The partition management state verification of view instructs and is sent to EMMC particle 30 to be measured, executable point received of EMMC particle 30 to be measured
The test instruction of area's controlled state, and status indicator value is extracted as implementing result, shape from the relevant register of its partition management
State ident value can be sent to by protocol conversion chip 20 test chip 10, test chip 10 can according to status indicator value determine to
Survey the partition management state of EMMC particle 30.When status indicator value is non-zero, it may be determined that 30 partition management of EMMC particle to be measured
Success.
EMMC particle 30 to be measured can be using the status indicator value in the relevant register of partition management as implementing result, and incites somebody to action
Implementing result is sent to test chip 10 by protocol conversion chip 20.For example, in the EMMC particle to be measured of certain model, when
When partition management is failed, status indicator value is 0x0, and when partition management success, status indicator value is then nonzero value.According to
This, whether test chip 10 can successfully judge partition management from the angle of status indicator value.
Before output follows the partition management state verification instruction of local bus agreement, test chip 10 is also exportable
Follow the partition management instruction of local bus agreement, wherein partition management instruction, which is used to indicate EMMC particle 30 to be measured and executes, to divide
Area's management operation.The partition management instruction that protocol conversion chip 20 can will comply with local bus agreement, which is converted to, follows EMMC association
The partition management of view instructs and is sent to EMMC particle 30 to be measured, and the executable partition management received of EMMC particle 30 to be measured refers to
It enables, adjusts itself capacity, and status indicator value adjusted is written in the relevant register of its partition management.
Wherein, partition management operation refers to: the storage medium of subregion from MLC (Multi-Level Cell, multilayer list
Member) become SLC (Single-Level Cell, single layer cell), improve readwrite performance, service life and the stability of the subregion.
The process of partition management operation is specifically included that EMMC particle from Extended CSD register register
The data of first particular register position (MAX_ENH_SIZE_MULT [159:157]), are moved to the second particular register position
(ENH_SIZE_MULT [142:140]), this process is irreversible.If after operating successfully, above-mentioned second particular register position
The status indicator value of (ENH_SIZE_MULT [142:140]) will be to be non-zero, and if operation is unsuccessful, above-mentioned second particular register
Status indicator value in position will keep default value 0.
Accordingly, in the present embodiment, when whether test chip 10 successfully carries out partition management from the angle of status indicator value
When judgement, it can be judged according to the status indicator value of above-mentioned second particular register position.
It is to be measured in the present embodiment in view of the partition management operation of EMMC particle 30 to be measured needs to restart just come into force
EMMC particle 30 can execute the partition management state verification instruction for following EMMC agreement after restart, extract most from its register
New status indicator value, and test chip 10 is sent to by protocol conversion chip 20, so that test chip 10 is according to newest
Status indicator value determines the partition management state of EMMC particle 30 to be measured.Accordingly, it can effectively ensure that partition management state verification
Accuracy.
After partition management operation, the capacity of EMMC particle will halve.In the present embodiment, test chip 10 can also calm quantitative change
Whether the angle of change successfully judges partition management.Accordingly, test chip 10 can operate preceding and/or subregion in partition management
Volume test is executed to EMMC particle to be measured after management operation.
When executing volume test to EMMC particle 30 to be measured, the exportable local bus agreement of following of test chip 10
Volume test instruction, wherein volume test instruction is used to indicate EMMC particle 30 to be measured and provides capacity ident value.Protocol conversion core
The volume test instruction that piece 20 can will comply with local bus agreement, which is converted to, to be followed the volume test of EMMC agreement and instructs and send
To EMMC particle 30 to be measured, the executable volume test instruction received of EMMC particle 30 to be measured is mentioned from its capability register
The amount of trying to please ident value, and test chip 10 is sent to by protocol conversion chip 20.It is true according to capacity ident value to test chip 10
The actual capacity of fixed EMMC particle 30 to be measured.
Wherein, EMMC particle 30 to be measured includes one or more registers, is stored with its corresponding appearance in each register
Measure ident value, EMMC particle 30 to be measured can using it includes the corresponding capacity ident value of each register as implementing result.It surveys
Chip 10 is tried when receiving one or more capacity ident values, addition or other logical operations can be performed, it is to be measured to determine
The actual capacity of EMMC particle 30.For example, if the capability register position of EMMC particle 30 to be measured be (SEC_COUNT [215:
212], then 10 hex values can be converted into, then will be after conversion according to the capacity ident value of 16 systems in the register by testing chip 10
10 systems value substitute into calculation of capacity formula, the actual capacity of EMMC particle to be measured can be calculated.
When executing readwrite tests to EMMC particle 30 to be measured, the exportable local bus agreement of following of test chip 10
It writes and tests instruction, write test instruction and be used to indicate EMMC particle 30 to be measured based on data to be written execution write operation, wherein survey
Examination chip 10 can be written into data by the output of protocol conversion chip 20 to EMMC particle 30 to be measured, and testing chip 10 can write
Data to be written are exported before or after test instruction.What protocol conversion chip 20 can will comply with local bus agreement writes test
Instruction, which is converted to, follows writing test instruction and being sent to EMMC particle 30 to be measured for EMMC agreement, and EMMC particle 30 to be measured is executable
What is received writes test instruction, and is written into data write-in designated position.
In the present embodiment, test chip 10 can execute reading survey to it after writing test to EMMC particle 30 to be measured execution
Examination, to judge the read-write capability of EMMC particle 30 to be measured according to the implementing result for reading test.It is executed to EMMC particle 30 to be measured
When reading test, the exportable reading test instruction for following local bus agreement of test chip 10, reading test instruction is used to indicate to be measured
EMMC particle 30 provides target data, wherein target data can be the data to be written when writing test.Protocol conversion chip 20
The reading test instruction that local bus agreement can be will comply with is converted to the reading test instruction for following EMMC agreement and is sent to be measured
EMMC particle 30, the executable reading test instruction received of EMMC particle 30 to be measured, obtains target data conduct from designated position
Implementing result, and test chip 10 is sent to by protocol conversion chip 20.The target data that test chip 10 can will receive
It is compared with the data to be written when writing test, whether the read-write capability to judge EMMC particle 30 to be measured is normal.
When executing frequency test to EMMC particle 30 to be measured, test chip 10 is adopted using frequency detecting port thereon
The working pulse signal generated during the work time between collection protocol conversion chip 20 and EMMC particle 30 to be measured;According to work arteries and veins
Rush the actual frequency that signal determines EMMC particle 30 to be measured;When the actual frequency of EMMC particle 30 to be measured meets default working frequency
It is required that when, determine that EMMC particle 30 to be measured passes through frequency test.
Working pulse signal will be generated between EMMC particle 30 and protocol conversion chip 20 to be measured in course of normal operation,
The acquisition modes of the working pulse signal, which can be, disposes test point between EMMC particle 30 to be measured and protocol conversion chip 20,
And connect test point with the frequency detecting port on test chip 10, to test chip 10 using frequency detecting thereon
Port processing is to the working pulse signal.Chip 10 is tested when test software runs to frequency test part, acquires the work
Pulse signal, and the working pulse signal is converted into frequency using functions such as external interrupt and/or timers, the frequency after conversion
Rate is the actual frequency of EMMC particle 30 to be measured.When the actual frequency of EMMC particle 30 to be measured is in preset frequency range
When, it may be determined that the frequency of EMMC particle 30 to be measured is normal.
Certainly, in the present embodiment, test chip 10 can also be executed by the test software of operation thereon and be directed to EMMC to be measured
The other performance of particle 30 is tested, no longer exhaustive herein.
In above-mentioned or following embodiments, test chip 10 can also test it to 30 execution performance of EMMC particle to be measured
Before, a variety of tests of switching performance execution to test circuit, including but not limited to short-circuit test are surveyed in bit test, hardware fool proof
Examination or the test of software fool proof.It will illustrate below by short-circuit test, for bit test, the test of hardware fool proof and the test of software fool proof
The switching performance testing scheme of 10 pairs of chip test circuits of test, but it is to be understood that, the present embodiment is not limited to these types
Switching performance test.It wherein, can refer to described hereinafter, EMMC particle to be measured is usually packaged on connecting plate, the present embodiment
In, test circuit can carry out integrated testability to the connecting plate where EMMC particle to be measured, this makes EMMC particle 30 to be measured and its
The switching performance problem between other units on place connecting plate and connecting plate all can be tested out.
When executing short-circuit test to test circuit, test chip 10 utilizes its short-circuit test port processing short-circuit test electricity
Voltage value in resistance determines test short circuit when collected voltage value is unsatisfactory for predeterminated voltage requirement;Wherein short circuit is surveyed
Examination resistance is connected between the short-circuit test port of test chip 10 and the corresponding ports of protocol conversion chip 20.
In some practical applications, the connection type of short-circuit test resistance may is that the first power supply referred to below
The resistance of a 10k is connected between the EMMC_3V3 lead of the VCC_3V3 lead second source circuit of circuit, in 10K resistance
Close to that end of EMMC_3V3, the resistance of a 33R is connect, and the other end of the resistance of 33R is connected to the short-circuit test of STM32
Port.If connecting plate is short-circuit, the voltage value meeting very little that short-circuit test port processing arrives is collected if not short-circuit
Voltage value can be larger, voltage value can be converted to resistance value with modes such as curve matchings, test core according to the voltage value of acquisition
Piece 10 can determine connecting plate short circuit when resistance value is less than certain value, and when resistance value is greater than certain value, judge connecting plate just
Often.Certainly, the present embodiment does not limit the connection type of short-circuit test resistance, and also can be used in the present embodiment other can lead to
It crosses short-circuit test resistance characterization and goes out different connection types of the connecting plate under short-circuit condition and non-short-circuit condition.
Wherein, it is contemplated that, may be to the integrated connection plate where EMMC particle 30 to be measured when test circuit has short circuit
Risk is brought, short-circuit test can carry out under connecting plate off-position.When test circuit in exist short circuit or there is no short circuit
When, the collected ohmically voltage value of short-circuit test of short-circuit test port institute for testing chip 10 will be different, test chip
10 can judge whether test circuit is short-circuit according to collected voltage value.Wherein, the main test protocol conversion chip of short-circuit test
Connection between 20 and EMMC particle 30 to be measured is with the presence or absence of short circuit.
It executing when to test circuit in bit test, test chip 10 detects the level change in its test port in place,
And when the level change of test port in place meets preset condition, determine test circuit by detecting in place.
Wherein, the level in the test port in place on chip 10 is tested in protocol conversion chip 20 and EMMC particle to be measured
Variation will be present in the case that 30 connection is in place or not in place.For example, can be in the test port in place of test chip 10
The first level of default setting, the port of the protocol conversion chip 20 being connected with the test port in place and EMMC particle 30 to be measured
On can default setting second electrical level, when the connection of protocol conversion chip 20 and EMMC particle 30 to be measured is not in place, test chip
Level in 10 test port in place is unchanged, and when the connection of protocol conversion chip 20 and EMMC particle 30 to be measured is in place
When, the level tested in the test port in place of chip 10 will change, such as when second electrical level is lower than second electrical level, test
Level in the test port in place of chip 10 will be pulled low.Accordingly, test chip 10 can be determined using its test port in place
Whether the connection of protocol conversion chip 20 and EMMC particle 30 to be measured is in place.
In the present embodiment, when testing EMMC particle 30 to be measured, EMMC particle 30 to be measured may be encapsulated in a variety of
On different connecting plates.For example, may include protocol conversion chip 20 and an EMMC particle 30 to be measured, connecting plate on connecting plate
On may also contain protocol conversion chip 20 and two EMMC particles 30 to be measured, may also contain an EMMC to be measured on connecting plate
Particle 30.The problems such as in order to avoid hardware connection error occurs, the present embodiment can be executed by test 10 pairs of test circuits of chip
The test of hardware fool proof.
When executing the test of hardware fool proof to test circuit, the level of the detectable hardware fool proof port thereon of test chip 10
Variation, and when the level change in hardware fool proof port meets preset condition, determine that test circuit is tested by hardware fool proof.
Wherein, for different connecting plates, different hardware fool proof ports can be checked by testing chip 10, in addition, test core
The hardware fool proof port of piece 10 can be one, can also be multiple.For example, for be measured comprising protocol conversion chip 20 and one
The connecting plate of EMMC particle 30, test chip 10 can check the level on the first hardware fool proof port and the second hardware fool proof port
Whether variation meets preset condition;For the connecting plate comprising protocol conversion chip 20 and two EMMC particles 30 to be measured, test
Chip 10 can check whether the level change on third hardware fool proof port and the 4th hardware fool proof port meets preset condition.Often
Level change judgement on a hardware fool proof port can refer in bit test procedures.Testing chip 10 can be according to hardware fool proof port
On the level change type that whether meets preset condition to determine the connecting plate currently connected whether be class that it can be tested
Type, to realize hardware fool proof.
In order to be adapted to different connecting plates, different test softwares can be downloaded by testing in chip 10.To avoid testing
Software and test chip 10 corresponding connection board type unmatched problem can also be right by testing chip 10 in the present embodiment
It tests circuit and executes the test of software fool proof.
When executing the test of software fool proof to test circuit, the test detection of chip 10 is corresponding with test software has been downloaded thereon
Software fool proof port on whether there is predetermined level, and exist on having downloaded test software corresponding software fool proof port pre-
If when level, determining that test circuit is tested by software fool proof.
Wherein, it after determining the type for the connecting plate that test chip 10 is tested, can preset on test chip 10
Software fool proof port, software fool proof port can be one or more, and the predetermined level on software fool proof port can be using supplying
Circuit is realized, such as the first power circuit 40 hereinafter referred to, but the present embodiment is not construed as limiting this.When under test software
After being downloaded in test chip 10, test chip 10 can be by operation test software to detect the corresponding software fool proof of the test software
It whether there is predetermined level on port, and the software fool proof port as corresponding to different test softwares is different, if under
When the test program of load is not the type for the connecting plate that the test chip 10 for adapting to determine is tested, test software is tested
Software fool proof port on level do not preset, accordingly, test chip 10 is in the crucial corresponding software of the test
Detected level will be unsatisfactory for the preset requirement of the test software on fool proof port.Test chip 10 can be judged accordingly under institute
Whether the software of load is adapted to the type for the connecting plate tested needed for test chip 10, to realize software fool proof.
Fig. 5 is the structural schematic diagram of another EMMC test circuit in one embodiment of the application.As shown in figure 5, this reality
The EMMC test circuit applied in example further includes the first power circuit 40 and second source circuit 50 on the basis of Fig. 1.
First power circuit 40 is connected between the power port and ground connection of test chip 10, for supplying for test chip 10
Electricity.As mentioned in above-described embodiment, the first power circuit 40 can also be used to provide for the related port of test chip 10 pre-
If level.
Second source circuit 50 is connected to the control port and protocol conversion chip 20 and EMMC to be measured of test chip 10
Between the power port of grain 30, second source circuit 50 is used to power for protocol conversion chip 20 and EMMC particle 30 to be measured.
Wherein, the first power circuit 40 and second source circuit 50 are connect with external power supply 90, and external power supply 90 is used for
It powers for the first power circuit 40 and second source circuit 50.External power supply 90 is the first power circuit 40 after DC-DC is depressured
It powers with second source circuit 50.
In the present embodiment, test chip 10 can be by its control port to protocol conversion chip 20 and EMMC particle 30 to be measured
Carry out electric control up and down.During the test, test chip 10 can be made using its control port to the transmission of second source circuit 50
Energy signal, is powered on controlling second source circuit 50 to protocol conversion chip 20 and EMMC particle 30 to be measured;Test chip
10 can send disability signal to second source circuit 50 using its control port, to control second source circuit 50 to protocol conversion
Chip 20 and EMMC particle 30 to be measured are powered off.
For ease of understanding, the circuit diagram of the first power circuit is shown in Fig. 6.As shown in fig. 6, the VCC_3V3 on figure right side
Lead is connected to the power port of STM32 in Fig. 3.In first power circuit: R87 and R89 is output voltage control resistance, different
Resistance value ratio, different output voltages can be calculated.Wherein D4 is freewheeling diode, and inductance energy-accumulating element is all basis
The typical circuit of chip is designed.Wherein C44, C45, C46 are filter capacitor, in order to make the voltage ripple of output smaller, electricity
It presses more stable.Wherein C47 and C48 is the filter capacitor of input voltage 12V, in order to make the voltage of input terminal more stable.Wherein R88
The galvanic electricity that is limited, D5 is LED light, is used to indicate whether power supply exports.Wherein, C3 boottrap capacitor selection can be according to chip
Datasheet recommendation be designed.
The circuit diagram of second source circuit is shown in Fig. 7.As shown in fig. 7, the EMMC_VCC_EN lead connection in figure left side
The second source circuit control port of STM32 into Fig. 3, the EMMC_3V3 lead for scheming right side can be connected to EMMC module in Fig. 4
Power port.In second source circuit: CD1, C49, C50, C51 are input filter capacitor, and C52 is bootstrap capacitor, and L4 is storage
Energy inductance, C56, C57, C58, C59, CD2 are output capacitance, due to making output voltage more stable.R90, which is that NC is reserved, not to be welded.
R93 is pull down resistor, and the enabled pin of default voltage chip is low level, and R91 is current-limiting resistance, passes through this resistance and STM32
I/O port be connected, when the second road power supply electrifying, need to guarantee that EMMC_VCC_EN is high level state.Wherein R92 and R94 is defeated
Voltage controlled resistance out can control the size of output voltage by the ratio of the two resistance.R96 is current-limiting resistance, and D6 is
Whether normal LED power indicator light is used to indicate power supply.J11 and J12 is to test reserved pad.
In conjunction with several test-types referred in previous embodiment, in the present embodiment, illustrated with these types of test-types
Test 10 access second source circuit of chip, 50 protocol conversion chip 20 and EMMC particle to be measured 30 carry out the side of upper and lower electric control
Case.
After first 40 pairs of power circuit test chip 10 powers on, test chip 10 can run test software thereon,
Sequentially to execute the short-circuit test referred in previous embodiment, in bit test, the test of hardware fool proof, the test of software fool proof, frequency
Test, readwrite tests, partition management test, volume test etc., certainly, the execution sequence of these types of test-types are not limited to
This.
Chip 10 is tested at operation to short-circuit test part, can control second source circuit 50 to protocol conversion chip 20
And EMMC particle 30 to be measured is powered off, if test circuit by short-circuit test, can control protocol conversion chip 20 and to be measured
EMMC particle 30 is powered on, and continues to execute subsequent software fool proof test, detection in place, the test of hardware fool proof, short circuit inspection
Survey, frequency test, readwrite tests, formatting test, partition management test, volume test etc., test chip 10 can be in these surveys
When any one of examination test does not pass through, second source circuit 50 is controlled in time to protocol conversion chip 20 and EMMC particle to be measured
30 are powered off;And when these tests by when, second source circuit 50 can remain protocol conversion chip 20 and to be measured
EMMC particle 30 is powered.
When testing chip 10 in operation to partition management part of detecting, it has been observed that the subregion pipe of EMMC particle 30 to be measured
Reason operation can just come into force after restart, and therefore, test chip 10 can execute partition management state verification in EMMC particle 30 to be measured
Before instruction, by powering again after 50 control protocol conversion chip 20 of second source circuit and EMMC particle 30 to be measured power-off, with
Realize restarting for EMMC particle 30 to be measured.The accurate of the partition management state verification for surveying EMMC particle 30 is treated to can guarantee
Property.
In addition, test chip 10 can be by second source circuit 50 to protocol conversion chip 20 after the completion of all tests
And EMMC particle 30 to be measured is powered off, to be in off-position when guaranteeing test circuit dismantling.
In the present embodiment, test chip 10 can be realized by its control port to protocol conversion chip 20 and EMMC to be measured
The power-on and power-off intelligent control of grain 30 carries out power on and off operation without artificial, for the one-touch survey for testing circuit during the test
Examination provides the foundation.
Fig. 8 is the structural schematic diagram that another EMMC that one embodiment of the application provides tests circuit.As shown in figure 8, this
EMMC test circuit in embodiment further includes following at least one peripheral circuit on the basis of Fig. 2: buzzer circuit 60,
LED display circuit 70 or serial port circuit 80.It is worth noting that peripheral circuit shown in Fig. 8 is shown on the basis of Fig. 2
, certainly, peripheral circuit shown in Fig. 8 can also be on the basis of Fig. 1 to include in test circuit, and the present embodiment is to this
It is not construed as limiting.
Buzzer circuit 60 is used under the control of test chip 10 carry out the sense of hearing to test result and/or category of test to mention
Show.Wherein, test result refers to the test result to EMMC particle 30 to be measured that test chip 10 is determined, for example, frequency is surveyed
It pinged or readwrite tests does not pass through etc., test-types are short-circuit test, frequency test, the capacity referred in previous embodiment
Types, each test-types such as test can reflect test phase locating for test process.Buzzer circuit 60 is mainly used for enhancing
User's using effect can judge the different test phases in test by the sense of hearing, can be tested by software set difference
Prompt effect in stage can directly judge that test passes through or do not pass through by the prompt of buzzer circuit 60, can be effective
Improve testing efficiency.
For ease of understanding, Fig. 9 shows a kind of circuit diagram of buzzer circuit.As shown in figure 9, in buzzer circuit 60
BEEP lead can be connected to the buzzer circuit connectivity port of STM32 in Fig. 3.In buzzer circuit 60: BP1 is a buzzing
Device, Q1 are a triodes, and R59 is current-limiting resistance, if buzzer sound is not big enough, the resistance value of R59 can be turned down suitably.
The effect of R58 is to reduce the damage of buzzer.C24 is filter effect, makes level more stable.When BEEP is low level,
Due to there is the presence of R60 pull down resistor simultaneously, the base stage of Q1 is low level, and triode is not turned on;When STM32 control BEEP is height
Q1 triode ON when level, BP1 are also switched on.It can make bee in conjunction with the PWM function of STM32 according to the low and high level of BEEP
Ring device sets different sensation of tone prompt effects.Such as: in proper testing, buzzer prompts the ticking of certain frequency, but is surveying
When examination failure, buzzer yowls, and test sets other prompt tones when completing.To realize that the sense of hearing of test process/result judges.
LED display circuit 70 is used to carry out vision to test result and/or category of test under the control of test chip 10
Prompt.LED display circuit 70 can also prompt the different testing progress such as testing, testing completion, test crash, for different
Testing progress can have different display effect, so that tester directly can intuitively judge the survey of EMMC by vision
Examination process conveniently can compactly show test result and/or test-types.
For ease of understanding, Figure 10 shows a kind of circuit diagram of LED display circuit.As shown in Figure 10, in LED display circuit
EMMC_LED_G lead, EMMC_LED_R lead, LOCAL_LED_G lead and LOCAL_LED_R lead can be respectively connected to
The LED display circuit connectivity port of STM32 in Fig. 3.It is worth noting that connecting though illustrating only a LED display circuit in Fig. 3
Port is connect, it will be appreciated that those skilled in the art that the quantity of LED display circuit connectivity port can press in practical application
It needs to increase and decrease.In Figure 10, LED display circuit further include: 4 LED light, each LED light are double-colored, including green and red,
Different colors and different flashing states, can be used for playing different prompt effects, for example, if test crash, it is red
Lamp constant, when proper testing, bi-colour light flashes repeatedly.D1 is mainly used for indicating the judgement of EMMC module testing.D2 is mainly used
Judge in the test of local bus.
Before being written and read test to EMMC, first whether normal, i.e. CPLD and STM32 communication can be communicated by detection local bus
It is whether normal, because there is the problems such as contact or failure welding after all.Test philosophy is: initially without to EMMC
Grain is communicated, and only STM32 reads the relevant information in CPLD, and whether version, date including CPLD program etc. are normal,
As long as reading normally, it can judge that localbus communication is normal, D2 can be used for the test result instruction of this part, if
Local bus test crash, then there is red and is always on prompt in D2.
In addition, in the present embodiment other way also can be used, visual cues are carried out to test result and/or category of test,
For example, OLED screen curtain or TFT screen, test result and/or test-types can be shown in relevant display screen.This implementation
Example is not construed as limiting this.
Serial port circuit 80 is used under the control of test chip 10 survey test chip 10 to EMMC particle 30 to be measured
The log information of examination is exported to external equipment.Serial port circuit 80 is mainly used for output journal information, so that user judges finally
Test result, if test does not pass through, the content in log information that user can also export according to serial port circuit 80 is judged
Wrong position and reason, facilitates and solves the problems, such as.In addition, serial port circuit 80 can also be used in the storage of log information, for different
EMMC particle 30 to be measured can store log information respectively, in order to whether there is the problems such as test leakage, test do not pass through in follow-up maintenance.
For ease of understanding, a kind of circuit diagram of serial port circuit is shown in Figure 11.As shown in figure 11, electrical level transferring chip U2
Serial ports sending port UAR1_TXD and serial ports receiving port UAR1_RXD can be connected to the serial ports connectivity port of STM32 in Fig. 3.
It is worth noting that though a serial port circuit connectivity port is illustrated only in Fig. 3, it should be understood by those skilled in the art that
It is that in practical application, the quantity of serial port circuit connectivity port can increase and decrease on demand.The port RS232_TX of electrical level transferring chip U2 is logical
Overmatching resistance is connected to serial ports component pin3, in practical application, can be defined according to the pin of component and determine pin pin.
In above-mentioned or following embodiments, for different product demands, EMMC particle 30 to be measured can be encapsulated in a variety of
On different connecting plates.For example, protocol conversion chip 20 and an EMMC particle 30 to be measured can be encapsulated on same connecting plate,
Protocol conversion chip 20 and two EMMC particles 30 to be measured can be encapsulated on same connecting plate, it can also be by one EMMC to be measured
Grain 30 is encapsulated on connecting plate.Wherein, the form that the communication interface of connecting plate can arrange needle is drawn, can be by arranging needle interface
Connecting plate is connected directly on relevant mainboard when products application, connecting plate can also be connected directly to test in test
On chip or test module mentioned hereafter.
For these different product form, the device connection form tested in circuit can be different.For example, test
Chip 10 and protocol conversion chip 20 can integral packaging be test module, this connection form is applicable to EMMC particle 30 to be measured
Situation about being individually carried on connecting plate.Alternatively, protocol conversion chip 20 and 30 integral packaging of EMMC particle to be measured are EMMC mould
Block, this connection form are applicable to the feelings that EMMC particle 30 and protocol conversion chip 20 to be measured are mutually encapsulated on connecting plate
Condition.
Form is connected for the device of above two test circuit, the test software tested in chip 10 can be not necessarily to change,
Therefore, the test that can be achieved to the EMMC particle of multiple product form of test circuit provided by the present embodiment.
Figure 12 is a kind of flow diagram for EMMC test method that another embodiment of the application provides.The test mode can
Circuit is tested suitable for EMMC, as shown in figure 12, this method comprises:
400, the test chip output tested in circuit follows the test instruction of local bus agreement, and through protocol conversion
Chip is transmitted to EMMC particle to be measured after being converted to the test instruction for following EMMC agreement, to carry out performance to EMMC particle to be measured
Test;
401, the test that EMMC particle execution to be measured follows EMMC agreement, which is instructed and exported, follows EMMC agreement implementation knot
Fruit, it then follows EMMC agreement implementation result is converted to by protocol conversion chip follow localbus agreement implementation result after export
To test chip;
402, test chip is according to following the determination of local bus agreement implementation result to the test knot of EMMC particle to be measured
Fruit.
In the embodiment of the present application, the communication timing of local bus agreement is simulated by test chip, it is to be measured to simulate
The products application environment of EMMC particle;Protocol conversion is carried out by protocol conversion chip, to guarantee test chip and EMMC to be measured
Normal communication between particle.Accordingly, it can be achieved that test chip is to the one-touch, comprehensive, intelligentized of EMMC particle to be measured
Fault in production test.
In an alternative embodiment, performance test is comprised at least one of the following: readwrite tests, partition management test, capacity
Test formats test.
In an alternative embodiment, when performance test is that partition management is tested, test chip output follows localbus
The test of agreement instructs, comprising:
Test chip output follows the partition management instruction and partition management state verification instruction of local bus agreement;
The test that EMMC particle execution to be measured follows EMMC agreement, which instructs and generates output, follows EMMC agreement implementation knot
Fruit, comprising:
EMMC particle to be measured executes the partition management instruction for following EMMC agreement, will be adjusted to adjust itself capacity
Status indicator value is written in the relevant register of partition management, and executes the partition management state for following EMMC agreement after restart
Test instruction, extracts status indicator value, and be sent to survey by protocol conversion chip from the relevant register of its partition management
Try chip;
Wherein, when status indicator value is non-zero, indicate that EMMC particle to be measured is tested by partition management.
In an alternative embodiment, when performance test is volume test, test chip output follows local bus agreement
Test instruction, comprising:
Test chip output follows the volume test instruction of local bus agreement;
The test that EMMC particle execution to be measured follows EMMC agreement, which instructs and generates output, follows EMMC agreement implementation knot
Fruit, comprising:
EMMC particle to be measured executes the volume test instruction for following local bus agreement, extracts from its capability register
Capacity ident value, and test chip is sent to by protocol conversion chip;
Test chip according to following the determination of local bus agreement implementation result to the test result of EMMC particle to be measured,
Include:
Test chip determines the actual capacity of EMMC particle to be measured according to capacity ident value.
In an alternative embodiment, performance test includes frequency test, method further include:
Test chip utilizes between frequency detecting port processing protocol conversion chip and EMMC particle to be measured thereon in work
The working pulse signal generated during making;
The actual frequency of EMMC particle to be measured is determined according to working pulse signal;
When the actual frequency of EMMC particle to be measured meets default operating frequency requirements, determine that EMMC particle to be measured passes through frequency
Rate test.
In an alternative embodiment, the test that the test chip output in test circuit follows local bus agreement refers to
It further include that following at least one test is executed to the switching performance of test circuit before order: short-circuit test, in bit test, hardware
Fool proof test or the test of software fool proof.
In an alternative embodiment, when executing short-circuit test to test circuit, method further include:
Under EMMC particle off-position to be measured, test chip is using on its short-circuit test port processing short-circuit test resistance
Voltage value, when collected voltage value is unsatisfactory for predeterminated voltage requirement, determine test short circuit;Wherein short-circuit test electricity
Resistance is connected between the short-circuit test port of test chip and the corresponding ports of protocol conversion chip.
In an alternative embodiment, when to test circuit execute in bit test, method further include:
Test chip detects the level change in its test port in place, and meets in the level change of test port in place
When preset condition, determine test circuit by detecting in place.
In an alternative embodiment, when executing the test of hardware fool proof to test circuit, method further include:
The level change that chip detects hardware fool proof port thereon is tested, and the level change in hardware fool proof port meets
When preset condition, determine that test circuit is tested by hardware fool proof;Or
When executing the test of software fool proof to test circuit, method further include:
Testing chip and detecting whether there is predetermined level on software fool proof port corresponding with test software has been downloaded thereon,
And there are when predetermined level, determine that test circuit passes through software fool proof on having downloaded test software corresponding software fool proof port
Test.
In an alternative embodiment, method further includes following at least one operation:
It tests chip and auditory cues is carried out to test result and/or test-types by buzzer circuit;
It tests chip and visual cues is carried out to test result and/or test-types by LED display circuit;Or
Test chip will export to external equipment the test log information of EMMC particle to be measured by serial port circuit.
It should be understood by those skilled in the art that, the embodiment of the present invention can provide as method, system or computer program
Product.Therefore, complete hardware embodiment, complete software embodiment or reality combining software and hardware aspects can be used in the present invention
Apply the form of example.Moreover, it wherein includes the computer of computer usable program code that the present invention, which can be used in one or more,
The computer program implemented in usable storage medium (including but not limited to magnetic disk storage, CD-ROM, optical memory etc.) produces
The form of product.
The present invention be referring to according to the method for the embodiment of the present invention, the process of equipment (system) and computer program product
Figure and/or block diagram describe.It should be understood that every one stream in flowchart and/or the block diagram can be realized by computer program instructions
The combination of process and/or box in journey and/or box and flowchart and/or the block diagram.It can provide these computer programs
Instruct the processor of general purpose computer, special purpose computer, Embedded Processor or other programmable data processing devices to produce
A raw machine, so that being generated by the instruction that computer or the processor of other programmable data processing devices execute for real
The device for the function of being specified in present one or more flows of the flowchart and/or one or more blocks of the block diagram.
These computer program instructions, which may also be stored in, is able to guide computer or other programmable data processing devices with spy
Determine in the computer-readable memory that mode works, so that it includes referring to that instruction stored in the computer readable memory, which generates,
Enable the manufacture of device, the command device realize in one box of one or more flows of the flowchart and/or block diagram or
The function of being specified in multiple boxes.
These computer program instructions also can be loaded onto a computer or other programmable data processing device, so that counting
Series of operation steps are executed on calculation machine or other programmable devices to generate computer implemented processing, thus in computer or
The instruction executed on other programmable devices is provided for realizing in one or more flows of the flowchart and/or block diagram one
The step of function of being specified in a box or multiple boxes.
In a typical configuration, calculating equipment includes one or more processors (CPU), input/output interface, net
Network interface and memory.
Memory may include the non-volatile memory in computer-readable medium, random access memory (RAM) and/or
The forms such as Nonvolatile memory, such as read-only memory (ROM) or flash memory (flash RAM).Memory is computer-readable medium
Example.
Computer-readable medium includes permanent and non-permanent, removable and non-removable media can be by any method
Or technology come realize information store.Information can be computer readable instructions, data structure, the module of program or other data.
The example of the storage medium of computer includes, but are not limited to phase change memory (PRAM), static random access memory (SRAM), moves
State random access memory (DRAM), other kinds of random access memory (RAM), read-only memory (ROM), electric erasable
Programmable read only memory (EEPROM), flash memory or other memory techniques, read-only disc read only memory (CD-ROM) (CD-ROM),
Digital versatile disc (DVD) or other optical storage, magnetic cassettes, tape magnetic disk storage or other magnetic storage devices
Or any other non-transmission medium, can be used for storage can be accessed by a computing device information.As defined in this article, it calculates
Machine readable medium does not include temporary computer readable media (transitorymedia), such as the data-signal and carrier wave of modulation.
It should also be noted that, the terms "include", "comprise" or its any other variant are intended to nonexcludability
It include so that the process, method, commodity or the equipment that include a series of elements not only include those elements, but also to wrap
Include other elements that are not explicitly listed, or further include for this process, method, commodity or equipment intrinsic want
Element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including element
There is also other identical elements in process, method, commodity or equipment.
The above is only embodiments herein, are not intended to limit this application.To those skilled in the art,
Various changes and changes are possible in this application.It is all within the spirit and principles of the present application made by any modification, equivalent replacement,
Improve etc., it should be included within the scope of the claims of this application.
Claims (15)
1. a kind of embedded multi-media card EMMC tests circuit characterized by comprising test chip, protocol conversion chip and
EMMC particle to be measured, the protocol conversion chip are connected between the test circuit and the EMMC particle to be measured;
The test chip is used to export the test for following local bus local bus agreement instruction, through the protocol conversion core
Piece be converted to follow EMMC agreement test instruction after be transmitted to the EMMC particle to be measured, with to the EMMC particle to be measured into
Row performance test;
The EMMC particle to be measured is used to execute the test for following EMMC agreement and instructs and export and follow EMMC agreement implementation knot
Fruit, it then follows EMMC agreement implementation result is converted to by the protocol conversion chip follows local bus agreement implementation result
After be transmitted to the test chip, so that the test chip is determined to the test result of the EMMC particle to be measured.
2. test circuit according to claim 1, which is characterized in that the protocol conversion chip includes that local bus bus connects
Mouthful and EMMC bus interface, simulate in the local bus bus interface and the test chip in the protocol conversion chip
The I/O interface of local bus bus connects, EMMC bus interface and the EMMC particle to be measured in the protocol conversion chip
Bus interface connection.
3. test circuit according to claim 1, which is characterized in that further include following at least one peripheral circuit: buzzer electricity
Road, LED display circuit or serial port circuit;
The buzzer circuit is used to carry out the sense of hearing to test result and/or category of test under the control of the test chip to mention
Show;
The LED display circuit is used to carry out vision to test result and/or category of test under the control of the test chip
Prompt;
The serial port circuit be used for it is described test chip control under by the test chip to the EMMC particle to be measured into
The log information of row test is exported to external equipment.
4. test circuit according to claim 1, which is characterized in that further include the first power circuit and second source circuit, institute
It states the first power circuit to be connected between the power port and ground connection of the test chip, for powering for the test chip;
The second source circuit connection is in the control port of the test chip and the protocol conversion chip and the EMMC to be measured
Between the power port of particle;
The test chip is for during the test by the second source circuit to the protocol conversion chip and described
EMMC particle to be measured carries out electric control up and down.
5. any one of -4 test circuit according to claim 1, which is characterized in that the test chip and the protocol conversion core
Piece integral packaging is test module;Or;The protocol conversion chip and the EMMC particle integral packaging to be measured are EMMC mould
Block.
6. a kind of EMMC test method, it is suitable for EMMC and tests circuit, which is characterized in that method includes:
Test chip output in test circuit follows the test instruction of local bus agreement, and converts through protocol conversion chip
It is transmitted to EMMC particle to be measured to follow after the test of EMMC agreement instructs, to carry out performance survey to the EMMC particle to be measured
Examination;
The test that the EMMC particle execution to be measured follows EMMC agreement, which is instructed and exported, follows the EMMC agreement implementation as a result, abiding by
Follow EMMC agreement implementation result be converted to by the protocol conversion chip follow local bus agreement implementation result after export
To the test chip;
The test chip is according to following the determination of local bus agreement implementation result to the test knot of the EMMC particle to be measured
Fruit.
7. method according to claim 6, which is characterized in that performance test comprises at least one of the following: readwrite tests, subregion pipe
Reason test, volume test format test.
8. method according to claim 7, which is characterized in that when performance test is that partition management is tested, test chip output
Follow the test instruction of local bus agreement, comprising:
The test chip output follows the partition management instruction and partition management state verification instruction of local bus agreement;
The test that the EMMC particle execution to be measured follows EMMC agreement, which instructs and generates output, follows EMMC agreement implementation knot
Fruit, comprising:
The EMMC particle to be measured executes the partition management instruction for following EMMC agreement, will be adjusted to adjust itself capacity
Status indicator value is written in the relevant register of partition management, and executes the partition management state for following EMMC agreement after restart
Test instruction is extracted status indicator value from the relevant register of its partition management, and is sent by the protocol conversion chip
To the test chip;
Wherein, when status indicator value is non-zero, indicate that the EMMC particle to be measured is tested by partition management.
9. method according to claim 7, which is characterized in that when performance test is volume test, test chip output is followed
The test of local bus agreement instructs, comprising:
The test chip output follows the volume test instruction of local bus agreement;
The test that the EMMC particle execution to be measured follows EMMC agreement, which instructs and generates output, follows EMMC agreement implementation knot
Fruit, comprising:
The EMMC particle to be measured executes the volume test instruction for following local bus agreement, extracts from its capability register
Capacity ident value, and the test chip is sent to by the protocol conversion chip;
The test chip is according to following the determination of local bus agreement implementation result to the test knot of the EMMC particle to be measured
Fruit, comprising:
The test chip determines the actual capacity of the EMMC particle to be measured according to capacity ident value.
10. according to the method for any one of claim 6~9, which is characterized in that performance test further includes frequency test, the side
Method further include:
The test chip utilizes between frequency detecting port processing protocol conversion chip and EMMC particle to be measured thereon in work
The working pulse signal generated during making;
The actual frequency of EMMC particle to be measured is determined according to working pulse signal;
When the actual frequency of the EMMC particle to be measured meets default operating frequency requirements, determine that the EMMC particle to be measured is logical
Overfrequency test.
11. according to the method for any one of claim 6-9, which is characterized in that the test chip output in test circuit follows
It further include executing following at least one to the switching performance of the test circuit to survey before the test instruction of local bus agreement
Examination: short-circuit test is tested in bit test, the test of hardware fool proof or software fool proof.
12. method according to claim 11, which is characterized in that when executing short-circuit test to the test circuit, the side
Method further include:
Under the EMMC particle off-position to be measured, the test chip utilizes its short-circuit test port processing short-circuit test electricity
Voltage value in resistance determines the test short circuit when collected voltage value is unsatisfactory for predeterminated voltage requirement;Wherein institute
State short-circuit test resistance be connected to it is described test chip short-circuit test port and the protocol conversion chip corresponding ports it
Between.
13. method according to claim 11, which is characterized in that when to the test circuit execute in bit test, the side
Method further include:
The test chip detects the level change in its test port in place, and meets in the level change of test port in place
When preset condition, determine the test circuit by detecting in place.
14. method according to claim 11, which is characterized in that when executing the test of hardware fool proof to the test circuit, institute
State method further include:
The test chip detects the level change of hardware fool proof port thereon, and the level change in hardware fool proof port meets
When preset condition, determine that the test circuit is tested by hardware fool proof;Or
When executing the test of software fool proof to the test circuit, method further include:
The test chip, which detects, whether there is predetermined level on software fool proof port corresponding with test software has been downloaded thereon,
And there are when predetermined level, determine that the test circuit passes through software on having downloaded test software corresponding software fool proof port
Fool proof test.
15. according to the method for any one of claim 6-9, which is characterized in that the method also includes following at least one operations:
The test chip carries out auditory cues to test result and/or test-types by buzzer circuit;
The test chip carries out visual cues to test result and/or test-types by LED display circuit;Or
The test chip will export to external equipment the test log information of the EMMC particle to be measured by serial port circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201811239193.0A CN109490751A (en) | 2018-10-23 | 2018-10-23 | A kind of EMMC test method and test circuit |
Applications Claiming Priority (1)
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CN114048520A (en) * | 2022-01-11 | 2022-02-15 | 沐曦集成电路(上海)有限公司 | Detection system for cross-chip access control |
CN115308640A (en) * | 2022-08-17 | 2022-11-08 | 东南大学 | MMC submodule open-circuit fault positioning method based on data mining |
CN116469452A (en) * | 2023-03-31 | 2023-07-21 | 深圳市晶存科技有限公司 | Method, system, device and storage medium for testing storage chip |
CN116820898A (en) * | 2023-08-31 | 2023-09-29 | 合肥康芯威存储技术有限公司 | Method and system for monitoring running state of eMMC and computer readable storage medium |
CN117060344A (en) * | 2023-08-18 | 2023-11-14 | 合肥开梦科技有限责任公司 | Power supply control circuit |
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KR20140035765A (en) * | 2012-09-14 | 2014-03-24 | 삼성전자주식회사 | Embedded multimedia card(emmc), host for controlling the emmc, and method for operating emmc system including the emmc and the host |
CN204272318U (en) * | 2014-12-16 | 2015-04-15 | 深圳创维-Rgb电子有限公司 | EMMC tool and television system |
CN106814302A (en) * | 2015-12-02 | 2017-06-09 | 北京京存技术有限公司 | A kind of eMMC test circuits |
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Cited By (9)
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CN114048520A (en) * | 2022-01-11 | 2022-02-15 | 沐曦集成电路(上海)有限公司 | Detection system for cross-chip access control |
CN114048520B (en) * | 2022-01-11 | 2022-04-08 | 沐曦集成电路(上海)有限公司 | Detection system for cross-chip access control |
CN115308640A (en) * | 2022-08-17 | 2022-11-08 | 东南大学 | MMC submodule open-circuit fault positioning method based on data mining |
CN116469452A (en) * | 2023-03-31 | 2023-07-21 | 深圳市晶存科技有限公司 | Method, system, device and storage medium for testing storage chip |
CN116469452B (en) * | 2023-03-31 | 2024-03-19 | 深圳市晶存科技有限公司 | Method, system, device and storage medium for testing storage chip |
CN117060344A (en) * | 2023-08-18 | 2023-11-14 | 合肥开梦科技有限责任公司 | Power supply control circuit |
CN117060344B (en) * | 2023-08-18 | 2024-05-24 | 合肥开梦科技有限责任公司 | Power supply control circuit |
CN116820898A (en) * | 2023-08-31 | 2023-09-29 | 合肥康芯威存储技术有限公司 | Method and system for monitoring running state of eMMC and computer readable storage medium |
CN116820898B (en) * | 2023-08-31 | 2024-01-02 | 合肥康芯威存储技术有限公司 | Method and system for monitoring running state of eMMC and computer readable storage medium |
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