CN109463022B - Battery pack circuit, capacity coefficient detection method, and storage medium - Google Patents

Abstract

The open-circuit voltage of the standard cell 20st changes along the SOC/standard cell voltage characteristic curve, while the open-circuit voltage of the offset cell 20sh changes along the SOC/offset cell voltage characteristic curve. The SOC/offset cell voltage characteristic curve is superimposed on a curve obtained by offsetting the SOC/standard cell voltage characteristic curve by a predetermined amount in the horizontal axis direction. The system control circuit 16 acquires an SOC/potential difference characteristic curve indicating a change in the potential difference between the standard cell 20st and the offset cell 20sh with respect to the SOC from the memory 16m, and calculates the potential difference at the current time between the standard cell 20st and the offset cell 20 sh. The system control circuit 16 also compares the calculated current-time potential difference with the SOC/potential difference characteristic curve, and detects the current-time SOC value of the standard cell 20 st.

Description

Battery pack circuit, capacity coefficient detection method, and storage medium

Technical Field

The present invention relates to a battery pack circuit, and more particularly, to a battery pack circuit that controls charging and discharging of a battery pack formed of a plurality of battery cells having a standard capacity. The present invention also relates to a capacity coefficient detection method and a capacity coefficient detection program for detecting a capacity coefficient of a battery cell constituting a battery pack.

Background

When detecting the SOC (State Of Charge) Of a battery, a voltage-SOC table is generally prepared, and a voltage obtained by measuring the battery is compared with the voltage-SOC table.

However, for a battery having a large potential plateau region such as the positive LFP-negative Gr-based battery, it is not easy to detect the SOC in the potential plateau (plateau) region. That is, actually, the SOC of the potential plateau region is detected based on the integrated value of the SOC detected in the region other than the potential plateau region and the subsequent current amount. In such a method, there is a limit to the detection accuracy of the SOC.

Similarly to SOH (State Of Health), a capacity coefficient Of a battery, specifically, a degree Of deterioration, is detected to be decreased with deterioration Δ capacity/Δ V (which is a ratio Of a fluctuation range Of a capacity to a fluctuation range Of a potential) in a general battery, and the State Of deterioration Of the battery can be determined. However, in the positive LFP-negative Gr battery, only the potential plateau region recedes with deterioration, and there is no change in Δ capacity/Δ V, so it is impossible to determine the state of deterioration of the battery. That is, in a battery having a large potential plateau region, since the current value is accumulated and the SOH is quantified, there is a limit to the SOH detection accuracy.

In addition, in patent document 1, a lithium ion secondary battery for depth of charge detection (detection cell) and a lithium ion secondary battery for non-depth of charge detection (normal cell) having different initial battery capacities are connected in series to constitute a battery pack. Thus, even during large current charging and discharging, the charging depth can be evaluated with high accuracy without requiring a complicated determination circuit.

Documents of the prior art

Patent document

Patent document 1: japanese laid-open patent publication No. 2013-89522

Disclosure of Invention

Problems to be solved by the invention

In order to stably use the battery pack of patent document 1 for a long period of time, a voltage-SOC table based on the deterioration state of the detection cell and a voltage-SOC table based on the deterioration state of the normal cell are prepared, and it is necessary to monitor the deterioration state of each cell and reset the SOC (make the SOC uniform between the cells).

However, monitoring and resetting for two types of cells having different performance and degradation characteristics are complicated. In addition, in a power supply type battery in which a large current flows at a low resistance, it is difficult to design two types of battery cells having different material types. In addition, in the conventional wound can type battery, the can has no degree of freedom, and it is not easy to design a variety such as increasing the capacity. Therefore, the battery pack as in patent document 1 lacks practicality.

Therefore, a main object of the present invention is to provide a battery pack circuit capable of detecting a capacity coefficient simply and accurately even in a potential plateau region.

Means for solving the problems

The present invention relates to a battery pack circuit (10: corresponding reference numerals in the embodiments, the same applies hereinafter) that controls charging and discharging of a battery pack (20) configured of a standard cell (20st) in which a capacity coefficient/voltage characteristic curve indicating a change in voltage with respect to a capacity coefficient allocated on a reference axis is expressed as a standard curve (CVst), and a specific cell (20sh) in which a capacity coefficient/voltage characteristic curve is expressed as a deviation curve (CVsh) that deviates the standard curve by a predetermined amount in an extending direction of the reference axis, the battery pack circuit (10) including: a capacity coefficient/potential difference characteristic curve acquisition means (S1, S31) for acquiring a capacity coefficient/potential difference characteristic curve (CVdf) indicating a change in the potential difference between the standard cell and the specific cell with respect to the capacity coefficient from the memory (16 m); a potential difference detection unit (S19, S37) for detecting the potential difference between the standard battery cell and the specific battery cell; and capacity coefficient value detection means (S21, S39) for detecting a capacity coefficient value of the standard battery cell at the current time by comparing the potential difference detected by the potential difference detection means with the capacity coefficient/potential difference characteristic curve acquired by the capacity coefficient/potential difference characteristic curve acquisition means.

The capacity coefficient/voltage characteristic curve of the standard cell is expressed as a standard curve, while the capacity coefficient/voltage characteristic curve of the specific cell is expressed as a deviation curve obtained by deviating the standard curve by a predetermined amount in the extending direction of the reference axis. Therefore, even in a capacity coefficient region (potential plateau region) in which the voltage fluctuation of the standard cell is small, the potential difference can be largely fluctuated in the capacity coefficient/potential difference characteristic curve. By referring to such a capacity coefficient/potential difference characteristic curve, the capacity coefficient of the standard cell can be detected easily and with high accuracy even in the potential plateau region.

Preferably, the battery pack circuit further includes: capacity coefficient/voltage characteristic curve acquisition means (S1, S31) for acquiring at least one of a standard curve (CVst) and an offset curve (CVtw) from a memory; and capacity coefficient value selection means (S23, S25, S41, S43) for selecting a unique capacity coefficient value based on the curve acquired by the capacity coefficient/voltage characteristic curve acquisition means when the number of capacity coefficient values detected by the capacity coefficient value detection means is two or more.

By referring to the standard curve and/or the offset curve, the possibility that the capacity coefficient value of the standard battery cell is erroneously detected can be reduced.

Preferably, the battery pack circuit further includes a capacity coefficient value output unit (S27) that outputs the capacity coefficient value detected by the capacity coefficient value detection unit. This makes it possible to easily confirm the capacity coefficient value of the standard battery cell.

Preferably, the number of the standard battery cells is plural, the potential difference detecting unit and the capacity coefficient value detecting unit each perform the detection process for each of the standard battery cells, and the battery pack circuit further includes a balance adjusting unit (S49 to S63) that adjusts the charge balance among the standard battery cells based on the capacity coefficient value detected by the capacity coefficient value detecting unit.

By referring to the capacity coefficient/potential difference characteristic curve, the charge balance between the standard cells can be adjusted even in the potential plateau region.

Preferably, the capacity coefficient is a coefficient indicating the capacity of the target cell at the present time with reference to the full charge capacity of the target cell before deterioration.

A capacity coefficient detection method according to the present invention is executed by a battery pack circuit (10) that controls charging and discharging of a battery pack (20) including a standard cell (20st) in which a capacity coefficient/voltage characteristic curve indicating a change in voltage with respect to a capacity coefficient allocated to a reference axis is expressed as a standard curve (CVst) and a specific cell (20sh) in which a capacity coefficient/voltage characteristic curve is expressed as a deviation curve (CVsh) obtained by deviating the standard curve by a predetermined amount in an extending direction of the reference axis, the capacity coefficient detection method including: a capacity coefficient/potential difference characteristic curve acquisition step (S1, S31) for acquiring a capacity coefficient/potential difference characteristic curve (CVdf) indicating a change in the potential difference between the standard cell and the specific cell with respect to the capacity coefficient from the memory (16 m); a potential difference detection step (S19, S37) for detecting the potential difference between the standard battery cell and the specific battery cell; and a capacity coefficient value detection step (S21, S39) for detecting the capacity coefficient value of the standard cell at the current time by comparing the potential difference detected in the potential difference detection step with the capacity coefficient/potential difference characteristic curve acquired in the capacity coefficient/potential difference characteristic curve acquisition step.

A capacity coefficient detection program according to the present invention is a capacity coefficient detection program in which a battery pack circuit (10) controls charging and discharging of a battery pack (20) including a standard cell (20st) in which a capacity coefficient/voltage characteristic curve indicating a change in voltage with respect to a capacity coefficient allocated to a reference axis is expressed as a standard curve (CVst) and a specific cell (20sh) in which a capacity coefficient/voltage characteristic curve is expressed as a deviation curve (CVsh) obtained by shifting the standard curve by a predetermined amount in an extending direction of the reference axis, the capacity coefficient detection program causing a processor (16) of the battery pack circuit (10) to execute: a capacity coefficient/potential difference characteristic curve acquisition step (S1, S31) for acquiring a capacity coefficient/potential difference characteristic curve (CVdf) from a memory (16m) that indicates a change in the potential difference between the standard cell and the specific cell with respect to the capacity coefficient; a potential difference detection step (S19, S37) for detecting the potential difference between the standard battery cell and the specific battery cell; and a capacity coefficient value detection step (S21, S39) for comparing the potential difference detected in the potential difference detection step with the capacity coefficient/potential difference characteristic curve acquired in the capacity coefficient/potential difference characteristic curve acquisition step, and detecting the capacity coefficient value of the standard battery cell at the current time.

Effects of the invention

According to the present invention, the capacitance coefficient can be detected easily and with high accuracy even in the potential plateau region.

The above objects, other objects, features and advantages of the present invention can be further understood from the following detailed description of the embodiments with reference to the accompanying drawings.

Drawings

Fig. 1 is a diagram showing the structure of the battery pack circuit and its surroundings of this embodiment.

Fig. 2 is a circuit diagram showing an example of the structure of a standard battery cell.

Fig. 3 is a graph showing an example of the change in open circuit voltage with respect to SOC for an offset cell or a standard cell.

Fig. 4 is a diagram showing an example of a change in the potential difference between the offset cell and the standard cell with respect to the SOC for the offset cell or the standard cell.

Fig. 5 is a diagram showing an example of a deterioration change in output characteristics for an offset cell or a standard cell.

Fig. 6 is a flowchart showing a part of the operation of the system control circuit shown in fig. 1.

Fig. 7 is a flowchart showing another part of the operation of the system control circuit shown in fig. 1.

Fig. 8 is a flowchart showing another part of the operation of the system control circuit shown in fig. 1.

Fig. 9 is a flowchart showing a further part of the operation of the system control circuit shown in fig. 1.

Fig. 10 is a flowchart showing another part of the operation of the system control circuit shown in fig. 1.

Fig. 11 is a graph showing an example of variation in power with respect to SOC at the time of 47A fixed current output for a battery pack composed of eight standard cells or a battery pack composed of seven standard cells and one offset cell.

Fig. 12 is a flowchart showing a part of the operation of the system control circuit according to another embodiment.

Detailed Description

Referring to fig. 1, the battery pack circuit 10 of this embodiment includes a system control circuit 16 that controls charging and discharging of a battery pack 20 through a charging and discharging circuit 18. The charge/discharge circuit 18 charges the battery pack 20 with the electric power supplied from the system power supply 12 or discharges the electric power of the battery pack 20 to the load 14 under the control of the system control circuit 16.

The battery pack 20 is formed by connecting Kmax standard cells 20st and a single shift cell (specific cell) 20sh in series. The standard cell 20st and the offset cell 20sh are formed by stacking a positive electrode and a negative electrode with a separator interposed therebetween, housing the stacked layers, filling the electrolyte, and sealing the stack. Here, the constant Kmax is an integer of 2 or more, for example, "7". The standard cell 20st and the offset cell 20sh both have standard capacities, and curves indicating changes in Open Circuit Voltage (OCV) with respect to SOC differ between the standard cell 20st and the offset cell 20sh (described in detail later).

Specifically, the standard battery cell 20st is configured as shown in fig. 2. According to fig. 2, one end of the switch SWst is connected to the positive electrode of the battery cell Est, and the other end of the switch SWst is connected to one end of the external short-circuit resistor Rst. The other end of the external short-circuit resistor Rst is connected to the negative electrode of the battery cell Est. When the switch SWst is turned on, the value of the current discharged from the battery cell Est is defined by the terminal voltage value of the battery cell Est and the value of the external short-circuit resistor Rst.

The SOC is present as a capacity coefficient for indicating the respective capacities of the standard cell 20st and the offset cell 20sh, and particularly in this embodiment, the SOC of the standard cell 20st is defined as "the charge capacity of the standard cell 20st at the present time with reference to the full charge capacity of the standard cell 20st before deterioration", and the SOC of the offset cell 20sh is defined as "the charge capacity of the offset cell 20sh at the present time with reference to the full charge capacity of the offset cell 20sh before deterioration".

For both the standard cell 20st and the offset cell 20sh, the positive electrode and the negative electrode were made of olivine-type lithium iron phosphate (LFP) and graphite (Gr), respectively, and the AC ratio (the ratio of the facing charge capacities of the positive electrode and the negative electrode) was "1.75".

The region in which the SOC gradient of the positive electrode is 2[ mV/SOC% ] or less is 30% or more of the effective SOC of the cell, and the region in which the SOC gradient of the negative electrode is 2.5[ mV/SOC% ] or more is 30% or more of the effective SOC of the cell. The capacity was 4.5 Ah. That is, the material and design of the offset cell 20sh are the same as those of the standard cell 20 st.

Referring to fig. 3, a curve CVst is a curve representing a change in the open-circuit voltage of the standard cell 20st with respect to the SOC of the standard cell 20st allocated on the horizontal axis (reference axis), and a curve CVsh is a curve representing a change in the open-circuit voltage of the offset cell 20sh with respect to the SOC of the offset cell 20sh allocated on the horizontal axis. That is, the curves CVst and CVsh both represent the change in the open-circuit voltage of the subject battery cell with respect to the SOC of the subject battery cell.

According to fig. 3, the open voltage value of the standard cell 20st is distributed in the SOC range from 0% to 100%, and on the other hand, the open voltage value of the offset cell 20sh is distributed in the SOC range from-30% to 70%. However, since the material and design of the offset cell 20sh are the same as those of the standard cell 20st, the curve CVsh overlaps with a curve obtained by offsetting the curve CVst by 30 points (predetermined amount) to the negative side in the horizontal axis direction.

Hereinafter, the curve CVst is defined as "SOC/standard cell voltage characteristic curve", and the curve CVsh is defined as "SOC/offset cell voltage characteristic curve". The SOC/standard cell voltage characteristic curve CVst and the SOC/offset cell voltage characteristic curve CVsh may be referred to as a "standard curve" and an "offset curve", respectively.

As is clear from fig. 3, the SOC/standard cell voltage characteristic curve CVst and the SOC/offset cell voltage characteristic curve CVsh each have a potential plateau region (SOC region with small voltage variation). However, since the SOC/standard cell voltage characteristic curve CVst and the SOC/offset cell voltage characteristic curve CVsh have the above-described relationship, the position of the potential plateau region differs between the SOC/standard cell voltage characteristic curve CVst and the SOC/offset cell voltage characteristic curve CVsh.

Note that since the battery pack 20 is provided with Kmax standard cells 20st and there is an individual difference between the standard cells 20st, the relationship between the open circuit voltage of the standard cell 20st and the SOC of the standard cell 20st slightly differs for each standard cell 20 st.

The relationship between the open circuit voltage of the standard cell 20st and the SOC of the standard cell 20st varies depending on the operating environment of the battery pack circuit 10 (the temperature of the battery pack 20, the type of charge/discharge), and the relationship between the open circuit voltage of the offset cell 20sh and the SOC of the offset cell 20sh also varies depending on the operating environment of the battery pack circuit 10.

In addition, the memory 16m stores in advance SOC/standard cell voltage characteristic curves CVst equal to Kmax × the number of operating environments and SOC/offset cell voltage characteristic curves CVsh equal to the number of operating environments.

Referring to fig. 4, a curve CVdf is a curve representing a change in SOC of the standard cell 20st relative to the SOC of the standard cell 20st, in which the SOC is in the SOC region of 0% or more and less than 70%. The difference in potential between the standard cell 20st and the offset cell 20sh reflects the difference between the SOC/standard cell voltage characteristic curve CVst and the SOC/offset cell voltage characteristic curve CVsh, and fluctuates greatly except for a region representing a very small portion of the value of the SOC in the vicinity of 60%.

That is, the curve CVdf has a plurality of extreme values, and the plateau region appears only in a very small portion of the region. This means that only a slight error occurs in the vicinity of 60% when the SOC value is detected by the reference curve CVdf. Hereinafter, such a curve CVdf is defined as an "SOC potential difference characteristic curve".

As described above, the number of SOC/standard cell voltage characteristic curves CVst is equal to Kmax × the number of operating environments, and the number of SOC/offset cell voltage characteristic curves CVsh is equal to the number of operating environments. Therefore, the memory 16m stores in advance the SOC/potential difference characteristic curves CVdf in an amount equal to Kmax × the number of operating environments.

However, the standard cell 20st and the offset cell 20sh using common materials and designs undergo aging in the same manner as each other. For example, when the output characteristic of the standard cell 20st gradually deteriorates to 58%, the SOC/standard cell voltage characteristic curve CVst shows the locus shown in fig. 5. The offset cell 20sh also shows the same trajectory with deterioration. That is, the SOC/standard cell voltage characteristic curve CVst and the SOC/offset cell voltage characteristic curve CVsh are compressed at a predetermined compression rate in a region other than the low SOC region.

Note that the SOC/standard cell voltage characteristic curve CVst shown in fig. 5 indicates a locus where the output characteristics deteriorate in the order of 100%, 97%, 90%, 83%, 73%, 64%, and 58%.

The system control circuit (processor) 26 repeatedly detects the SOC value of the standard cell 20st according to the flowcharts shown in fig. 6 to 7, and repeatedly adjusts the charge balance of the standard cell 20st and the offset cell 20sh according to the flowcharts shown in fig. 8 to 10. Control programs corresponding to these flowcharts are also stored in the memory 16 m.

Referring to fig. 6, in step S1, the SOC/standard cell voltage characteristic curve CVst, the SOC/offset cell voltage characteristic curve CVsh, and the SOC/potential difference characteristic curve CVdf corresponding to the operating environment at the current time are acquired from the memory 16 m.

For the SOC/standard cell voltage characteristic curve CVst, a curve indicating the SOC variation of the open-circuit voltage of the reference standard cell 20st with respect to the reference standard cell (the standard cell 20st specified in advance from the Kmax standard cells 20st) is obtained. Further, a curve indicating a change in the potential difference between the offset cell 20sh and the reference standard cell 20st with respect to the SOC of the reference standard cell 20st is obtained for the SOC/potential difference characteristic curve CVdf.

In step S3, the open circuit voltage that deviates from the current time of the battery cell 20sh is detected. In step S5, it is determined whether or not the SOC value corresponding to the detected open circuit voltage belongs to the potential plateau region on the SOC/offset cell voltage characteristic curve CVsh acquired in step S1. If the determination result is no, the process proceeds to step S7, and if the determination result is yes, the process proceeds to step S11.

In step S7, the open-circuit voltage detected in step S3 is compared with the SOC/offset cell voltage characteristic curve CVsh acquired in step S1, and the SOC value of the offset cell 20sh at the current time is detected. In step S9, the value obtained by adding 30 points to the detected SOC value is output from a display (not shown) as the SOC value of the standard cell 20st at the current time, and the current SOC detection process is terminated.

In step S11, the open circuit voltage at the present time of the reference standard battery cell 20st is detected. In step S13, it is determined whether or not the SOC value corresponding to the detected open circuit voltage belongs to the potential plateau region on the SOC/standard cell voltage characteristic curve CVst acquired in step S1. If the determination result is no, the process proceeds to step S15, and if the determination result is yes, the process proceeds to step S19.

In step S15, the open-circuit voltage detected in step S11 is collated with the SOC/standard cell voltage characteristic curve CVst acquired in step S1, and the SOC value at the current time of the reference standard cell 20st is detected. In step S17, the detected SOC value is output from the display as the SOC value of the standard cell 20st at the current time, and the current SOC detection process is terminated.

In step S19 shown in fig. 7, the potential difference at the current time between the offset cell 20sh and the reference standard cell 20st is calculated, and one or two or more SOC values corresponding to the potential difference calculated in step S21 are detected on the SOC/potential difference characteristic curve CVdf acquired in step S1.

The SOC-potential-difference characteristic curve CVdf acquired at step S1 appears as a curve shown in fig. 4, and if the potential difference calculated at step S19 is 0.05V, two SOC values are detected at step S21.

It is determined in step S23 whether or not the number of detected SOC values is two or more, and if the determination result is no, the routine proceeds directly to step S27, whereas if the determination result is yes, the routine proceeds to step S27 after the following processing is executed in step S25.

That is, in step S25, a unique SOC value corresponding to the open-circuit voltage of the reference standard cell 20st is selected with reference to at least one of the SOC/standard cell voltage characteristic curve CVst and the SOC/offset cell voltage characteristic curve CVsh acquired in step S1. As is apparent from fig. 3 and 4, when the open circuit voltage of the reference standard cell 20st is 3.25V and the open circuit voltage of the offset cell 20sh is 3.3V, "35%" is selected as the unique SOC value in step S25.

In step S27, the unique SOC value thus detected or selected is output from the display, and the present SOC detection process is terminated.

Referring to fig. 8, in step S31, Kmax SOC/standard cell voltage characteristic curves CVst corresponding to the operating environment at the present time, a single SOC/offset cell voltage characteristic curve CVsh, and Kmax SOC/potential difference characteristic curves CVdf corresponding to the operating environment at the present time are acquired from the memory 16 m.

In step S33, the open circuit voltages at the present time of each of the Kmax standard cells 20st and the single offset cell 20sh are detected. The variable K is set to "1" in step S35, and the potential difference at the present time between the offset cell 20sh and the kth standard cell 20st is calculated in step S37. In step S39, one or more SOC values corresponding to the calculated potential difference are detected on the K-th SOC potential-difference characteristic curve CVdf acquired in step S31.

It is determined in step S41 whether or not the number of detected SOC values is two or more, and if the determination result is no, the routine proceeds directly to step S45, whereas if the determination result is yes, the routine proceeds to step S45 after the following processing is executed in step S43.

That is, in step S43, a unique SOC value corresponding to the open-circuit voltage of the kth standard cell 20st is selected with reference to at least one of the kth SOC/standard cell voltage characteristic curve CVst and the SOC/offset cell voltage characteristic curve CVsh acquired in step S31.

The variable K is incremented in step S45, and it is determined whether the variable K exceeds the constant Kmax in step S47. If the determination result is no, the process returns to step S37, and if the determination result is yes, the process proceeds to step S49.

In step S49, a standard cell 20st indicating that the SOC value is the minimum value is detected from among Kmax standard cells 20 st. In step S51, the identification number of the detected standard battery cell 20st is set to the variable L. In step S53, the variable K is set to "1", and in step S55, it is determined whether the variable K is equal to the variable L. If the determination result is yes, the process proceeds directly to step S61, whereas if the determination result is no, the process proceeds to step S61 after the following processes are executed in steps S57 to S59.

In step S57, the difference between the SOC value of the kth standard cell 20st and the minimum SOC value (the SOC value of the lth standard cell 20st) is calculated. In step S59, the balance current value is calculated from the value of the external short-circuit resistance Rst and the characteristics of the battery cell Est while the switch SWst is turned on, and the discharge time of the kth standard battery cell 20st is calculated based on the calculated balance current value and the difference calculated in step S57, with the kth standard battery cell 20st being the target. The calculated discharge time is a time until the SOC value of the kth standard cell 20st is lower than the minimum SOC value.

The variable K is incremented in step S61, and it is determined whether the variable K exceeds the constant Kmax in step S63. If the determination result is no, the process returns to step S55, and if the determination result is yes, the process proceeds to step S65. In step S65, the switch SWst is turned on for the standard cells 20st other than the L-th standard cell 20 st. Thereby, discharge is started.

In step S67, the variable K is set to "1", in step S69, it is determined whether the variable K is equal to the variable L, and in step S71, it is determined whether the set discharge time has elapsed for the K-th standard cell 20 st. If the determination result of step S69 is yes or the determination result of step S71 is no, the process proceeds directly to step S75, and if the determination result of step S69 is no and the determination result of step S71 is yes, the process ends the discharging operation of the K-th standard cell 20st (i.e., turns off the switch SWst provided in the K-th standard cell 20st) in step S73, and then the process proceeds to step S75.

It is determined whether the variable K has reached the constant Kmax in step S75, and it is determined whether the discharge operation of all of the Kmax standard cells 20st has ended in step S79. If the result of the determination at step S75 is NO, the variable K is incremented at step S77, and then the process returns to step S69.

If the judgment in the step S75 is YES and the judgment in the step S79 is NO, the process returns to the step S67. If the determination result at step S75 and the determination result at step S79 are both yes, the current balance adjustment processing ends.

As is clear from the above description, the open-circuit voltage of the standard cell 20st changes along the SOC/standard cell voltage characteristic curve CVst, while the open-circuit voltage of the offset cell 20sh changes along the SOC/offset cell voltage characteristic curve CVsh. Here, the SOC/offset cell voltage characteristic curve CVsh overlaps a curve obtained by offsetting the SOC/standard cell voltage characteristic curve CVst by a predetermined amount in the horizontal axis direction.

When detecting the SOC of the reference standard cell 20st (the standard cell 20st specified in advance from the Kmax standard cells 20st), the system control circuit 16 acquires from the memory 16m an SOC/potential difference characteristic curve CVdf indicating a change in the potential difference between the reference standard cell 20st and the offset cell 20sh with respect to the SOC (S1), and calculates the potential difference at the current time between the reference standard cell 20st and the offset cell 20sh (S19). The system control circuit 16 also compares the calculated current-time potential difference with the SOC/potential-difference characteristic curve CVdf, and detects the current-time SOC value of the reference standard cell 20st (S21).

In adjusting the charge balance between the Kmax standard cells 20st, the system control circuit 16 also acquires Kmax SOC/potential difference characteristic curves CVdf corresponding to the Mmax standard cells 20st from the memory 16m (S31), detects a potential difference between each of the K-th (K: 1 to Kmax) standard cells 20st and the offset cell 20sh (S37), and then collates the detected potential difference with the K-th SOC/potential difference characteristic curve CVdf and detects an SOC value of the K-th standard cell 20st (S39).

The SOC/offset cell voltage characteristic curve CVsh is superimposed on a curve obtained by offsetting the SOC/standard cell voltage characteristic curve CVst by a predetermined amount in the horizontal axis direction. Therefore, even in a capacity coefficient region (potential plateau region) where the voltage of the standard cell 20st fluctuates little, the potential difference can be greatly fluctuated in the SOC/potential difference characteristic curve CVdf. By referring to the SOC/potential difference characteristic curve CVdf, the SOC value of the standard cell 20st can be detected easily and accurately even in the potential plateau region, and the charge balance between the standard cells 20st can be adjusted based on the detected SOC value.

In addition, since the material and design of the offset cell 20sh are the same as those of the standard cell 20st, the same rate characteristic and life characteristic can be obtained. This can suppress the workload for re-balancing the offset cell 20sh and the standard cell 20 st.

For reference, a power change when a fixed current is output from the battery pack 20 in a state where a 47A load is applied to the battery pack 20 of this embodiment and a power change when a fixed current is output from the reference battery pack in a state where a 47A load is applied to the reference battery pack composed of eight standard battery cells 20st are shown in fig. 11. According to fig. 11, the former power varies along the curve CWsh, while the latter power varies along the curve CWst.

Since the SOC/offset cell voltage characteristic curve CVsh changes as shown in fig. 3, the total voltage of the assembled battery 20 rises in the low SOC region, thereby improving the output characteristic of the assembled battery 20.

In addition, the rise in the total voltage of the battery pack 20 in the low SOC region means that the total voltage of the battery pack 20 is smoothed in a region where the gradient is large outside the plateau region. Thus, the battery pack 20 has high potential stability and a wide SOC detection range.

In this embodiment, the number of offset cells 20sh provided in the assembled battery 20 is one, but two or more offset cells 20sh may be provided in the assembled battery 20. In this embodiment, the offset amount is set to 30%, but the offset amount may be appropriately changed within a range of 10% or more and less than 50%.

In addition, in this embodiment, although a single battery pack 20 is provided in the battery pack circuit 10, a plurality of battery packs 20 may be connected in parallel or in series, and the processes shown in fig. 6 to 10 may be executed by the respective battery packs 20.

In addition, in this embodiment, although the SOC value of the standard battery cell 20st is detected, alternatively, the SOH value of the standard battery cell 20st may be detected.

Note that the SOH of the standard cell 20st can be defined as "the full charge capacity of the standard cell 20st at the present time based on the full charge capacity of the standard cell 20st before degradation", and the SOH of the offset cell 20sh can be defined as "the full charge capacity of the offset cell 20sh at the present time based on the full charge capacity of the offset cell 20sh before degradation".

When detecting such a capacity coefficient, it is necessary to store in the memory 16m an SOH offset cell voltage characteristic curve CVsh 'indicating the relationship between the open circuit voltage of the offset cell 20sh and the SOH of the offset cell 20sh (the number of stored curves CVsh' is the number of operating environments), and to execute the processing shown in fig. 12 instead of the processing shown in fig. 6 to 7. Due to the nature of SOH, the balance adjustment as shown in fig. 8 to 10 is not necessary.

Referring to fig. 12, in step S81, the SOH offset cell voltage characteristic curve CVsh' corresponding to the operating environment at the present time is acquired from the memory 16 m. The variable K is set to "1" in step S83, and it is determined whether the kth standard cell 20st is in a full charge state in step S85.

If the determination result is yes, the process proceeds to step S87, and the open circuit voltage at the current time of the offset cell 20sh is detected. In step S89, the open circuit voltage detected in step S87 is compared with the SOH offset cell voltage characteristic curve CVsh' acquired in step S81, and the SOH value at the current time of the offset cell 20sh is detected. In step S91, the value obtained by adding 30 points to the detected SOH value is output from the display as the SOH value at the current time of the kth standard cell 20 st. If the output is completed, the process proceeds to step S95.

If the result of the determination at step S85 is no, it proceeds to step S93, and the SOH value obtained by the process at the last step S91 targeting the kth standard cell is output from the display. If the output is completed, the process proceeds to step S95.

The variable K is incremented in step S95, and it is determined whether the variable K exceeds the constant Kmax in step S97. If the determination result is no, the process returns to step S85, whereas if the determination result is yes, the SOH detection process of this time is ended.

Description of the reference numerals

10 … battery pack circuit

12 … system power supply

14 … load

16 … system control circuit

18 … charging and discharging circuit

20 … battery pack

20sh … offset cell

20st … Standard cell.

Claims (7)

1. A battery pack circuit for controlling charging and discharging of a battery pack including a standard cell in which a capacity coefficient voltage characteristic curve representing a standard curve showing a change in an open circuit voltage with respect to a capacity coefficient allocated on a reference axis and a specific cell in which the capacity coefficient voltage characteristic curve representing a deviation curve obtained by deviating the standard curve by a predetermined amount in an extending direction of the reference axis is a state of charge (SOC) or a state of health (SOH),

the battery pack circuit includes:

a capacity coefficient potential difference characteristic curve acquiring unit that acquires, from a memory, a capacity coefficient potential difference characteristic curve that represents a change in potential difference between the standard battery cell and the specific battery cell with respect to the capacity coefficient;

a potential difference detection unit that detects a potential difference between the standard battery cell and the specific battery cell; and

and a capacity coefficient value detection unit that detects a capacity coefficient value of the standard battery cell at the current time by comparing the potential difference detected by the potential difference detection unit with the capacity coefficient potential difference characteristic curve acquired by the capacity coefficient potential difference characteristic curve acquisition unit.

2. The battery pack circuit according to claim 1,

the battery pack circuit further includes:

a capacity coefficient voltage characteristic curve acquiring unit that acquires at least one of the standard curve and the offset curve from the memory; and

and a capacity coefficient value selection unit configured to select a unique capacity coefficient value based on the curve acquired by the capacity coefficient voltage characteristic curve acquisition unit when the number of capacity coefficient values detected by the capacity coefficient value detection unit is two or more.

3. The battery pack circuit according to claim 1 or 2,

the battery pack circuit further includes a capacity coefficient value output unit that outputs the capacity coefficient value detected by the capacity coefficient value detection unit.

4. The battery pack circuit according to claim 1 or 2,

the number of the standard battery cells is plural,

the potential difference detection unit and the capacity coefficient value detection unit each perform detection processing for each of the standard battery cells,

the battery pack circuit further includes a balance adjustment unit that adjusts charge balance among the standard battery cells based on the capacity coefficient value detected by the capacity coefficient value detection unit.

5. The battery pack circuit according to claim 1 or 2,

the capacity coefficient is a coefficient indicating the capacity of the target cell at the present time based on the full charge capacity of the target cell before deterioration.

6. A capacity coefficient detection method is executed by a battery pack circuit that controls charging and discharging of a battery pack including a standard cell in which a capacity coefficient voltage characteristic curve representing a change in an open circuit voltage with respect to a capacity coefficient allocated on a reference axis is expressed as a standard curve and a specific cell in which the capacity coefficient is an SOC (state of charge) or an SOH (state of health) in which the standard curve is shifted by a predetermined amount in an extending direction of the reference axis,

the capacity coefficient detection method comprises the following steps:

a capacity coefficient potential difference characteristic curve acquiring step of acquiring a capacity coefficient potential difference characteristic curve indicating a change in potential difference between the standard battery cell and the specific battery cell with respect to the capacity coefficient from a memory;

a potential difference detection step of detecting a potential difference between the standard battery cell and the specific battery cell; and

and a capacity coefficient value detection step of detecting a capacity coefficient value of the standard battery cell at the current time by comparing the potential difference detected in the potential difference detection step with the capacity coefficient potential difference characteristic curve acquired in the capacity coefficient potential difference characteristic curve acquisition step.

7. A storage medium storing a capacity coefficient detection program, wherein a battery pack circuit controls charging and discharging of a battery pack including a standard cell in which a capacity coefficient voltage characteristic curve representing a change in an open circuit voltage with respect to a capacity coefficient allocated on a reference axis and a specific cell in which a capacity coefficient indicating a state of charge (SOC) or a state of health (SOH) is expressed as a deviation curve obtained by deviating the standard curve by a predetermined amount in an extending direction of the reference axis,

the capacity coefficient detection program is configured to cause the processor of the battery pack circuit to execute:

a capacity coefficient potential difference characteristic curve acquiring step of acquiring a capacity coefficient potential difference characteristic curve indicating a change in potential difference between the standard battery cell and the specific battery cell with respect to the capacity coefficient from a memory;

a potential difference detection step of detecting a potential difference between the standard battery cell and the specific battery cell; and

and a capacity coefficient value detection step of detecting a capacity coefficient value of the standard battery cell at the current time by comparing the potential difference detected in the potential difference detection step with the capacity coefficient potential difference characteristic curve acquired in the capacity coefficient potential difference characteristic curve acquisition step.

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