CN109459146B - Preparation method of uncooled infrared detector based on piezoelectric resonator - Google Patents
Preparation method of uncooled infrared detector based on piezoelectric resonator Download PDFInfo
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- G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
- G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
- G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
Abstract
A method for preparing an uncooled infrared detector based on a piezoelectric resonator relates to the technical field of infrared detection, solves the problem of low absorptivity of the infrared detector obtained by the preparation method, and comprises the steps of preparing the piezoelectric resonator; sequentially preparing a metal reflecting layer, a dielectric layer and a metal array layer on the piezoelectric resonator; preparing a readout integrated circuit substrate; the readout integrated circuit substrate and the piezoelectric resonator are connected. The preparation method has the advantages of integrated manufacturing, batch production, low cost and the like; the metal reflecting layer, the dielectric layer and the metal array layer are integrated on the surface of the piezoelectric resonator, the metal array layer is used for realizing the enhanced absorption of the infrared spectrum, the absorbed energy acts on the piezoelectric resonator, the absorption rate is improved to be more than 80%, and meanwhile, the selectivity of the uncooled infrared detector to the incident frequency spectrum is increased. The uncooled infrared detector prepared by the method has the advantages of traditional uncooled infrared detection, and is quick in response and high in detection sensitivity.
Description
Technical Field
The invention relates to the technical field of infrared detection, in particular to a preparation method of an uncooled infrared detector based on a piezoelectric resonator.
Background
The non-refrigeration type infrared detector is also called a room temperature detector and can work under the room temperature condition. Uncooled infrared detectors are typically thermal detectors, i.e., operate by detecting the thermal effects of infrared radiation. The uncooled infrared detector has the advantages of small volume, light weight, long service life, low cost, low power consumption and the like, so that the uncooled infrared detector is more and more widely applied to the fields of military affairs, security protection, medical detection and the like.
In recent years, with the development of micro-nano sensing technology, the application of piezoelectric resonators is also expanded to the field of uncooled infrared detectors. On one hand, the piezoelectric resonator generally has a miniature size, and has stronger external interference resistance; on the other hand, the piezoelectric resonator generally operates in a resonance simulation and has a high quality factor, so that the device exhibits high sensitivity; the two aspects promote the uncooled infrared detector based on the piezoelectric resonator to show excellent signal-to-noise ratio indexes. In addition, the piezoelectric resonator adopts a frequency readout circuit system which can effectively suppress flicker noise (1/f noise).
However, in the existing preparation method of the uncooled infrared detector based on the piezoelectric resonator, the prepared detectors have low absorptivity to infrared radiation and no selectivity to incident spectrum.
Disclosure of Invention
In order to solve the problems, the invention provides a preparation method of an uncooled infrared detector based on a piezoelectric resonator.
The technical scheme adopted by the invention for solving the technical problem is as follows:
a preparation method of an uncooled infrared detector based on a piezoelectric resonator comprises the following steps:
s1, obtaining a silicon substrate;
s2, preparing a left through hole, a right through hole and a groove on the silicon substrate; the groove is positioned on the upper surface of the silicon substrate, and the left through hole and the right through hole are separated from two sides of the groove and penetrate through the upper surface and the lower surface of the silicon substrate;
s3, preparing a left through hole electrode in the left through hole, preparing a right through hole electrode in the right through hole, preparing a first electrode at the lower end of the left through hole electrode and the lower surface of the silicon substrate, and preparing a second electrode at the lower end of the right through hole electrode and the lower surface of the silicon substrate;
s4, filling the groove with a sacrificial layer material to prepare a sacrificial layer, wherein the sacrificial layer covers the upper surface of the silicon substrate, and the thickness of the sacrificial layer is larger than the depth of the groove;
s5, carrying out planarization treatment on the upper surface of the silicon substrate until the sacrificial layer and the upper surface of the silicon substrate are coplanar;
s6, preparing a bottom electrode on the upper surfaces of the silicon substrate and the sacrificial layer obtained in the S5; the bottom electrode covers the sacrificial layer obtained in the step S5, and is connected with the left through hole electrode;
s7, preparing a piezoelectric layer on the upper surface of the bottom electrode;
s8, preparing a top electrode on the upper surface of the piezoelectric layer; the top electrode is connected with the right through hole electrode;
s9, preparing a metal reflecting layer on the upper surface of the top electrode;
s10, preparing a dielectric layer on the upper surface of the metal reflecting layer;
s11, preparing a metal array layer on the upper surface of the dielectric layer;
s12, etching the sacrificial layer obtained in the step S5 to obtain a cavity, and completing the preparation of the piezoelectric resonator;
s13, preparing a readout integrated circuit substrate;
and S14, bonding the first electrode and the second electrode on the read integrated circuit substrate to obtain the uncooled infrared detector, and completing the preparation.
An uncooled infrared detector prepared by the preparation method of the uncooled infrared detector based on the piezoelectric resonator.
The invention has the beneficial effects that:
1. the invention is manufactured by an MEMS micromachining method, and integrates the piezoelectric resonator, the metal reflecting layer, the dielectric layer and the metal array layer on the reading integrated circuit substrate, thereby having the advantages of integrated manufacturing, batch production, low cost and the like.
2. The structure of integrating the metal reflecting layer, the dielectric layer and the metal array layer on the surface of the piezoelectric resonator realizes the enhanced absorption of the infrared spectrum by utilizing the metal array layer and the like, and the absorbed energy acts on the piezoelectric resonator, so that the problem of low absorption rate of the sensitive surface of the piezoelectric resonator on infrared radiation is solved, and the absorption rate of the uncooled infrared detector is improved from 20% to more than 80%.
3. The selectivity of the uncooled infrared detector to an incident frequency spectrum is increased by preparing the metal array layer, the dielectric layer and the metal reflecting layer.
4. The uncooled infrared detector prepared by the preparation method is of a thin film structure, and has obvious advantages in the aspects of anti-seismic performance, pixel consistency and the like compared with the uncooled infrared detector of a traditional micro-bridge structure.
5. The uncooled infrared detector prepared by the preparation method disclosed by the invention has the advantages of low cost, miniaturization, high stability and long service life of the traditional uncooled infrared detection, and also has the advantages of quick response and high detection sensitivity of the refrigerated infrared detector.
Drawings
Fig. 1 is a state diagram corresponding to S1 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 2 is a state diagram corresponding to the process S2 for manufacturing the uncooled infrared detector of the present invention.
Fig. 3 is a state diagram corresponding to the process S3 for manufacturing the uncooled infrared detector of the present invention.
Fig. 4 is a state diagram corresponding to S4 of the process for manufacturing the uncooled infrared detector of the present invention.
Fig. 5 is a state diagram corresponding to S5 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 6 is a state diagram corresponding to S6 of the process for manufacturing the uncooled infrared detector of the present invention.
Fig. 7 is a state diagram corresponding to S7 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 8 is a state diagram corresponding to S8 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 9 is a state diagram corresponding to S9 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 10 is a state diagram corresponding to S10 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 11 is a state diagram corresponding to S11 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 12 is a state diagram corresponding to S12 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 13 is a state diagram corresponding to S13 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 14 is a state diagram corresponding to S14 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 15 is a state diagram corresponding to S15 of a process for manufacturing an uncooled infrared detector according to the present invention.
Fig. 16 is a schematic three-dimensional structure diagram of the uncooled infrared detector of the present invention.
Fig. 17 is a schematic structural view of a surface plasmon of the uncooled infrared detector of the present invention.
Fig. 18 is a schematic structural diagram of a piezoelectric resonator of the uncooled infrared detector of the present invention.
In the figure: 1. the readout integrated circuit comprises a readout integrated circuit substrate, 1-1, a first substrate electrode, 1-2, a second substrate electrode, 1-3, a substrate, 2, a piezoelectric resonator, 2-1, a top electrode, 2-.2, a piezoelectric layer, 2-3, a bottom electrode, 2-4, a first electrode, 2-5, a second electrode, 2-6, a silicon substrate, 2-7, a right through hole electrode, 2-8, a left through hole electrode, 2-9, a cavity, 2-17, a right through hole, 2-18, a left through hole, 2-19, a groove, 2-29, a sacrificial layer, 3, a surface plasmon, 3-1, a metal array layer, 3-2, a dielectric layer, 3-3, a metal reflecting layer, 4, a surrounding plate, 5 and an infrared window.
Detailed Description
In order that the above objects, features and advantages of the present invention can be more clearly understood, a more particular description of the invention will be rendered by reference to the appended drawings.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced in other ways than those specifically described herein, and therefore the scope of the present invention is not limited by the specific embodiments disclosed below.
The preparation method of the uncooled infrared detector based on the piezoelectric resonator 2 comprises the following specific steps:
s1, obtaining a silicon substrate 2-6
As shown in fig. 1, silicon substrates 2-6 are obtained; silicon substrates 2-6 are high-resistance double-polished silicon wafers commonly used in the semiconductor industry.
S2, preparing left through holes 2-18, right through holes 2-17 and grooves 2-19 on silicon substrates 2-6
As shown in fig. 2, left via hole 2-18, right via hole 2-17 and groove 2-19 are prepared on silicon substrate 2-6 (in S12, groove 2-19 cooperates with bottom electrode 2-3 to become cavity 2-9). The groove 2-19 is located on the upper surface of the silicon substrate 2-6, the left through hole 2-18 is located on the left side of the groove 2-19, the right through hole 2-17 is located on the right side of the groove 2-19, and the left through hole 2-18 and the right through hole 2-17 penetrate through the upper surface and the lower surface of the silicon substrate 2-6. The process for making the left vias 2-18 and the right vias 2-17 typically uses deep silicon ion reactive etching (DRIE). The preparation process of the grooves 2-19 can adopt dry etching or wet etching.
S3, manufacturing a conductive electrode
As shown in fig. 3, a left through-hole electrode 2-8 is prepared in the left through-hole 2-18, a right through-hole electrode 2-7 is prepared in the right through-hole 2-17, a first electrode 2-4 is prepared at the lower end of the left through-hole electrode 2-8 and the lower surface of the silicon substrate 2-6, and the first electrode 2-4 is connected with the lower end of the left through-hole electrode 2-8. And manufacturing a second electrode 2-5 at the lower end of the right through hole electrode 2-7 and the lower surface of the silicon substrate 2-6, wherein the second electrode 2-5 is connected with the lower end of the right through hole electrode 2-7. The left through-hole electrode 2-8, the right through-hole electrode 2-7, the first electrode 2-4 and the second electrode 2-5 are usually prepared by electroplating, and the electroplating material can be Cu, Au or Ni.
S4, filling the grooves 2-19 with a sacrificial material
As shown in fig. 4, a first sacrificial layer is deposited on the upper surface of the silicon substrate 2-6 by using a sacrificial layer material, and the first sacrificial layer fills the covering grooves 2-19 and covers the upper surface of the silicon substrate 2-6. The thickness of the first sacrificial layer is larger than the depth of the recesses 2-19. The material of the first sacrificial layer is usually borosilicate glass. The first sacrificial layer and the second sacrificial layer described below are collectively referred to as sacrificial layers 2-29.
S5, grinding the upper surfaces of the silicon substrates 2-6 to be flat
As shown in fig. 5, the upper surface of the silicon substrate 2-6 is planarized until the sacrificial layer 2-29 and the upper surface of the silicon substrate 2-6 are coplanar. Planarization is usually performed by chemical mechanical polishing. After the silicon substrates 2-6 are flattened, the left through hole electrodes 2-8 and the right through hole electrodes 2-7 are exposed on the upper surfaces of the silicon substrates 2-6, the first sacrificial layers are called second sacrificial layers after being flattened, the second sacrificial layers only exist in the grooves 2-19, and the upper surfaces of the second sacrificial layers are coplanar with the upper surfaces of the silicon substrates 2-6.
S6, preparing a bottom electrode 2-3
As shown in fig. 6, a bottom electrode 2-3 is prepared on the upper surface of the silicon substrate 2-6 and the upper surface of the second sacrificial layer after completion of S5. One end of the bottom electrode 2-3 is connected with the upper end of the left through hole electrode 2-8, and the bottom electrode 2-3 covers the second sacrificial layer. The bottom electrode 2-3 is typically prepared by a magnetron sputtering process.
S7, preparing a piezoelectric layer 2-2
As shown in fig. 7, a piezoelectric layer 2-2 is prepared on the upper surface of the bottom electrode 2-3. Preferably, the projected area of the piezoelectric layer 2-2 on the silicon substrate 2-6 is larger than the projected area of the groove 2-19 (i.e., the cavity 2-9 of S12) on the silicon substrate 2-6. The piezoelectric layer 2-2 is typically prepared by vapor phase chemical deposition.
S8, preparing a top electrode 2-1
As shown in fig. 8, a top electrode 2-1 is prepared on the upper surface of the piezoelectric layer 2-2. One end of the top electrode 2-1 is connected with the right through hole electrode 2-7. The top electrode 2-1 is typically prepared by a magnetron sputtering process.
S9, preparing a metal reflecting layer 3-3
As shown in fig. 9, a metal reflective layer 3-3 is prepared on the upper surface of the top electrode 2-1. The metal reflecting layer 3-3 is generally prepared by a sputtering or vacuum evaporation method, and the area of the metal reflecting layer 3-3 is smaller than that of the top electrode 2-1.
S10, preparing a dielectric layer 3-2
As shown in fig. 10, a dielectric layer 3-2 is prepared on the upper surface of the metal reflective layer 3-3. The dielectric layer 3-2 is generally prepared by a sputtering or vacuum evaporation process. The area of the dielectric layer 3-2 is generally smaller than or equal to the area of the metal reflecting layer 3-3, that is, the area of the lower surface of the dielectric layer 3-2 is smaller than or equal to the area of the upper surface of the metal reflecting layer 3-3.
S11, preparing a metal array layer 3-1
As shown in fig. 11, a metal array layer 3-1 is prepared on the upper surface of the dielectric layer 3-2, at which time surface plasmons 3 are obtained. The metal array layer 3-1 can be formed by photolithography, electron beam lithography, lift-off, or the like.
S12, etching the sacrificial layer 2-29 to obtain the cavity 2-9
As shown in fig. 12, the second sacrificial layer is released by etching, and the cavities 2 to 9 are obtained, that is, the piezoelectric resonator 2 is obtained at this time. The cavities 2-9 can be obtained by wet etching the second sacrificial layer with an HF solution or dry etching the second sacrificial layer with gaseous HF.
S13, preparing a readout integrated circuit substrate 1
As shown in fig. 13, a readout integrated circuit substrate 1 is prepared. The readout integrated circuit substrate 1 includes a substrate 1-3, two substrate electrodes, referred to as a first substrate electrode 1-1 and a second substrate electrode 1-2, disposed on the substrate 1-3 and connected to the substrate 1-3, respectively.
S14, bonding the readout integrated circuit substrate 1 and the piezoelectric resonator 2
As shown in fig. 14, the piezoelectric resonator 2 is connected to the readout integrated circuit substrate 1 by bonding, and the uncooled infrared detector is obtained. I.e. the first substrate electrode 1-1 and the first electrode 2-4 are connected and the second substrate electrode 1-2 and the second electrode 2-5 are connected. The bonding method generally adopts a metal thermocompression bonding process.
S15, packaging
As shown in fig. 15, the resulting device of S14 is packaged. The enclosing plate 4 is glued on the readout integrated circuit substrate 1, and then the infrared window 5 is glued to the upper part of the enclosing plate 4, and the infrared window 5 is positioned right above the metal array layer 3-1. The readout integrated circuit substrate 1, the enclosure 4 and the infrared window 5 constitute a sealed cavity. The enclosing plate 4 can adopt a silicon wafer, a glass sheet or a ceramic packaging structure and the like. The sealed cavity may be evacuated according to the requirements of the various structures on the integrated circuit substrate 1. The preparation is finished.
The bottom electrode 2-3 and the top electrode 2-1 are usually made of Mo, W, Al, Pt or Ni. The piezoelectric layer 2-2 is usually AlN, ZnO or LiNbO3Or quartz, etc. The right through-hole electrode 2-7, the left through-hole electrode 2-8, the first electrode 2-4 and the second electrode 2-5 are usually made by electroplating process, and the material can be selected from Au, Cu or Ni, but not limited to these materials.
The manufacturing method integrates the piezoelectric resonator 2, the metal reflecting layer 3-3, the dielectric layer 3-2 and the metal array layer 3-1 on the readout integrated circuit substrate 1 by an MEMS micro-processing method, so that the manufacturing method has the advantages of integrated manufacturing, batch production, low cost and the like.
The uncooled infrared detector based on the piezoelectric resonator 2 manufactured according to the above method may be defined to include a readout integrated circuit substrate 1, the piezoelectric resonator 2, and a surface plasmon 3, as shown in fig. 16. The readout integrated circuit substrate 1, the piezoelectric resonator 2, and the surface plasmon 3 are connected in this order. The readout integrated circuit substrate 1 is located at the bottommost layer, the piezoelectric resonator 2 is located at the middle layer, the surface plasmon 3 is located at the uppermost layer, and the surface plasmon 3 is located on the upper surface of the piezoelectric resonator 2.
The function of the readout integrated circuit substrate 1 described above is to read the electrical signal of the piezoelectric resonator 2. The readout integrated circuit substrate 1 generally operates in a radio frequency band, and more specifically, the readout integrated circuit substrate 1 operates in a band (about 1GHz to 3GHz) near the resonance frequency of the piezoelectric resonator 2.
The surface plasmon 3 is composed of a metal reflecting layer 3-3, a dielectric layer 3-2 and a metal array layer 3-1 in sequence from bottom to top, as shown in fig. 17, the dielectric layer 3-2 is located on the upper surface of the metal reflecting layer 3-3, and the metal array layer 3-1 is located on the upper surface of the dielectric layer 3-2. The material of the metal array layer 3-1 is usually Au, Ag, Al, etc., but is not limited to these three metals; the metal array layer 3-1 can be fabricated by conventional semiconductor process and electron beam lithography. The material of the dielectric layer 3-2 is Ge or MgF2、SiO2Or AlN, etc., but is not limited to these materials.
The piezoelectric resonator 2 comprises a silicon substrate 2-6, a cavity 2-9, a bottom electrode 2-3, a piezoelectric layer 2-2, a top electrode 2-1, a left through hole electrode 2-8, a right through hole electrode 2-7, a first electrode 2-4 and a second electrode 2-5, and the specific structure is shown in fig. 18. The silicon substrate 2-6 is provided with a left through hole 2-18 and a right through hole 2-17, the left through hole electrode 2-8 is positioned in the left through hole 2-18, the left through hole electrode 2-8 fills the left through hole 2-18, the right through hole electrode 2-7 is positioned in the right through hole 2-17, and the right through hole electrode 2-7 fills the right through hole 2-17. The first electrode 2-4 and the second electrode 2-5 are both arranged on the lower surface of the silicon substrate 2-6, the first electrode 2-4 is connected with the lower end of the left through hole electrode 2-8 and can be formed by integrally forming the first electrode 2-4 and the left through hole electrode 2-8, and the second electrode 2-5 is connected with the lower end of the right through hole electrode 2-7 and can be formed by integrally forming the second electrode 2-5 and the right through hole electrode 2-7. The first electrode 2-4 is connected with a first substrate electrode 1-1 of the readout integrated circuit substrate 1, the second electrode 2-5 is connected with a second substrate electrode 1-2 of the readout integrated circuit substrate 1, the left through hole electrode 2-8 is communicated with the readout integrated circuit substrate 1 through the first electrode 2-4, and the right through hole electrode 2-7 is communicated with the readout integrated circuit substrate 1 through the second electrode 2-5. The cavity 2-9 is located on the upper surface of the silicon substrate 2-6, the bottom electrode 2-3 is arranged on the cavity 2-9 and the silicon substrate 2-6, the cavity 2-9 is located between the bottom electrode 2-3 and the silicon substrate 2-6, the bottom electrode 2-3 covers the cavity 2-9, namely the projection area of the cavity 2-9 on the silicon substrate 2-6 is smaller than the projection area of the bottom electrode 2-3 on the silicon substrate 2-6, namely the space between the bottom electrode 2-3 and the silicon substrate 2-6 is called the cavity 2-9, the cavity 2-9 is used for achieving reflection of sound waves, and mechanical energy is limited in the piezoelectric resonator 2. The piezoelectric layer 2-2 is arranged on the upper surface of the bottom electrode 2-3, the top electrode 2-1 is arranged on the upper surface of the piezoelectric layer 2-2, the top electrode 2-1 is connected with the metal reflecting layer 3-3 of the surface plasmon 3, the metal reflecting layer 3-3 is arranged on the upper surface of the top electrode 2-1, the bottom electrode 2-3 is connected with the upper end of the left through hole electrode 2-8, and the top electrode 2-1 is connected with the upper end of the right through hole electrode 2-7. Preferably, the projected area of the piezoelectric layer 2-2 on the silicon substrate 2-6 is larger than the projected area of the cavity 2-9 on the silicon substrate 2-6.
The readout integrated circuit substrate 1, the piezoelectric resonator 2 and the surface plasmon 3 can be directly connected, or the piezoelectric resonator 2 and the surface plasmon 3 can be connected through a first connecting layer (the top electrode 2-1 is connected with the metal reflecting layer 3-3 through the first connecting layer), and the readout integrated circuit substrate 1 and the piezoelectric resonator 2 are connected through a second connecting layer (the readout integrated circuit substrate 1 is connected with the silicon substrate 2-6 through the second connecting layer).
The uncooled infrared detector prepared by the method provides an uncooled infrared detector structure based on the surface plasmon 3 and piezoelectric resonator 2 technology. The sensing mechanism is that the surface plasmon 3 is utilized to realize the enhanced absorption of the infrared spectrum, the absorbed energy acts on the piezoelectric resonator 2, and the infrared radiation amount is deduced by detecting the change of the electrical parameters of the piezoelectric resonator 2. The invention overcomes the problem of low absorptivity of the sensitive surface of the piezoelectric resonator 2 to infrared radiation by integrating the surface plasmon 3 on the surface of the piezoelectric resonator 2, and improves the absorptivity of the uncooled infrared detector from less than 20% in the prior art to more than 80%. Meanwhile, the problem that the piezoelectric resonator 2 has no selectivity to an incident frequency spectrum is solved by integrating the surface plasmon 3 on the surface of the piezoelectric resonator 2, and the selectivity of the uncooled infrared detector to the incident frequency spectrum is increased. The uncooled infrared detector provided by the invention is of a thin film structure, and has obvious advantages in the aspects of anti-seismic performance, pixel consistency and the like compared with the uncooled infrared detector of a traditional micro-bridge structure. The piezoelectric resonator 2 and the surface plasmon 3 are integrated on the readout integrated circuit substrate 1, so that the readout integrated circuit substrate has the advantages of integrated manufacturing, mass production, low cost and the like. The uncooled infrared detector has the advantages of low cost, miniaturization, high stability and long service life of the traditional uncooled infrared detection, and also has the advantages of quick response and high detection sensitivity of the refrigeration type infrared detector.
And after the device obtained in the step S14 is packaged in the step S15, the prepared infrared detector further comprises a surrounding plate 4 and an infrared window 5. As shown in fig. 15, a collar 4 is provided on the readout integrated circuit substrate 1, for example, by being adhered to the upper surface of the readout integrated circuit substrate 1 by a sealing adhesive. An infrared window 5 is provided on the shroud 4, and the infrared window 5 is located directly above the surface plasmon 3, allowing infrared light to irradiate the surface of the surface plasmon 3 through the infrared window 5. The readout integrated circuit substrate 1, the surrounding plate 4 and the infrared window 5 jointly form a sealed cavity, and the sealed cavity provides a vacuum environment for the piezoelectric resonator 2 and the surface plasmon 3 according to the requirements of working conditions.
Claims (10)
1. A preparation method of an uncooled infrared detector based on a piezoelectric resonator is characterized by comprising the following steps:
s1, obtaining a silicon substrate (2-6);
s2, preparing left through holes (2-18), right through holes (2-17) and grooves (2-19) on the silicon substrate (2-6); the groove (2-19) is positioned on the upper surface of the silicon substrate (2-6), and the left through hole (2-18) and the right through hole (2-17) are respectively arranged at two sides of the groove (2-19) and penetrate through the upper surface and the lower surface of the silicon substrate (2-6);
s3, preparing a left through hole electrode (2-8) in the left through hole (2-18), preparing a right through hole electrode (2-7) in the right through hole (2-17), preparing a first electrode (2-4) at the lower end of the left through hole electrode (2-8) and the lower surface of the silicon substrate (2-6), and preparing a second electrode (2-5) at the lower end of the right through hole electrode (2-7) and the lower surface of the silicon substrate (2-6);
s4, filling the grooves (2-19) with a sacrificial layer material to prepare sacrificial layers (2-29), wherein the sacrificial layers (2-29) cover the upper surfaces of the silicon substrates (2-6), and the thickness of the sacrificial layers (2-29) is larger than the depth of the grooves (2-19);
s5, carrying out planarization treatment on the upper surface of the silicon substrate (2-6) until the upper surfaces of the sacrificial layer (2-29) and the silicon substrate (2-6) are coplanar;
s6, preparing a bottom electrode (2-3) on the upper surfaces of the silicon substrate (2-6) and the sacrificial layer (2-29) obtained in the S5; the bottom electrode (2-3) covers the sacrificial layer (2-29) obtained in the step S5, and the bottom electrode (2-3) is connected with the left through hole electrode (2-8);
s7, preparing a piezoelectric layer (2-2) on the upper surface of the bottom electrode (2-3);
s8, preparing a top electrode (2-1) on the upper surface of the piezoelectric layer (2-2); the top electrode (2-1) is connected with the right through hole electrode (2-7);
s9, preparing a metal reflecting layer (3-3) on the upper surface of the top electrode (2-1);
s10, preparing a dielectric layer (3-2) on the upper surface of the metal reflecting layer (3-3);
s11, preparing a metal array layer (3-1) on the upper surface of the dielectric layer (3-2), wherein the metal array layer (3-1), the dielectric layer (3-2) and the metal reflection layer (3-3) form a surface plasmon (3), and the surface plasmon (3) realizes enhanced absorption of infrared spectra;
s12, etching the sacrificial layer (2-29) obtained in the step S5 to obtain a cavity (2-9), and completing the preparation of the piezoelectric resonator (2);
s13, preparing a readout integrated circuit substrate (1);
s14, bonding the first electrode (2-4) and the second electrode (2-5) on the read-out integrated circuit substrate (1) to obtain the uncooled infrared detector, and completing the preparation.
2. The method for preparing an uncooled infrared detector based on piezoelectric resonator as claimed in claim 1, wherein the step S14 is followed by a step of packaging.
3. The method for manufacturing an uncooled infrared detector based on a piezoelectric resonator according to claim 2, wherein the packaging step is specifically to glue the bounding plate (4) on the readout integrated circuit substrate (1), and then glue the infrared window (5) on the upper part of the bounding plate (4), wherein the infrared window (5) is positioned right above the metal array layer (3-1); the readout integrated circuit substrate (1), the surrounding plate (4) and the infrared window (5) form a sealed cavity.
4. The method for manufacturing an uncooled infrared detector based on a piezoelectric resonator as described in claim 1, wherein the readout integrated circuit substrate (1) in S13 includes a substrate (1-3), a first substrate electrode (1-1) and a second substrate electrode (1-2) both disposed on the substrate (1-3) and connected to the substrate (1-3); in the step S14, the first electrode (2-4) and the second electrode (2-5) are bonded to the readout integrated circuit substrate (1), specifically, the first substrate electrode (1-1) is connected to the first electrode (2-4), and the second substrate electrode (1-2) is connected to the second electrode (2-5).
5. The method for preparing an uncooled infrared detector based on a piezoelectric resonator according to claim 1, wherein the projected area of the cavity (2-9) of the S12 on the silicon substrate (2-6) is smaller than the projected area of the piezoelectric layer (2-2) on the silicon substrate (2-6).
6. The method for preparing an uncooled infrared detector based on a piezoelectric resonator according to claim 1, wherein the area of the lower surface of the dielectric layer (3-2) in S10 is smaller than or equal to the area of the upper surface of the metal reflecting layer (3-3).
7. The method for preparing an uncooled infrared detector based on a piezoelectric resonator according to claim 1, wherein the metal array layer (3-1) is prepared from a material selected from Au, Ag or Al; the dielectric layer (3-2) is prepared from Ge and MgF2、SiO2Or AlN; the bottom electrode (2-3) and the top electrode (2-1) are made of Mo, W, Al, Pt or Ni; the piezoelectric layer (2-2) is prepared from AlN, ZnO and LiNbO3Or quartz; the left through hole electrode (2-8), the right through hole electrode (2-7), the first electrode (2-4) and the second electrode (2-5) are made of Au, Cu or Ni.
8. The method for preparing the uncooled infrared detector based on the piezoelectric resonator according to claim 1, wherein the left through holes (2-18) and the right through holes (2-17) are prepared by a deep silicon ion reactive etching method; the grooves (2-19) are prepared by dry etching or wet etching; the left through hole electrode (2-8), the right through hole electrode (2-7), the first electrode (2-4) and the second electrode (2-5) are prepared by adopting an electroplating method; the bottom electrode (2-3) and the top electrode (2-1) are both prepared by adopting a magnetron sputtering process; the piezoelectric layer (2-2) is prepared by adopting a vapor phase chemical deposition method; the metal reflecting layer (3-3) is prepared by adopting a sputtering or vacuum evaporation method; the dielectric layer (3-2) is prepared by adopting a sputtering or vacuum evaporation method; the metal array layer (3-1) is prepared by adopting a photoetching process; the cavity (2-9) is prepared by adopting a method of wet etching the sacrificial layer (2-29) by adopting HF solution or dry etching the sacrificial layer (2-29) by adopting gaseous HF; the bonding is metal thermocompression bonding.
9. The uncooled infrared detector manufactured by the manufacturing method of any one of claims 1 to 8.
10. An uncooled infrared detector according to claim 9, wherein the uncooled infrared detector includes a first connection layer and a second connection layer, the top electrode (2-1) being connected to the metal reflection layer (3-3) through the first connection layer, and the readout integrated circuit substrate (1) being connected to the silicon substrate (2-6) through the second connection layer.
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